About us 

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. 

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. 

Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. 

Job Summary 

We are seeking an experienced Staff UEFI Engineer to design, develop, and deploy UEFI-based firmware for Graphcore’s hyperscale AI server platforms. 

This role focuses on developing system firmware responsible for platform initialization, hardware configuration, and reliability features across large-scale data center deployments. 

The Team 

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. 

The Firmware Engineering team develops the foundational firmware responsible for platform initialization, hardware configuration, and system reliability across Graphcore’s AI compute infrastructure. 

The team collaborates with silicon engineering, hardware design teams, BMC firmware teams, validation engineers, and platform architects to enable reliable server platform bring-up and operation. 

Responsibilities and Duties 

• Design, develop, and deploy UEFI-based firmware for hyperscale server platforms. 

• Collaborate with ODM partners throughout the design lifecycle from concept to mass production. 

• Integrate UEFI firmware into CI/CD pipelines enabling automated builds, regression testing, and static analysis. 

• Develop firmware functionality supporting platform initialization including CPU, memory, PCIe, and system interconnects. 

• Implement system firmware security features including root of trust, secure boot chains, and signed firmware updates. 

• Develop platform firmware features supporting server reliability, availability, and serviceability (RAS). 

• Build firmware interfaces supporting telemetry, firmware updates, and system management capabilities. 

• Collaborate with hardware, BMC, security, and validation teams to ensure full platform integration. 

• Debug and perform root cause analysis for firmware and hardware issues across lab and production environments. 

Candidate Profile 

Essential 

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline. 

• 10+ years of experience developing UEFI or BIOS firmware for server platforms. 

• Strong expertise with UEFI, TianoCore, and firmware architecture design. 

• Experience developing firmware solutions for hyperscale or cloud data center environments. 

• Strong programming skills in C/C++. 

• Deep understanding of DDR memory training, cache coherency protocols, and PCIe subsystems. 

• Strong knowledge of server platform architecture including power delivery, thermal management, sensors, and FRUs. 

• Experience implementing CI/CD pipelines for firmware development. 

• Experience debugging system firmware using logic analyzers, JTAG, GDB, and similar tools. 

Desirable 

• Experience developing UEFI firmware for ARM-based server platforms. 

• Experience with EDK II codebase development and upstream contribution. 

• Experience working with ODM/JDM partners on server platform development programs. 

• Experience delivering firmware for hyperscale cloud deployments and production environments. 

Benefits:

In addition to a competitive salary, Graphcore offers a competitive benefits package. We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments. 

About the Role

As a Staff Embedded Software Engineer, you will spearhead the development of brand-new camera categories while driving the continued growth and reliability of our ever-expanding global fleet. This role is a high-impact technical leadership position requiring seamless collaboration across the entire stack—including Hardware, Product, Backend, and Frontend teams—to bring first-generation systems to life. Reporting directly to the Camera Firmware Manager, you will work full-time at our HQ in San Mateo to oversee the technical lifecycle of our newest hardware and ensure the operational excellence of a multi-million device, perpetually online IoT footprint.

What You'll Do

• Unlocking New Markets: Lead the end-to-end lifecycle of entirely new camera categories for untapped market segments. Collaborate directly with Hardware and Product teams during the initial co-design phase, to influence HW selection and feature scoping.
• Architectural Leadership: Own the firmware roadmap and drive the large-scale architectural changes required to support novel features across the entire stack—from low-level MCUs to Linux-based edge services.
• System-Wide Technical Depth: Engineer high-performance features across a diverse software landscape, spanning bare-metal MCU firmware, secure bootloaders, Linux kernel optimizations, and concurrent userspace services.
• Complex Problem Solving: Tackle the most "gnarly" system-level challenges, from non-deterministic race conditions and memory corruption to elusive hardware-software timing issues that only emerge at the scale of a million-device fleet.
• Navigate Multi-Dimensional Trade-offs: Systematically balance conflicting priorities—including hardware security hardening, peak performance, power efficiency, and deep fleet observability
• Cross-Functional Optimization: Partner with CV, Streaming, and Storage teams to architect vertically integrated features that push the boundaries of edge computing and real-time computer vision.
• Operational Excellence at Scale: Champion a reliability-first culture for a global fleet of 1.5 million perpetually online devices, designing the deployment and monitoring strategies that ensure 24/7 uptime.

What You Bring

• BS/MS in Computer Science, Electrical Engineering, or related field.
• 10+ years of professional experience in systems software development for performance and resource-constrained environments.
• 5+ years of experience building software for Linux-based platforms.
• Demonstrated experience leading large-scale, cross-functional initiatives from concept to production. You have a history of aligning diverse engineering verticals to deliver complex systems on aggressive timelines.
• Proven experience leading initial board bring-up and hardware-software co-design for first-generation embedded devices.
• Hands-on experience with low-level protocols (SPI, I2C, UART, USB) and the ability to debug complex hardware-software interactions.
• Experience designing, implementing and debugging concurrent/multithreaded firmware services
• Strong understanding of modern operating systems, computer architecture, and trade-offs between compute, memory, and storage.
• Proficient in at least one systems programming language: C++ or Golang.
• Familiarity with Bash scripting and Python for tooling and automation.
• Bonus Qualification: Direct experience with Linux Kernel development, including writing or debugging drivers, managing device trees, or optimizing kernel-space performance.
• Bonus Qualification: Technical depth in MCU firmware and the boot stack, with a focus on RTOS, bare-metal development, or secure boot implementation.
• Excellent communication and documentation skills, with the ability to collaborate across engineering and product teams.

US Employee Benefits

Verkada is committed to fostering a workplace environment that prioritizes the holistic health and wellbeing of our employees and their families by offering comprehensive wellness perks, benefits, and resources. Our benefits and perks programs include, but are not limited to:

• Healthcare programs that can be tailored to meet the personal health and financial well-being needs - Premiums are 100% covered for the employee under at least one plan and 80% for family premiums under all plans
• Nationwide medical, vision and dental coverage
• Health Saving Account (HSA) with annual employer contributions and Flexible Spending Account (FSA) with tax saving options
• Expanded mental health support
• Paid parental leave policy & fertility benefits
• Time off to relax and recharge through our paid holidays, firmwide extended holidays, flexible PTO and personal sick time
• Professional development stipend
• Fertility Stipend
• Wellness/fitness benefits
• Healthy lunches provided daily
• Commuter benefits

Additional Information

• We do sponsor and take over sponsorship of employment visas for this role. If we make you an offer, we will make every reasonable effort to get you a visa.

Team Description:

The Brain Interfaces Software Team is responsible for the end to end software stack that manages implant communication, verification, manufacturing and monitoring. We own client side SDKs and full-stack platforms that are used by various divisions within the company. We are looking for versatile engineers who are interested in architecting and implementing elegant software solutions and who thrive with the autonomy to propose creative approaches to problems. 

Neuralink strives to be a meritocratic environment: we require honest and transparent communication to ensure the best ideas win out, and we believe the best solutions emerge and the best teams are created when you assemble high-performing individuals and allow them to engage in rigorous and thoughtful inquiry. We want to work with exceptional people, and, to the extent that you excel, we want you to take on more responsibility and help all of us succeed. If this speaks to you, come join us.

Job Responsibilities:

As a Software Engineer Intern on the Brain Interfaces Software Team, your responsibilities will encompass:

• Developing and improving Neuralink’s Implant and Charger SDK
• Maintaining Neuralink’s brain interface software and firmware build tooling
• Developing and improving Neuralink’s Implant manufacturing line acceptance software
• Maintaining Neuralink's Implant design control verification testing software
• Developing and improving Neuralink’s Implant recorder system
• Developing and improving Neuralink’s Implant monitoring system

Required Qualifications:

• Fluent in Python and C or Rust (don’t get hung up on this—being an exceptional software engineer matters above all)
• Experience (and comfortable) with the Linux/Unix systems and command line
• Evidence of exceptional ability in engineering, mathematics, or computer science
• Strong understanding of engineering first principles
• Strong intuition for what matters in a production system (vs. research-grade)

Preferred Qualifications:

• Prior experience developing software for safety-critical systems
  

About You:

• You find large challenges exciting and enjoy discovering and defining problems as much as solving them
• You deliver. You may enjoy thoughtful conversations about problems and perfecting design, but in the end, you know that what matters is delivering reliable solutions. (Our ultimate aim is to help people; the “right” solution doesn’t always achieve that)
• You are mission-driven and goal-oriented in your approach to solving problems
• You feel a sense of urgency to get things done sooner rather than later—because there is so much we, as people, can contribute to the world and accomplish in this life, it’s a shame to waste time
• You are resourceful, flexible, and adaptable; no task is too big or too small

Team Description:

The Surgery & Robotics Hardware Team is looking for Electrical Engineers who want to advance the future of healthcare solutions with technology. At Neuralink we recognize that increasing healthcare costs, lack of access, and insufficient numbers of neurosurgeons globally require new approaches to enable greater access to our devices. To address these challenges we design fully autonomous robotics systems, human assistive surgical tools, and design entire surgical suites in order to provide better experiences for our customers.

Our team works on our surgical robot system which aims to fully automate the implantation of the Neuralink implant. We design and integrate multi-axis robotic arms, perception systems including custom imaging hardware, optical coherence tomography tissue imaging, power electronics, and safety systems such as 3D spatial mapping/object avoidance sensors. Robotics is part of a larger system of tools we work on. For example, using pre-op MRI scans we generate patient anatomy data that we later use in surgery to register precise surgery site locations. 

In addition to research and development of modern surgical technology, we also are responsible for bringing these technologies to market. We perform full lifecycle testing for all devices we design and ultimately manufacture them for use in human surgeries. To date, our designs have served over 20 individuals, and in the coming years our designs will serve thousands of individuals who wish to use our implant technology.

Job Description and Responsibilities:

As an Electrical Engineer on the Surgery & Robot Hardware Team, you will be expected to design, verify, and oversee the transition to production of a variety of custom electronics systems.  This role offers substantial autonomy and the exciting opportunity to own creative decisions and execute on new, impactful projects such as robotics stage designs, motor drives and controls, custom camera designs, manufacturing automation, and the firmware that enables all of these devices.

Required Qualifications: 

• Bachelor’s degree in Electrical Engineering or a related field or equivalent experience
• Professional experience delivering on all phases of electronics design (requirements, part selection, schematic, layout, manufacturing, test)
• Demonstrated depth in at least one of the following:
  • Power electronics: experience designing custom power conversion, distribution, eFusing, and battery management systems in the low-to-medium (1W-2kW) range
  • FPGA hardware design for time sensitive systems such as image processing, high-speed data acquisition, or real time networking. Professional experience in FPGA selection, RTL development, digital signal processing theory and techniques, and hardware design to interface high speed physical layer devices via PCIe, MIPI, SLVS-ec, LVDS, etc
  • Manufacturing automation design: professional experience architecting and implementing manufacturing automation solutions for products that currently ship at the scale of 1000’s+
• Practical electronics design knowledge including designing for EMC, ESD, thermals and packaging

Preferred Qualifications: 

• A portfolio showcasing your hardware designs 
• Demonstrable experience developing electronics for safety critical systems such as medical devices, aerospace, automotive, or military
• Demonstrable experience shipping code in one of the following languages: C, C++, Python, or Rust
• Altium experience

Team Description:

Join the Brain Interfaces Embedded Systems Team and be part of an elite team of engineers working on high-performance, safety-critical embedded systems for the next-generation brain-computer interfaces. You will have the opportunity to work closely with chip designers, electrical engineers, and software engineers on a small, fast-moving team.

Job Description and Responsibilities: 

We are looking for experienced, hands-on engineers who are interested in exploring what's possible in highly powered and latency-constrained environments. Firmware is the kernel of operation for the implant, and you have the chance to define and implement features that have a significant impact on the product’s capabilities. As an Embedded Software Engineer, you will be expected to:

• Own complex challenges from definition to solution
• Utilize your ability to work cross functionally to deliver safety critical systems while considering power, radio, and thermal requirements
• Take ownership of products and/or core features; from planning and design to execution and testing
• Build on your fundamental understanding of hardware while contributing to bare-metal firmware
• Embrace a fast-paced iterative environment that prioritizes shipping manufacturable solutions 

Note: The team is hiring embedded engineers at all levels, both junior and senior. What matters most is evidence of exceptional abilities and a drive to succeed.

Required Qualifications: 

• Bachelor’s degree in computer science, electrical engineering, related field, or equivalent experience 
• 1+ years of experience with embedded systems (including internships)
• Proficient in embedded C or Rust
• Ability to design bare-metal embedded systems in highly constrained environments
• Strong Electrical Engineering fundamentals 
• Signal processing fundamentals 
• You find enormous challenges exciting and enjoy discovering and defining problems as much as solving them
• You deliver. You may enjoy thoughtful conversations about problems and perfecting design, but in the end, you know that delivering reliable manufacturable solutions matters
• You are a cross-disciplinary team member. You are excited to work with and learn from chip designers to neuroscientists

Preferred Qualifications: 

• Experience with embedded stacks for ARM cores
• Experience with safety-critical systems
• Experience with FPGA development and testing
• Experience with RF, BLE, TCP/IP stacks from a practical embedded perspective
• Prior work or experience with applied cryptography and embedded systems security

Team Description:

At Neuralink, we're engineering the future of automated surgeries, focusing on the safe and effective implantation of our groundbreaking Neuralink implant. Our team — a cross-functional mix of roboticists, engineers from various disciplines, and medical professionals — collaborates on developing a surgical flow from first principles. In this critical role, you'll straddle the cutting-edge worlds of robotics, software, and neuroscience.

Job Description and Responsibilities:

This is a new and foundational role for our team that will allow you to create new embedded systems from scratch while challenging and refining the old. As a Firmware Engineer, your responsibilities will encompass:

• Developing and optimizing embedded software for robotic surgery applications
• Streamlining our codebase by refining and, when necessary, retiring legacy embedded software
• Rigorous testing and validation of software systems to meet the highest safety and reliability standards
• Participating in peer code reviews
• Writing drivers and applications to extend the functionality of our robotics
• Specifying hardware and software choices as we develop future hardware platforms
• Sharing your findings and progress with the team in a collaborative environment

Required Qualifications:

• Demonstrated track record of success in a science or engineering field, evidenced by outstanding projects, innovations, or advanced problem-solving
• Proven experience in software development, preferably with exposure to embedded systems

Preferred Qualifications:

Embedded Software Development:

• 2+ years of experience with embedded systems
• Proficient with common communication protocols (SPI, UART, I2C, etc.)
• Comfortable/working knowledge of more advanced protocols such as PCIe, MIPI CSI/DSI, USB, and 802.3
• Proficient in at least one embedded language such as C, C++, or Rust
• Proficient with embedded toolchains and workflow
• Experience building and bringing-up MCUs or FPGAs
• Experience with embedded stacks for ARM cores
• Experience developing on embedded Linux platforms
• Experience with embedded Linux kernel configuration and device tree setup
• Experience with kernel driver development
• Experience with ARM bootloaders
• Experience coding drivers for actuators and sensors
• Experience with high speed data acquisition and processing

Electrical Engineering:

• Foundational understanding of MCU architectures and peripheral integration
• Solid knowledge in electrical engineering and DSP
• Ability to interpret electrical schematics and datasheets, along with proficiency in using lab equipment

Team Description: 

The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future. 

Job Description & Responsibilities: 

Our Hardware/ Software Co-Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.

• Micro-architecture design and RTL implementation of: 
• Low-power digital signal processors
• Low-power general-purpose hardware accelerators
• Low-power graphics processing units
• Low-power radio MAC/PHY
• Low-power serial link MAC/PHY
• Design and optimization of hardware/software interface with firmware engineers
• Application-specific architecture optimization including:
• Complex system modeling for energy and performance benchmarks
• Workload analysis and modeling
• Energy/performance profiling and analysis
• Leveraging architecture-level design trade-offs with process technology and workload type
• Balancing cost and performance under manufacturing process variation 
• Collaboration on silicon bring-up tests with verification engineers 

Required Qualifications:

• Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience
• Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
• Experience designing and implementing embedded software in C or Rust
• Expertise in SystemVerilog, C/C++, Python
• Experience designing and implementing  emulation models, transactors, and test environments to replicate hardware behavior
• Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
• Experience in designing digital signal processing pipelines, from algorithm to RTL

Preferred Qualifications: 

• Experience in architecture optimization with process technology customization
• Experience in the verification of complex digital systems, using industry standard tools
• Experience in the physical design of complex digital systems, using industry standard tools
• Experience testing and debugging digital system-on-a-chips
• Functional modeling experience and logic verification with SystemVerilog, SystemC/C++
• Experience automating tool flows
• Experience in processor instruction set architecture design
• Experience in compiler back-end design and customization

Job Summary

We are seeking a talented Signal Processing Engineer to design, develop, and optimize advanced digital signal processing (DSP) algorithms for on-chip and embedded implementation. In this role, you will create efficient, hardware-friendly algorithms that run directly on custom SoCs, enabling real-time processing with constraints on power, latency, area, and throughput. You will collaborate closely with the SoC, Firmware, and Machine Learning teams to translate high-level signal processing needs into production-ready solutions.

Key Responsibilities

• Design and develop signal processing algorithms for sensing neural activity in the cortex (e.g. spike detection), monitoring cortical electrode health, and more.
• Design and develop numerical algorithms, such as custom data compression to increase radio throughput.
• Develop fixed-point or quantized versions of algorithms optimized for constrained hardware.
• Implement and verify algorithms in high-level languages and transition them to hardware-friendly representations.
• Perform algorithm-to-architecture mapping: analyze trade-offs between accuracy, latency, power, and resource utilization on the SoCs.
• Collaborate with the digital design team to define micro-architectures for custom on-chip processing pipelines, including dataflow, pipelining, and parallelization.

Required Qualifications

• Education: BS, MS or PhD in Electrical Engineering, Computer Engineering, Signal Processing, or a related field.
• Experience: 3+ years in digital signal processing algorithm development or real-world products, with a focus on embedded or hardware-constrained implementations.
• Fluent in signal processing fundamentals (both analog and digital) and strong numerical capabilities.
• Familiarity with fixed-point arithmetic, quantization effects, and numerical precision trade-offs.
• Proficiency in Python and C for algorithm prototyping and simulation.

Preferred Qualifications

• Hands-on experience with Verilog/VHDL, or transitioning algorithms to RTL.
• Experience with dedicated DSP cores or accelerators.
• Track record of optimizing for power/area/latency in resource-constrained environments.

Base Salary Range:

 $121,000 - $230,500

Team Description:

The Brain Interfaces Software Team is responsible for the end to end software stack that manages implant communication, verification, manufacturing and monitoring. We own client side SDKs and full-stack platforms that are used by various divisions within the company. We are looking for versatile engineers who are interested in architecting and implementing elegant software solutions and who thrive with the autonomy to propose creative approaches to problems. 

Neuralink strives to be a meritocratic environment: we require honest and transparent communication to ensure the best ideas win out, and we believe the best solutions emerge and the best teams are created when you assemble high-performing individuals and allow them to engage in rigorous and thoughtful inquiry. We want to work with exceptional people, and, to the extent that you excel, we want you to take on more responsibility and help all of us succeed. If this speaks to you, come join us.

Job Responsibilities:

As a Software Engineer on the Brain Interfaces Software Team, your responsibilities will encompass:

• Developing and improving Neuralink’s Implant and Charger SDK
• Maintaining Neuralink’s brain interface software and firmware build tooling
• Developing and improving Neuralink’s Implant manufacturing line acceptance software
• Maintaining Neuralink's Implant design control verification testing software
• Developing and improving Neuralink’s Implant recorder system
• Developing and improving Neuralink’s Implant monitoring system

Required Qualifications:

• Fluent in Python and C or Rust (don’t get hung up on this—being an exceptional software engineer matters above all)
• Experience (and comfortable) with the Linux/Unix systems and command line
• Evidence of exceptional ability in engineering, mathematics, or computer science
• Strong understanding of engineering first principles
• Strong intuition for what matters in a production system (vs. research-grade)

Preferred Qualifications:

• Prior experience developing software for safety-critical systems
  

About You:

• You find large challenges exciting and enjoy discovering and defining problems as much as solving them
• You deliver. You may enjoy thoughtful conversations about problems and perfecting design, but in the end, you know that what matters is delivering reliable solutions. (Our ultimate aim is to help people; the “right” solution doesn’t always achieve that)
• You are mission-driven and goal-oriented in your approach to solving problems
• You feel a sense of urgency to get things done sooner rather than later—because there is so much we, as people, can contribute to the world and accomplish in this life, it’s a shame to waste time
• You are resourceful, flexible, and adaptable; no task is too big or too small

Team Description:

Join the Brain Interfaces Software Team and be part of a team of remarkable and driven engineers accelerating our pathway to human ready brain-computer interfaces. We are a small, but fast-moving team that collaborates with other exceptional teams of mechanical, electrical, and firmware engineers.

Neuralink strives to be, as much as possible, a meritocratic environment: we require honest and transparent communication to ensure the best ideas win out, and we believe the best solutions emerge and the best teams are created when you assemble high-performing individuals and allow them to engage in rigorous and thoughtful inquiry. We want to work with exceptional people, and, to the extent that you excel, we want you to take on more responsibility and help all of us succeed. If this speaks to you, come join us.

Job Description & Responsibilities:

We are looking for a versatile Software Engineer who is passionate about architecting and implementing elegant software solutions and thrives with autonomy to propose creative approaches to problems. You will be responsible for writing software to interact with Neuralink’s implant, as well as building systems for manufacturing and testing the device. Additionally, you will be expected to:

• Develop and improve Neuralink’s implant manufacturing line acceptance software and station
• Develop and improve Neuralink's implant design verification testing software
• Optimize and maintain Neuralink’s implant software build infrastructure
• Develop and improve Neuralink’s implant SDK

Required Qualifications:

• Fluent in Python and at least one system language including Rust, C++, and C (don’t get hung up on this—being an exceptional software engineer matters above all)
• Experience and proficiency with Linux/Unix systems
• Evidence of exceptional ability in engineering, mathematics, or computer science
• Solid understanding of engineering first principles
• Strong intuition for what matters in a production system vs. research-grade environments

Additional Requirements and Competencies:

• You find large challenges exciting and enjoy discovering and defining problems as much as solving them
• You deliver; you may enjoy thoughtful conversations about problems and perfecting design, but in the end, you know that what matters is delivering reliable solutions (Our ultimate aim is to help people; the “right” solution doesn’t always achieve that)
• You are mission-driven and goal-oriented in your approach to solving problems
• You feel a sense of urgency to get things done sooner rather than later—because there is so much we, as people, can contribute to the world and accomplish in this life, it’s a shame to waste time
• You are resourceful, flexible, and adaptable; no task is too big or too small

Team Description: 

The Infrastructure Team builds the foundation that enables the company to operate safely, robustly, and move at light-speed. We run a mixture of cloud-based and on-prem systems and have a user base spanning from highly technically proficient engineers to non-technical scientists and doctors; but all of them need solid systems, rugged networking, and bullet-proof software to do their jobs. This role will integrate tightly with teams across the company, and span all layers of the work environment stack, from deployment of physical hardware on the manufacturing line, to custom tooling to stream neural recordings from implants.

Tech Stack:

• Rust, Python
• Terraform
• Bazel and Nix
• Kubernetes
• GitLab CI
• AWS
• Ubuntu, Fedora

Focus:

• Developing the foundations for teams to build the software and systems required for record-breaking BCI experiences.
• Enhancing developer experience with robust tooling and build-system infrastructure.
• Building foundational infrastructure for HITL (hardware in the loop) testing across firmware, BCI, and robot teams.
• Ground-up infrastructure of on-premise solutions as well as cloud architecture.
• Foundational software engineering with a focus on serving internal software teams.

Qualifications: 

• Experience using IAC tools such as Terraform, Docker, Packer, Ansible, Cloud-Init, Kickstart.
• Working knowledge of compiled languages, ideally Rust, Go, or C/C++.
• Working knowledge of major cryptographic protocols and authentication schemes such as TLS, x509, 802.1x, U2F, SAML.
• Familiarity with modern Linux boot process, UEFI, TPM measured boot, Secure Boot, Systemd.
• Systems administration experience on Windows, macOS, and Linux.
• In-depth understanding of modern networking and common protocols.
• Ability to architect, build, and ship 0 to 1 infrastructure quickly and efficiently.

Team Description: 

The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future. 

Job Description & Responsibilities: 

Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.

• Micro-architecture design and RTL implementation of: 
• Low-power digital signal processors
• Low-power general-purpose hardware accelerators
• Low-power graphics processing units
• Low-power radio MAC/PHY
• Low-power serial link MAC/PHY
• Design and optimization of hardware/software interface with firmware engineers
• Application-specific architecture optimization including:
• Complex system modeling for energy and performance benchmarks
• Workload analysis and modeling
• Energy/performance profiling and analysis
• Leveraging architecture-level design trade-offs with process technology and workload type
• Balancing cost and performance under manufacturing process variation 
• Collaboration on silicon bring-up tests with verification engineers 

Required Qualifications:

• Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience
• Evidence of exceptional ability in electrical engineering, computer science, or computer engineering
• 5+ years of experience in digital design
• Expertise in SystemVerilog, C/C++, Python
• Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools
• Experience in designing digital signal processing pipelines, from algorithm to RTL

Preferred Qualifications: 

• Experience in architecture optimization with process technology customization
• Experience in the verification of complex digital systems, using industry standard tools
• Experience in the physical design of complex digital systems, using industry standard tools
• Experience testing and debugging digital system-on-a-chips
• Functional modeling experience and logic verification with SystemVerilog, SystemC/C++
• Experience automating tool flows
• Experience with embedded design
• Experience in processor instruction set architecture design
• Experience in compiler back-end design and customization

Team Description:

We build the electrical systems that make high-bandwidth brain–computer interfaces possible. This includes neural signal acquisition and stimulation to wireless power delivery, embedded processing, and system integration—all within devices small enough to be implanted in the human body and efficient enough to operate under strict thermal and power constraints. Our work sits at the intersection of analog, RF, digital, and biological systems. Many problems in this space do not present clean abstractions or clear failure modes. Success often depends on careful measurement, iteration, and engineering judgment across multiple interacting systems.

Job Description and Responsibilities:

We are looking for an experienced, hands-on electrical engineer for implant electronics board design, integration with our custom chips, testing, and quality control. You will have the opportunity to contribute to advanced projects, not only work on incremental changes, and be an integral member of a small, fast-moving team. You will be working on all phases of board design (part selection, schematic design, layout, and bring-up) as well as collaborating closely with chip designers, firmware engineers, mechanical engineers, and microfabrication experts for system integration.

• Utilize electrical engineering fundamentals and best system design practices to build on your ability to deliver high-performant, reliable, and manufacturable extremely size-constraint systems
• Gain understanding of all phases of system and board design, from system definition to part selection, schematic design, layout, bring up, and design verification
• Contribute to R&D investigations and experiments to demonstrate feasibility of new technology for the implant and the charger
• Gain experience working cross functionally to ensure successful systems integration
• Contribute to system improvements that decrease latency and increase battery life, reliability, and safety
• Develop ability to design and deploy systems for implant-charger hardware in the loop testing, and manufacturing line quality control

Required Qualifications: 

• Strong EE fundamentals
• Experience designing PCBs for low power and size constrained applications
• Experience with PCB CAD tools (Altium, Eagle, KiCad, Allegro)
• Experience with sensors, power management, and signal/power integrity
• Comfortable with common communication protocols (SPI, UART, I2C, etc.)
• Comfortable with lab equipment (oscilloscope, VNA, etc.)
• Basic C and Python programming skills

Preferred Qualifications:

• Experience with firmware development for embedded systems (C/C++)
• Experience with wireless systems (BLE, WIFI, Zigbee)
• Experience building and bringing-up MCUs or FPGA
• Proficiency with ME CAD tools (Solidworks, AutoCAD)
• Experience with analog circuit design

Expected Compensation:

The anticipated hourly rate for this position is listed below.

California Hourly Flat Rate:
$35/Hr USD

About us

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry.

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone.

Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation.

Job Summary

We are seeking a Staff Hardware Engineer to provide advanced operational, diagnostic, and engineering support for Graphcore’s Arm-based hardware platforms across lab and data center environments.

This role focuses on supporting hardware bring-up, validation, and troubleshooting of complex AI compute platforms, including server blades, racks, and rack-scale infrastructure. The successful candidate will collaborate closely with engineering, platform, and data center teams to ensure the reliability and performance of next-generation AI systems.

The Team

The Systems Engineering and Hardware Engineering teams are responsible for enabling the bring-up, validation, and operational reliability of Graphcore’s AI infrastructure platforms.

The team works closely with server engineering, firmware teams, platform architects, and data center operations to support the development, testing, and deployment of next-generation AI compute systems.

This collaborative environment enables rapid problem-solving and continuous improvement of Graphcore’s hardware platforms from early development through production deployment.

Responsibilities and Duties

• Lead advanced break-fix troubleshooting for server blades, motherboards, power systems, and rack-scale infrastructure.
• Support engineering bring-up activities, including component validation and firmware interaction testing.
• Diagnose system-level failures involving thermal behavior, power anomalies, network configuration, and BIOS/BMC issues.
• Collaborate with server engineering teams to perform root cause analysis and propose corrective actions or design improvements.
• Support deployment and rollout of next-generation hardware platforms through structured validation and qualification cycles.
• Interface with facilities and infrastructure teams to understand environmental factors impacting system reliability.
• Develop and maintain standard operating procedures (SOPs), troubleshooting guides, and validation documentation.
• Provide guidance and mentorship to junior technicians and engineers on troubleshooting methodologies and hardware diagnostics.
• Participate in on-call rotations or off-hours support during critical engineering milestones or hardware bring-up phases.

Candidate Profile

Essential

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline.
• Strong experience with server hardware architectures and board-level debugging.
• Experience analyzing system logs, hardware telemetry, and power/thermal metrics to isolate hardware failures.
• Hands-on experience with HPC systems, AI compute platforms, or rack-scale infrastructure.
• Strong collaboration skills and ability to work effectively in fast-paced engineering environments.
• Excellent written and verbal communication skills.

Desirable

• Experience supporting prototype or pre-production hardware bring-up.
• Familiarity with data center facilities, including liquid cooling and power distribution systems.
• Experience using Python, Bash, or automation tools for hardware validation or troubleshooting.
• Exposure to structured failure analysis and reliability engineering methodologies.

About us

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute.

It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry.

As part of the SoftBank Group, Graphcore is a member of a best-in-class family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone.

Graphcore’s teams are drawn from a diverse group of backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation.

Job Summary

We are seeking a senior validation lead engineer to lead at-scale rack validation efforts for next-generation AI hyperscale systems. This role focuses on post-silicon system validation across the full lifecycle, ensuring functional, electrical, and thermal performance meets product objectives. You will own end-to-end blade and rack validation including planning, development, execution, and debug while collaborating across firmware, systems, and hardware teams.

The Team

The Rack Validation team is responsible for ensuring system readiness and quality at scale. The team works cross-functionally with firmware, silicon, and system engineering teams to validate complex AI compute platforms.

Responsibilities and Duties

• Lead post-silicon validation of AI compute blades and racks including test planning, development, and automation.
• Drive provisioning and integration of system components (SoC FW, BMC, RMC, OS) for rack-level readiness.
• Own execution against program achievements and report validation progress and risks.
• Triage test failures, collect debug data, and collaborate on root cause analysis.
• Track validation coverage and continuously improve test processes and infrastructure.
• Collaborate with ODM/JDM partners on validation and quality.
• Mentor engineers and drive engineering excellence.

Candidate Profile

Essential:

• Bachelor’s or Master’s degree or equivalent experience in Computer Engineering, Electrical Engineering, Computer Science, or related field.
• Proven track record in system, rack, or embedded validation with leadership experience.
• Strong experience in large-scale hardware validation environments.
• Expertise in CPU/GPU, memory, IO, and firmware validation.
• Experience with Linux/server OS and automation using Python/Bash.
• Knowledge of IPMI, Redfish, PLDM.
• Experience with CI/CD pipelines and hardware interfaces.

Desirable:

• Experience in hyperscale environments.
• Familiarity with OpenBMC and processes for verifying firmware functionality.  
• Knowledge of firmware security and HIL testing.
• Experience with test management tools.

About us

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute.

It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry.

As part of the SoftBank Group, Graphcore is a member of a best-in-class family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone.

Graphcore’s teams are drawn from a diverse set of backgrounds and bring a broad range of skills and perspectives.   A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation.

Job Summary

We are seeking a principled and dynamic Lead Systems and Validation Engineer to drive end-to-end system validation for AI compute blade and rack platforms. This high-visibility role focuses on first silicon bring-up, system enablement, and post-silicon validation across hardware, firmware, and software domains. You will lead validation strategy, execution, and debug while collaborating closely with cross-functional engineering teams to deliver high-quality, industry-leading AI systems.

The Team

The Systems Validation team is responsible for enabling and validating Graphcore’s AI compute platforms from first silicon through production. The team works closely with system architects, firmware, silicon, and infrastructure teams to ensure system readiness, scalability, and quality at rack level.

Responsibilities and Duties

• Lead system enablement including first silicon bring-up and integration of firmware and platform components to meet system architecture specifications.
• Develop validation methodologies, lab hardware infrastructure, system software capabilities, and debug tools for blade and rack-level validation.
• Triage and debug issues across bring-up, post-silicon validation, and production phases ensuring timely resolution with high quality.
• Define and own validation test plans, develop test cases, and drive execution across domains such as CPU, GPU, memory, HBM, and IO.
• Drive innovation in validation through development of tools, scripts, and improved methodologies to enhance coverage, efficiency, and quality.
• Enable comprehensive system verification by integrating storage, networking, and infrastructure capabilities within lab environments.  
• Collaborate with multi-functional teams including system architecture, embedded software, hardware build, and ODM partners.    
• Provide technical leadership and mentorship, fostering engineering perfection and continuous improvement.

Candidate Profile

Essential:

• Strong analytical and problem-solving skills with high attention to detail.
• Extensive experience in system validation encompassing initial silicon integration and HW/FW/SW validation.  
• Strong understanding of industry-standard interfaces such as PCIe and CXL.
• Experience enabling storage and networking systems in lab environments for end-to-end validation.
• Deep knowledge of ARM or x86 architectures, SoC design, memory, RAS, and power management.
• Experience with system-level debug, operating systems, BIOS, and device drivers.
• Strong experience with Linux, Windows, and virtualization technologies (VMware, KVM, Hyper-V).
• Excellent communication, organization, and cross-functional collaboration skills.
• Ability to lead multiple workstreams and deliver under tight timelines.
• Experience in technical program management and driving validation initiatives.

Desirable:

• Master’s or PhD in Electrical Engineering, Computer Engineering, or related field.
• Demonstrated ability working on complex system validation and debug in data center or rack-scale environments.
• Experience designing or validating AI/ML rack-scale systems.
• Knowledge of hardware development best practices and industry standards.
• Familiarity with emerging AI and data center infrastructure technologies.
• Experience collaborating with ODM partners globally.

Graphcore is a globally recognized leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialized processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption.   

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin, which will play a central role in Graphcore's work building the future of AI computing. 

About the Role

We are seeking a Storage Architect to design, evaluate, and optimize the high-performance storage architectures powering our AI data centers. In AI training and inference, keeping GPUs fed with data is one of the most critical challenges; even a slight I/O bottleneck can lead to massive inefficiencies. In this role, you will be our resident expert on solid-state storage, focusing heavily on NVMe SSDs, PCIe topologies, and the Linux storage stack. You will ensure our local and distributed storage tiers deliver the microsecond predictable latency and massive throughput required for large language model (LLM) checkpointing, massive datasets, and high-speed data loading pipelines.

RESPONSIBILITIES

• Hardware Qualification: Lead the evaluation, qualification, and lifecycle management of NVMe SSDs (e.g., E1.S, E3.S, U.2/U.3 form factors) from major vendors for use in high-density AI servers and AI Clusters.
• Architecture & Topology: Design and optimize local server storage topologies, managing PCIe lane distribution, minimizing NUMA node crossings, and ensuring optimal data paths between NVMe drives, CPUs, and GPUs.
• Performance Tuning: Conduct rigorous performance profiling and tuning of the Linux kernel storage stack, block layer, and file systems to maximize IOPS and bandwidth while minimizing tail latency (i.e., 99.99%).
• AI Workload Optimization: Optimize storage configurations specifically for AI workloads, including tuning for GPU direct storage to enable direct memory access between NVMe storage and GPU memory, bypassing the CPU.
• Telemetry & Automation: Drive telemetry strategy for the storage subsystem including SSD health monitoring (i.e., wear leveling, DWPD, thermals) and latency anomaly detection. Provide requirements and technical guidance to the automation team building test framework to characterize the storage subsystem in our AI Platforms. Additionally, manage firmware rollouts at scale.
• Troubleshooting: Act as the highest point of escalation for complex, storage-related performance degradation or hardware failures, utilizing tools like nvme-cli, fio, and PCIe analyzers.
• Vendor engagement:  Responsible for working closely with storage vendors, supply chain teams, and our Systems engineering team in the selection and proper deployment of storage components into our AI server fleet. 
• “Futures”:  As a storage architect you will be responsible for scoping the industry for new storage technologies that will give us an advantage on future AI Server designs.
• Storage Control and Dataplane Definition: Storage expert in charge of the definition and architecture of our external storage Data plane and Control plane solutions using leading vendor solutions such as Weka, VAST, Pure Storage, and others. 

REQUIREMENTS

• Bachelor’s, master’s degree or equivalent experience in Information Technology, Computer Science, Computer engineering, or a related field.
• 12+ years of hands-on experience in storage engineering and architecture and 5+ years supporting storage solutions on AI or Hyperscale Datacenters.
• Deep NVMe/PCIe Knowledge: Expert-level understanding of the NVMe protocol, PCIe architecture (Gen 5/Gen 6), NAND flash characteristics, and SSD controller behavior (garbage collection, wear leveling, write amplification).
• Linux Storage Stack: Deep operational knowledge of Linux internals, specifically the block layer, I/O schedulers, direct I/O, and modern local file systems (XFS, ext4, ZFS).
• Performance Profiling: Extensive hands-on experience with benchmarking and profiling tools such as fio, blktrace, iostat, and perf to simulate AI workloads and isolate bottlenecks.
• Scripting: Strong programming skills in Python, JSON, Bash or related scripting languages for building validation scripts, automation pipelines, and interacting with REST APIs.
• Root Cause Analysis: Proven track record of debugging complex hardware/software interactions, including kernel panics, PCIe bus errors, and SSD firmware bugs.
• Telemetry: Point of contact responsible for defining the telemetry sensors and rules to activate alerts in our Datacenter fleet monitoring frameworks.

DIFFERENTIATORS

• GPU Direct Storage (GDS): Experience implementing, testing, and troubleshooting GDS or similar technology for direct GPU-to-storage communication.
• NVMe over Fabrics (NVMe-oF): Experience designing or managing NVMe-oF (RoCEv2 or TCP) deployments to disaggregate storage without sacrificing local-NVMe performance.
• Storage Software Development: Experience with the Storage Performance Development Kit (SPDK) or developing user-space storage applications.
• Distributed AI File Systems: Familiarity with high-performance parallel file systems commonly used in AI/HPC clusters (e.g., Weka, VAST Data, Lustre, DAOS, or DDN).
• Emerging Tech: Knowledge of Compute Express Link (CXL) and its implications for future memory and storage tiering in AI servers.

We welcome people of different backgrounds and experiences and are committed to building an inclusive work environment that makes Graphcore a great home for everyone. We are an equal opportunity employer and want to build a work environment where everyone is happy, productive and respectful so they can do their best work. If you have a disability or additional need that requires accommodation, just let us know.

About us 

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. 

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. 

Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. 

This position is a senior technical engineer role.  The thermal engineer will work in a project team delivering complex AI data center hardware.  Primary responsibility is to ensure the overall product functionality and meet all applicable technical thermal specifications.  The engineer will be responsible for the overall thermal solution, creation of specifications, design review and qualification, and testing and validation.  This role involves deep understanding of thermal management principles, simulation, testing, and collaboration with cross-functional teams to deliver high-performance and reliable server cooling systems. 

Responsibilities: 
Expert in your chosen field, you’ll be responsible for designing, developing, modifying and evaluating the liquid cooling solutions focusing on direct liquid cooling (DLC).  As part of the technical function, you will be responsible in working with select ODM vendors to manage the product thermal specification, development schedule, meet various deliverables, resolve technical issues, and ensure product meets specification, cost and quality goals.  You will be responsible in guiding and directing ODM vendors to deliver thermal designs, implementation, monitor testing, review cost and review technical design information to provide clear directions to ODM.  In addition, you will also be working with third party vendors and suppliers to ensure product features are being achieved.  

REQUIREMENTS

• Bachelor’s, Master’s or Ph. D degrees in mechanical engineering.  Minimum of 10 years of server thermal design experience.  Experience needs to include thermal and acoustics, as it relates to server products.  Experience in system level thermal design focusing on DLC and cold plate cooling heatsink technology as well as system level control logic
• Understanding the basic foundations of thermal fluid dynamics and heat transfer.
• Ability to lead the design and development of liquid cooling solutions. This includes conceptualization, prototyping, simulation, validation, and optimization of heat sinks, cold plates, CDU/CDM, and other liquid cooling components.
• Ability to perform thermal simulations and analyses utilizing industry-standard software (e.g., FlowTherm, ANSYS, COMSOL) to analyze thermal behavior and optimize design for performance and efficiency.
• Ability to develop and execute test plans to validate thermal solutions, ensuring compliance with industry standards and performance goals.
• Experience working closely with system architects, chip and board designers, and software/firmware engineers to integrate liquid cooling solutions into server products.
• Understanding of microprocessor architecture and thermal profiles.
• Understanding of system level thermal design focusing on fan and heatsink technology.
• Experience with system level thermal and fan control algorithm.
• Experience effectively dealing with conflict.
• Communicates well verbally, in writing, and graphically.
• Ability to establish clear goals and formulate plans to achieve them.
• Good root-cause analysis and problem-solving skills.
• Works independently and as part of a team.
• Excited about technology and has the desire to learn new tasks and technologies.

DIFFERENTIATORS

We welcome people of different backgrounds and experiences and are committed to building an inclusive work environment that makes Graphcore a great home for everyone. We are an equal opportunity employer and want to build a work environment where everyone is happy, productive and respectful so they can do their best work. If you have a disability or additional need that requires accommodation, just let us know.

About us 

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. 

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. 

Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. 

Job Summary 

We are seeking an experienced Principal Security Firmware Engineer to design, implement, and validate security mechanisms within embedded firmware and low-level system software supporting Graphcore’s AI compute platforms. 

This role focuses on protecting hardware platforms through secure firmware architecture, trusted boot mechanisms, and secure firmware update frameworks while working closely with hardware, firmware, and security architecture teams. 

The Team 

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. 

The Firmware and Platform Security team is responsible for securing Graphcore’s AI infrastructure platforms across firmware and hardware interface layers. 

The team collaborates with silicon engineering, hardware design teams, firmware developers, and security architects to implement trusted boot chains, secure firmware update mechanisms, and hardware-rooted security capabilities. 

Responsibilities and Duties 

• Design and implement secure firmware architectures for embedded and hardware systems. 

• Develop secure boot, firmware authentication, hardware root of trust, and secure firmware update mechanisms. 

• Define threat models and security requirements for firmware components. 

• Develop and maintain secure embedded firmware using languages such as C, C++, and Rust. 

• Integrate cryptographic libraries and hardware security modules (HSM/TPM). 

• Implement protections against firmware tampering, side-channel attacks, fault injection, and reverse engineering. 

• Perform firmware security assessments, code reviews, and vulnerability analysis. 

• Conduct penetration testing, fuzz testing, and other security validation techniques. 

• Collaborate with hardware teams to integrate chip-level security features. 

• Ensure firmware implementations align with industry standards such as NIST, FIPS, and Secure Development Lifecycle practices. 

Candidate Profile 

Essential 

• Bachelor’s or Master’s degree in Computer Engineering, Computer Science, Electrical Engineering, or related discipline. 

• 5–10+ years of experience in embedded systems or firmware development. 

• Strong programming experience in C and C++. 

• Deep understanding of secure boot architectures and trusted boot chains. 

• Strong knowledge of cryptographic protocols and secure firmware design practices. 

• Experience working with embedded operating systems such as FreeRTOS, Zephyr, or Linux. 

• Experience implementing secure firmware update systems and cryptographic key management. 

Desirable 

• Programming experience in Rust. 

• Experience integrating TPM or hardware security modules (HSM). 

• Experience with static analysis and security tools such as Coverity. 

• Knowledge of secure silicon architectures and trusted execution environments. 

• Experience contributing to open-source firmware security projects. 

Benefits:

In addition to a competitive salary, Graphcore offers a competitive benefits package. We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments. 

About us 

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. 

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. 

Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. 

Job Summary 

We are seeking an experienced Principal Hardware Diagnostics Engineer to design and develop diagnostics software used to monitor hardware health and diagnose system-level issues across Graphcore’s AI infrastructure platforms. 

This role focuses on building diagnostics agents, tools, and analytics frameworks that enable engineers and automation systems to identify, isolate, and resolve hardware issues across blade-level servers and rack-scale clusters. 

The Team 

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption.    

The Systems Engineering and Platform Validation team ensures Graphcore’s AI compute platforms are reliable, diagnosable, and operationally robust at scale. 

The team collaborates with hardware engineering, firmware, cloud infrastructure, and automation teams to develop tools and frameworks that monitor system health, detect hardware failures, and accelerate root-cause analysis across AI clusters. 

Responsibilities and Duties 

• Design and develop automated hardware diagnostics solutions for blade-level servers and rack-scale AI systems. 

• Architect and implement diagnostic agents, monitoring tools, and analytics frameworks to track hardware telemetry. 

• Collaborate with hardware teams to integrate low-level diagnostic modules into monitoring systems. 

• Develop diagnostics tools capable of detecting hardware health conditions and isolating failures. 

• Create diagnostic modules used for internal validation and production data center operations. 

• Provide detailed hardware fault information to system engineers to accelerate troubleshooting. 

• Define remediation workflows and insights for hardware fault scenarios across nodes and clusters. 

• Collaborate with firmware, networking, and cloud platform teams to integrate diagnostics across the system stack. 

Candidate Profile 

Essential 

• Bachelor’s, Master’s, or PhD in Computer Science, Computer Engineering, or related discipline. 

• Strong software engineering experience in Python, C++, or C#. 

• Experience developing diagnostics or monitoring systems for hardware platforms. 

• Experience working with distributed systems or cloud infrastructure. 

• Strong knowledge of Linux environments and system-level diagnostics tools. 

• Experience collaborating with CM/ODM partners on manufacturing diagnostics and fault isolation. 

• Strong analytical and debugging skills. 

• Excellent communication and collaboration abilities. 

Desirable 

• Experience working with AI hardware platforms or accelerator-based computing systems. 

• Familiarity with hyperscale data center infrastructure. 

• Experience building cluster-level monitoring or diagnostics systems. 

• Experience interacting with internal or external customers during diagnostics solution development. 

About us 

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. 

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. 

Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. 

Job Summary 

We are seeking an experienced Hardware Validation Manager to lead the validation of Graphcore hardware platforms from prototype through production release. This role is responsible for defining validation strategies, building and leading a high-performing validation engineering team, and ensuring our hardware products meet electrical, functional, and reliability targets across all development phases. 

The successful candidate will combine deep technical expertise in hardware validation with strong leadership, cross‑functional collaboration, and program execution to deliver high‑quality products at scale. 

The Team 

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption 

The Hardware Validation team ensures Graphcore’s AI hardware platforms meet performance, quality, and reliability targets before production release. Working closely with silicon, board design, system architecture, firmware, and manufacturing teams, the group develops and executes validation strategies across development phases. 

The team plays a critical role in bridging design and production by identifying issues early, driving root cause analysis, and enabling robust, production‑ready hardware platforms. 

Responsibilities and Duties 

• Define and implement board and multi-board hardware validation plans across Proto, EVT, DVT, and PVT phases. 

• Develop and execute validation strategies covering electrical, functional, and system-level requirements. 

• Ensure validation coverage aligns with product specifications, customer requirements, and industry standards. 

• Drive root cause analysis and corrective actions for hardware validation failures. 

• Build, mentor, and manage a team of hardware validation engineers. 

• Collaborate with hardware design, silicon, firmware, and manufacturing teams across the product lifecycle. 

• Establish validation milestones and deliverables aligned with program schedules and product release goals. 

• Drive improvements in validation methodology, tooling, automation, and data analysis. 

Candidate Profile 

Essential 

• Bachelor’s or Master’s degree in Electrical Engineering or related field. 

• 10+ years of experience in board-level hardware validation, system testing, or product validation. 

• 3+ years of experience leading engineering teams. 

• Strong understanding of hardware development lifecycle (Proto, EVT, DVT, PVT). 

• Experience with lab instrumentation such as oscilloscopes, spectrum analyzers, and power analyzers. 

• Proven track record delivering hardware products from prototype through production. 

• Strong analytical and problem-solving skills with experience driving root cause investigations. 

Desirable 

• Experience influencing validation requirements during architecture and schematic phases. 

• Experience embedding validation hooks and testability features into hardware designs. 

• Experience implementing automated hardware regression testing. 

• Familiarity with data pipelines, dashboards, and validation data analytics. 

• Experience validating multi-board systems and high-speed interfaces (PCIe, DDR, SerDes). 

• Experience working with power-dense or high-performance compute systems. 

About us 

Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. 

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. 

Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. 

Job Summary 

We are seeking an experienced AI HW Systems Engineering and Debug Lead to drive system-level debug and bring-up activities for Graphcore’s next-generation AI data center platforms. 

The successful candidate will lead complex debug efforts across hardware, firmware, and software layers for blade and rack-level systems. This role focuses on developing scalable debug strategies, improving debug throughput, and ensuring timely resolution of system-level issues throughout the product lifecycle. 

The Team 

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption 

The Systems Engineering and Validation team ensures Graphcore’s AI compute platforms are fully validated, debugged, and ready for deployment in hyperscale data center environments. 

The team collaborates closely with silicon engineering, system architecture, firmware, operating system, and rack integration teams to identify and resolve system-level issues and drive improvements in validation and debug methodologies. 

Responsibilities and Duties 

• Own and develop AI systems debug methodology and system bring-up strategies for next-generation AI data center platforms. 

• Lead system-level debug and root cause analysis for issues identified during server rack validation, post-silicon validation, and production phases. 

• Drive complex debug efforts across silicon, hardware platforms, firmware, operating systems, and software stacks. 

• Manage and track technical issues, risks, and priorities to ensure program milestones are achieved. 

• Publish debug program indicators and metrics to identify roadblocks and improve debug throughput. 

• Coordinate cross-functional teams including system architecture, silicon, firmware, and validation teams to resolve system-level issues. 

• Lead development and integration of debug tools, scripts, and methodologies to improve debug efficiency. 

• Communicate program status, risks, and technical findings to engineering leadership and stakeholders. 

Candidate Profile 

Essential 

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related discipline. 

• 15+ years of experience working on complex systems engineering challenges involving HW/FW/SW debug in server or data center environments. 

• Proven experience leading validation and debug for board, blade, and rack-level hardware platforms. 

• Strong experience debugging OS, firmware, silicon, and hardware issues. 

• Understanding of industry-standard system buses such as PCIe and CXL and their software stacks. 

• Strong knowledge of ARM or x86 CPU architectures, SoC design, memory systems, and power management. 

• Experience with system architecture, validation strategies, and complex system debug methodologies. 

• Strong collaboration, communication, and cross-team coordination skills. 

Desirable 

• Experience designing or deploying AI/ML rack-scale systems. 

• Experience developing at-scale debug methodologies for hyperscale data center systems. 

• Familiarity with data center infrastructure and emerging AI hardware technologies. 

• Experience with rack integration testing and hyperscale deployment readiness. 

• Knowledge of automated validation frameworks, test analytics, and continuous validation practices. 

Position Overview

We are seeking a specialized RF & Control Systems Engineer to design, develop, and validate the tracking algorithms and control systems for our satellite and ground station antennas.

Key Responsibilities:

• Collaborate with antenna vendors to define control interfaces and validate tracking performance.
• Design and simulate antenna control loops and tracking algorithms using tools like MATLAB/Simulink.
• Develop and test embedded software/firmware for Antenna Control Units (ACUs).
• Support the integration and testing of the complete tracking system in the lab and in the field.

Qualifications

Education:

Master’s degree in electrical, mechatronics, or computer engineering.

Experience:

A minimum of 3 to 5 plus years in control systems or embedded software development for RF applications.

Preferred Qualifications:

• Experience with real-time operating systems (RTOS).
• Familiarity with satellite tracking techniques (e.g., monopulse, step-track).

Soft Skills:

• Adaptability & Resilience
• Proactive Problem-Solving
• High-Impact Communication
• Collaborative & Mission-Focused
• Commitment & Drive.

Technology Stack:

• Matlab, Simulink
• Python
• Linux
• Windows, Microsoft Office Suite

Physical Requirements

• Ability to work in a standard office environment and use a computer for extended periods.
• This is a location-flexible position. The role requires the ability and willingness to travel internationally to support key project milestones, vendor engagements, and on-site integration activities as needed.

This job description may not be inclusive to the duties and responsibilities listed. Additional tasks may be assigned to the employee from time to time or the scope of the job may change as needed by business demands. 

Site Automation Lead

Onsite | Plano, Texas
Salary, Exempt | $55k + Equity
Preference given to candidates with open schedule and on-call availability

Fulfil is redefining the grocery supply chain through advanced robotics and automation. Backed by world-class investors and led by a seasoned team, we are hiring a Site Automation Lead to provide operational coverage for our automated high speed grocery fulfillment system. In this role, you’ll serve as the bridge between partner operations, maintenance, and Fulfil engineering — ensuring safe, reliable, high-performance system operation.

Unique opportunity: Pre-launch, take part in site deployment, from bring-up and commissioning, through partner handover and site acceptance testing, into full production.

Requirements: Open availability from May through November, with a standardized production schedule in place by Q4 2026.

What You’ll Do

System Monitoring & First-Level Diagnostics

• Monitor daytime performance and conduct health checks of Fulfil’s robotic automation systems.
• Perform Tier-1 troubleshooting; triage issues, complete minor interventions as needed (e.g., sensor checks, part swaps, clearing obstructions), and support investigations and post-mortems.
• Support maintenance by documenting issues clearly and handing off higher-complexity work.

Operational Leadership

• Act as the on-call technical and operational escalation point for partner teams.
• Make real-time decisions that balance system uptime, safety, and production needs.
• Track and report reliability metrics to contribute toward achieving uptime goals.
• Ensure a safe operating environment through routine audits and adherence to procedures.
• Own scheduling, team coordination, site preparedness, and operator skill development.
• Maintain and update operational documentation for production processes and human-machine interaction.
• Accountable for weekly ticket management and reporting of site performance.
  
  

Cross-Functional Collaboration

• Communicate system behaviors and findings to robotics, firmware, software, and product engineering teams.
• Participate in structured testing, validation, and rollout of new features and hardware.
• Contribute to root-cause investigations and provide actionable feedback to engineering.
• Help refine operating procedures and support continuous improvement initiatives.
• Provide steady, high-confidence technical support to onsite partner operators.

What We’re Looking For

• Experience in robotics, automation, industrial equipment, technical field support, or similar environments.
• Strong mechanical/electrical aptitude and comfort working hands-on with hardware.
• Safety first mentality, adhering to OSHA guidelines while prioritizing a safe work environment.
• Clear communicator with ability to explain complex system behavior simply.
• Calm, detail-oriented decision-maker who performs well under pressure.
• Comfortable using dashboards, logs, and diagnostic tools; experience with metric reporting.
• Reliable, self-motivated, and able to operate with a high degree of ownership.
• Flexible schedule — preference for candidates with open availability.

Bonus Experience (Not Required)

• Exposure to warehouse automation, robotics platforms, PLCs, or industrial systems.
• Familiarity with Linux, telemetry tools, firmware process flows, or diagnostics.
• Experience supporting deployments, pilots, commissioning, or on-call rotations.
• Experience with tools like Slack, Jira, Excel, or digital workflow platforms.

What You’ll Get

• Early-stage exposure to a fast-scaling robotics company.
• Salary + equity in a mission-driven organization.
• Full medical, dental, vision, and 401(k) benefits.
• The salary range for this position is $50,000 - $60,000 plus stock and benefits. Pay within the range is based on candidate experience, job-specific skills, education, and work location.
• A supportive, high-ownership operational culture.

Opportunities to work closely with engineering

At Tenstorrent, you will have the chance to accelerate your career by working on challenging engineering problems with a dedicated mentor and the opportunity to move between the digital design, verification, firmware, software and system engineering teams.   

This role is hybrid based in Austin, TX

Responsibilities:

• Develop machine learning graph compiler 
• Participate in the co-design of Tenstorrent's hardware and software stack 
• Benchmark, analyze, and optimize performance of key machine learning applications across Tenstorrent's hardware and software stack 
• Develop performance analysis and estimation infrastructure that feeds into Tenstorrent compiler 
• Develop high-performance run-time engine 
• Integrate the Tenstorrent software into leading machine learning frameworks 
• Work closely with machine learning engineers to discover the hardware and software requirements of current and future machine learning applications 
• Develop novel ML models and primitives that take advantage of Tenstorrent’s breakthrough architecture to deliver orders of magnitude performance & efficiency improvements 

Experience & Qualifications:

• Final year BS/MS or PhD candidate in EE/ECE/CE/CS with a strong GPA
• Experience with algorithms, data structures, and software development in C/C++. Python expertise is welcome as well 
• Familiarity with and passion for any of the following -- machine learning, compilers, parallel programming, high-performance and massively parallel systems, processor and computer architecture -- is a plus 
• Strong problem solving and analytical skills

Our Tensix team is building custom AI compute cores, RISC-V CPUs, and chiplet-based architectures for datacenter, edge, and automotive AI. Design Verification Engineers on this team validate compute IP and subsystems and build scalable DV infrastructure to keep verification fast, automated, and production-grade.

This role is hybrid, based out of Toronto, ON or Austin, TX.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• Experienced in modern verification methodologies with strong SystemVerilog skills and exposure to structured testbench development.
• Comfortable working from block-level to system-level verification and reasoning about microarchitecture behavior from specs and waveforms.
• Proficient in Linux environments with Python, or Bash scripting for automate builds, parse logs, manage CI pipelines.
• Skilled in coverage-driven verification and confident debugging across RTL, testbench, and workload scenarios.
• Motivated by AI hardware and eager to learn verification strategies for new architectures and domains.

What We Need

• Contribute to verification of Tensix IP and subsystems from early planning through tape-out, owning coverage goals and driving them to closure.
• Build and maintain reusable verification environments, agents, scoreboards, and supporting infrastructure in SystemVerilog and Python.
• Develop constrained-random and directed tests and close functional, code, and assertion coverage using data-driven approaches.
• Debug complex issues across RTL and testbench while collaborating with design, firmware, compiler, and architecture teams.
• Help evolve DV infrastructure including regression flows, CI/CD integration, EDA compute environments, and reproducible setups.

What You Will Learn

• How Tenstorrent verifies AI-native compute architectures including Tensix cores, RISC-V CPUs, matrix units, vector units, and datapath.
• How simulation, emulation, and software-driven workloads combine to validate both functional correctness and performance.
• How numerical precision formats such as BF16, FP4, and INT8 and on-chip dataflow impact verification complexity and coverage strategy.
• How to build scalable DV infrastructure across hybrid compute environments including containerized regression systems.
• How data analytics and modern AI tooling can enhance verification workflows and accelerate convergence.

We are seeking an IP Software Generalist to develop and optimize the software stack for our IP customers, enabling them to successfully integrate our AI and RISC-V hardware into their systems. In this role, you will build and support a versatile range of software components, from bare-metal firmware and drivers to system-level tools and APIs, ensuring a seamless customer experience. You will partner closely with hardware engineering, IP delivery, customer support, and product teams to deliver robust, scalable, and high-performance software solutions tailored to diverse customer architectures. Success in this role requires adaptability, strong system-level debugging skills, and the ability to bridge the gap between complex hardware IP and user-friendly software integration.

This role is hybrid, based out of Austin, TX; Toronto, ON; or Santa Clara, CA.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• Experienced software engineer with a strong foundation in C/C++, system programming, and low-level software design.
• Background in firmware, device drivers, embedded systems, or hardware-software co-design.
• Skilled at navigating and troubleshooting complex, full-stack software environments.
• Known for working effectively with cross-functional teams and external customers to resolve integration challenges.
• Able to balance versatile, hands-on coding with high-level architectural problem-solving.

What We Need

• Develop, optimize, and maintain software components for Tenstorrent’s hardware IP offerings.
• Define and build reference software, SDKs, and toolchains to streamline the customer integration process.
• Diagnose and resolve complex hardware/software interaction issues during customer bring-up and deployment.
• Drive the creation of high-quality documentation, test suites, and integration guides for IP software deliverables.
• Partner cross-functionally with hardware and architecture teams to ensure future IP designs are optimized for software usability.

What You Will Learn

• How to build and deploy robust software stacks for cutting-edge AI and RISC-V silicon IP.
• How to drive successful hardware-software integration across a diverse range of customer environments and architectures.
• Firsthand exposure to the complete silicon IP lifecycle, from initial bring-up to massive-scale customer deployment.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Join our innovative team as a Director, Systems & Solutions where you'll play a pivotal role in deploying and optimizing cutting-edge computer systems and AI hardware. If you have a passion for hardware technologies, including accelerators, CPUs, GPUs, and thrive in a dynamic, hands-on technical environment, we would love to hear from you. In this role you will be leading a team and helping us scale our customer base.

This role is hybrid, based out of Santa Clara, CA; Austin, TX or Toronto, ON.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• A hands-on manager with a deep understanding of computer systems and AI hardware, driven by curiosity and a passion for performance.
• You’re comfortable getting into the technical details - from CPU and GPU architecture to firmware and drivers and thrive in dynamic, hands-on environments.
• You excel at problem solving and enjoy working directly with customers to implement and optimize advanced computing solutions.
• You communicate clearly, collaborate effectively across teams, and take pride in delivering reliable, high-quality systems.
• You’re motivated by impact - eager to see your work come to life in the next generation of AI and high-performance compute deployments.

What We Need

• Strong experience with computer hardware and system architecture, including CPUs, GPUs, FPGAs, and AI accelerators.
• Deep understanding of Linux operating systems, with experience in configuration, performance optimization, and administration.
• Proficiency in system software, including drivers, firmware, and related hardware-level tools.
• Working knowledge of electrical systems, including wiring, cabling, and thermal management.
• The ability to travel up to 50% of the time both domestically and internationally. 

What You Will Learn

• How to deploy, validate, and optimize AI compute systems at scale across diverse customer environments.
• End-to-end exposure to hardware-software integration, from firmware and drivers to full system bring-up.
• Hands-on experience with accelerator-based architectures and cutting-edge hardware design.
• Collaboration with world-class engineering teams building open, high-performance systems based on RISC-V and modular chiplet architectures.
• The opportunity to directly shape how customers adopt and scale next-generation AI and HPC hardware, helping push the boundaries of performance and efficiency.
  
  

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

We are seeking a junior-to-mid level SOC Emulation Engineer to support our hardware emulation infrastructure and internal chip design teams. This role focuses on integrating vendor and custom hardware transactors, developing Python-based test frameworks, and providing technical support to emulation users across multiple chip projects.

This role is hybrid, based out of Santa Clara, CA or Austin, TX.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• Background in Electrical/Computer Engineering or Computer Science with 1-3 years of experience in chip design, verification, or emulation.
• Proficient in Python for automation and test development, with a working knowledge of C++ and the ability to navigate SystemVerilog RTL.
• Skilled at using modern AI tools (Claude, ChatGPT, Copilot) to accelerate code generation, debugging, and documentation analysis.
• Energetic about supporting diverse teams, from high-level software to low-level firmware, to solve complex runtime and build issues.

What We Need

• Ability to integrate vendor and custom transactors into RTL testbenches while handling clock domain and tri-state resolution.
• Experience building Python APIs (using pybind11) and maintaining CMake-based compilation flows for emulation libraries.
• Solid understanding of standard chip interfaces, bus protocols, and hardware synchronization (resets/clocking).
• A commitment to triaging and debugging the full stack, spanning from Python tests and C++ bindings down to hardware.

What You Will Learn

• Deepening your expertise with world-class platforms like Synopsys Zebu for massive-scale silicon validation.
• Gaining a holistic view of chip development by bridging the gap between hardware RTL and software drivers.
• Building and optimizing large-scale emulation build and run tooling for high-performance engineering teams.
• Refining your ability to gather requirements and facilitate communication between hardware designers and software engineers.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Scope

Ambiq is seeking an Edge AI Firmware Engineer to build and optimize the embedded software stack that powers real-time, battery-powered on-device AI. You will develop Ambiq’s AI runtimes, performance-critical operator libraries, and profiling/debug tooling that enable customers to deploy efficient inference on resource-constrained devices.

While the cloud has been the default home for AI, the next frontier is distributing intelligence everywhere—directly onto real-world devices. Edge AI enables real-time responsiveness, stronger privacy, lower bandwidth cost, and reliable operation even without connectivity. This role helps accelerate the shift to on-device intelligence across a rapidly growing ecosystem of health and fitness wearables, smart glasses, industrial IoT, and always-on sensors.

You’ll work closely with platform, silicon, and applied ML teams—and directly with customers—to ensure our software extracts maximum performance and energy efficiency from Ambiq hardware while remaining easy to integrate into production embedded toolchains.

Responsibilities 

• Develop and support Ambiq’s embedded AI runtimes (HeliaRT—our fork/extension of TensorFlow Lite for Microcontrollers—and HeliaAOT) with focus on portability, correctness, performance, and usability.
• Implement and optimize ML operator kernels and embedded libraries for on-chip acceleration (DSP, vector, NPU), including HeliaDSP and HeliaCore components.
• Build and maintain on-device profiling and performance analysis tools, including converting PMU counters into actionable insights.
• Drive improvements in latency, memory footprint, and energy (e.g., joules/inference) through compute/bandwidth and memory-hierarchy analysis.
• Develop benchmark harnesses, microbenchmarks, and regression tests to ensure numerical correctness and prevent performance regressions.
• Enable seamless customer integration across embedded environments and toolchains (bare metal, FreeRTOS, Zephyr).
• Improve memory planning/runtime efficiency and manage upstream/fork health; publish and maintain customer-facing assets (docs, guides, examples, benchmarks).

Qualifications 

• BS in Electrical/Computer Engineering, Computer Science, or related field + 5+ years relevant experience (or equivalent practical experience). MS is a plus, especially in embedded systems, compilers, computer architecture, or ML systems.
• Strong experience designing, developing, and testing embedded software in C/C++.
• Strong debugging discipline with an emphasis on correctness, reproducibility, and performance regression prevention.
• Solid understanding of compute, memory, and bandwidth/cache effects on deterministic latency and energy efficiency in constrained systems.
• Ability to interpret hardware/software documentation (datasheets, reference manuals; schematics a plus).
• Proficiency with Git (or equivalent version control).
• Efficient use of AI-assisted development tools to improve productivity while maintaining engineering rigor.
• Experience with embedded development workflows: Arm toolchains, GDB + J-Link/SEGGER-class probes, and CMake/Make build systems.

Nice to have:

• Python for profiling/analysis tooling, automation, and developer utilities.
• Rust experience.
• Familiarity with TensorFlow Lite for Microcontrollers (or similar embedded inference runtimes).
• Experience optimizing for embedded acceleration targets (e.g., DSP, vector extensions, NPU).
• Familiarity with CMSIS-NN, CMSIS-DSP, and/or Vela (or similar).
• Working knowledge of quantized inference (e.g., int8, per-channel) and embedded debugging implications.
• Packaging/integration (e.g., CMSIS-Pack/CPM.cmake) and/or lab measurement experience (power/debug with basic bench tools).

Must be currently authorized to work in the United States for any employer. We do not sponsor or take over sponsorship of employment visas (now or in the future) for this role.

Austin is home to Optiver’s hardware research, development, and manufacturing group. We build some of the world’s most competitive trading hardware—high-speed, high-density systems that push the limits of performance, reliability, and manufacturability.

We’re growing fast and looking for a Manufacturing Test Engineer focused on PCBA test development and deployment. You’ll own board-level test solutions from early prototypes through volume production—building fixtures, developing automation, driving debug, and partnering closely with contract manufacturers and our internal EE/ME/FPGA/firmware teams.

We’re a small, highly technical team, and this role comes with real autonomy: you’ll have the runway to improve how we do test, raise the bar on factory readiness, and build scalable processes as our hardware footprint grows.

Who we are

Optiver is a tech-driven trading firm and leading global market maker. As one of the oldest market making institutions, we are a trusted partner of 70+ exchanges across the globe. Our mission is to constantly improve the market by injecting liquidity, providing accurate pricing, increasing transparency and acting as a stabilizing force no matter the market conditions. With a focus on continuous improvement, we participate in the safeguarding of healthy and efficient markets for everyone who participates.

Based in ‘The Domain’ neighborhood, Optiver’s Austin office serves as the firm’s innovation nucleus, with a strong focus on quantitative research, software and hardware engineering initiatives. With tech innovation an integral part of our core business, the booming city proved an ideal backdrop for our heavy investment into machine learning, research infrastructure and big data computing. What’s more, with world-class music, food and art scenes, as well as countless scenic outdoor activities, the quality of life for Austin Optiverians is second to none.

What you’ll do

• Own PCBA manufacturing test strategy across the product lifecycle:
• EVT/DVT/PVT → ramp → sustaining
• coverage definition, limits/thresholds, logging, and yield monitoring
• Design and build PCBA test fixtures spanning:
• ICT & Functional verification test (FVT)
• Burn-in / reliability screening
• Final assembly tests (FATP)
• System interoperability testing
• Develop automated test software with strong emphasis on Python scripting, maintainability, and scalability
• Partner with contract manufacturers to deploy tests on the line, train vendor teams, and drive continuous improvement.
• Drive DFT/DFM feedback into design reviews with EE and ME teams
• Define and maintain test documentation:
• Test plans, work instructions, golden unit strategy, calibration/maintenance procedures, and acceptance criteria.
• Use modern tooling (including AI-assisted workflows where helpful) to speed up debug, log triage, and documentation—without compromising repeatability and traceability.
• Travel periodically to supplier sites to support NPI builds, line bring-up, and ramp

Who you are

Requirements

• BS in Electrical Engineering, Computer Engineering, or related discipline.
• 3+ years of industry experience
• Strong Python skills: automation, hardware I/O, parsing logs, data analysis, packaging/CI practices.
• Ability to understand register maps and leverage HALs for creation of test scripts
• Proficient ECAD skills to develop schematics and oversee layout work: Altium, Mentor Graphics, Cadence or equivalent.
• Hands-on experience developing and deploying manufacturing PCBA tests in a production environment.
• Comfortable with hardware debug using scopes, DMMs, logic analyzers, protocol analyzers; strong troubleshooting instincts.
• Experience working with contract manufacturers and external vendor engineering teams, including clear communication and escalation management.

Nice to have

• Familiarity with FPGA prototyping and basic RTL concepts (enough to support debug/bring-up and test hooks).
• Familiarity with C and/or C++ for embedded firmware development
• Experience with high-speed digital board debug (clocking, SERDES links, power sequencing, SI/PI-related failure modes).
• Solidworks familiarity.

What you’ll get:

• Work alongside best-in-class professionals from over 40 different countries.
• Performance based bonus structure that is unmatched anywhere in the industry. We combine our profits across desks, teams and offices into a global profit pool fostering a truly collaborative environment to work in.
• Ownership over initiatives that directly solve business problems.  

Alongside this you will get great other benefits such as 25 paid vacation days and market holidays, fully paid health insurance, daily breakfast and lunch, training opportunities, 401(k) match up to 50% and charitable match opportunities, regular social events and clubs, and many more.

At Optiver, we are committed to creating a diverse and inclusive environment of mutual respect. Optiver recruits, employs, trains, compensates and promotes regardless of race, religion, color, sex, gender identity, sexual orientation, age, physical or mental disability, or other legally protected characteristics. 

PURPOSE OF POSITION

The Service Engineer is responsible for maintaining utility and commercial inverters, PV Solar equipment, and customer site equipment at an assigned onsite location. This is a full-time, onsite-only role based at a utility-scale solar site in Needville, TX. Candidates must reside within one hour of the site (102 J C Wicks, Needville, TX 77461).

PRIMARY DUTIES / RESPONSIBILITIES

• Commissions, troubleshoots, repairs, and analyzes utility and commercial inverters, PV Solar equipment, and customer site equipment in the field.
• Performs DC tracker system maintenance, panel replacement, substation switching, site inspections, and inverter system operations.
• Operates heavy equipment as required by site conditions and scope.
• Develops a detailed knowledge of SMA's and other utility and commercial inverter products, associated PV accessories, site equipment, and third-party accessories installed at the customer site.
• Maintains a working knowledge of applicable National Electric and Electrical Safety Codes (NEC, NFPA70E, NESC, OSHA).
• Regularly works with high voltage DC electricity, low and medium voltage three-phase power, SCADA or third-party monitoring, and the relevant software and firmware of inverter and site equipment.
• Performs O&M activities across the full scope of the site — not limited to inverter work.
• Maintains a high level of customer satisfaction.
• Other duties may be required or assigned.

REQUIRED RELEVANT PROFESSIONAL EXPERIENCE

• At least 2 years of experience in PV Solar and/or PV Solar O&M.
• At least 3 years of experience in electrical, electronic, and/or network communications are required.
• O&M field experience strongly preferred; back-shop or shop electrical backgrounds also considered.
• California Electrical License or Electrical Contractors license preferred.
• NABCEP Certification is strongly preferred.
• An associate's degree or equivalent years of service in a technical field is strongly preferred.

OTHER SPECIALIZED SKILLS

• Knowledge of solar and/or alternative energy markets is preferred.
• Knowledge of National Electric Code(s) and Electrical Safety Code(s) is preferred.
• Excellent verbal and written communication skills are required.
• Proficiency in the English language, both written and verbal, is required. German and/or Spanish language skills are a plus.
• Proficiency with Microsoft Office Suite (Word, PowerPoint, and Excel) is required.
• Attention to detail and a high level of accuracy are required.
• Ability to analyze and solve problems effectively.
• Ability to work from heights, on ladders, or lift equipment. Forklift experience a plus.
• On-call availability required; daily onsite presence is expected.

WE OFFER

• Compensation range: $30.00 – $31.50 per hour, dependent upon experience.
• Comprehensive benefits including health, dental, and vision coverage (including $0 premium options).
• Work Location: This is a full-time, onsite-only position. Candidates must reside within one hour of the site in Needville, TX. Remote work is not available for this role.
• 401(k) plan with company match.
• Opportunities for professional development and training.
• Inclusive, collaborative, and innovative work environment.

What we’re doing isn’t easy, but nothing worth doing ever is. 

We envision a future powered by robots that work seamlessly with human teams. At Diligent Robotics, we build artificial intelligence that enables service robots to collaborate with people and adapt to dynamic, human-filled environments.

Diligent is one of the only companies in the world operating a production fleet of mobile manipulation robots in real environments. Every day, our robots work alongside hospital staff, generating the real-world data needed to advance the next generation of Physical AI. Building robots that operate reliably in these environments requires exceptional systems engineering across hardware and software.

As a Systems Software Engineer – Robotic Platform, you will own and guide development of the core robot platform, from firmware on peripheral devices to the Linux configuration that runs the robot’s compute stack. You’ll build robust drivers and interfaces for sensors, improve system reliability, and help the organization prototype and integrate new sensing and hardware for next-generation robots.

Your work will form the foundation on which autonomy, perception, and applications are built, ensuring our robots operate reliably at scale in real-world deployments.

Responsibilities

• Own and evolve core robot system foundations: device firmware interfaces, low-level drivers, Linux configuration, and deployment reliability
• Build and maintain robust sensor drivers and hardware interfaces with clear contracts and strong observability
• Lead efforts around sensor calibration, time synchronization, and data integrity across heterogeneous devices
• Improve reliability and reproducibility of system builds and deployments (e.g., containerization, deterministic builds, provisioning)
• Maintain system-level documentation and operational playbooks to improve debuggability and reduce time-to-fix
• Partner with autonomy/platform teams to ensure the system meets latency, throughput, and reliability requirements
• Contribute to architecture decisions that improve modularity, maintainability, and long-term scalability of the robot platform

Basic Qualifications

• Undergraduate or graduate degree in Robotics, Computer Science, Electrical Engineering, or related field.
• 5+ years of professional software engineering experience, ideally in robotics, autonomous vehicles, or other complex cyber physical systems
• Experience with sensor calibration and sensor time synchronization
• Comfort with basic networking concepts relevant to robotic systems (latency, bandwidth, protocols, debugging)
• Experience with Linux-based IoT/robot deployments, including OTA or fleet update patterns in a Linux context
• Experience with reproducible build systems and environments (Docker, Nix, or similar)
• Bonus: experience with robot software stacks, ROS, controls, or on-robot performance/debugging

This role will be on-site 5 days a week in NW Austin.  Must have the right to work in the US without visa sponsorship now or in the future. 

Scope

As the Software Architect at Ambiq, you will drive the software architecture and requirements for our latest family of low-power Edge AI MCUs.  As a Software Architect, you will be working closely with our SoC hardware architects, product marketing, and our IP vendors to develop solid functional allocations and requirements for our software development and system test teams.  The role will cover the areas of multi-processor communications, data movement acceleration, virtual memory management, dynamic resource allocation, power optimization, and debug tools.  You will be embedded into Ambiq’s software development teams as the subject matter expert for the duration of the product development.   

The successful candidate will have extensive experience in the early-stage software development process.  The candidate must have strong experience in embedded software programming on ARM Cortex-M processors using RTOS.  They must be familiar with methods for functional allocation, requirements traceability, Software Requirement Specification content, and make vs. buy analysis for commercial and open-source software.  

Responsibilities 

• Requirements analysis based on disparate and preliminary information from SoC hardware architecture team, product marketing, other software architects, and software development teams resulting in contributions to a software requirements specification for the device. This should include any software prototyping required to refine the architectural understanding and requirements. 
• Working closely with our field, product marketing, and system test teams to understand our Alpha customer use cases and their impact on requirements and testability. 
• Engaging during the software implementation and test phases to review designs, test plans, code, and test case results as a SME for certain aspects of the SoC software architecture. 
• Support performance and power optimization of the areas for which you are responsible. 
• Define and enforce architectural standards, guidelines, and best practices. 
• Collaborate with cross-functional teams to align architectural decisions with overall business objectives. 
• Diagnose and resolve complex technical issues and recommend trade-offs between software and hardware implementations. 
• Collaborate effectively with cross-functional teams to achieve project goals. 
• Mentor and guide junior team members. 

 Qualifications 

• A Bachelor's of Science or Master's in Electrical Engineering, Computer Engineering, or Computer Science. 
• 12+ years of experience developing embedded software for real-time environments (bare metal and RTOS). 
• Experienced in code development in C/C++ and assembly language for embedded targets using ARM Cortex-M processors. 
• Experience in writing software requirements specifications with an eye towards customer use cases, derived software requirements, and testability on FPGA-based emulation platforms, as well as full system reference designs. 
• Experience with asymmetric multicore systems and control/data plane interaction, including inter-processor communication via remote processor messaging frameworks (e.g., OpenAMP or RPMsg). 
• Experience with general-purpose data movement engines, memory management units, memory protection, L1/L2 caches, shared memories, and dual-port memories. 
• Experience in power optimization for embedded systems is desirable. Familiarity with voltage and frequency scaling, clock gating, sleep/wake cycles, and low-power modes of processors and peripherals.
• Familiarity with at least one MCU IDE on Windows from ARM/Keil, IAR, Eclipse, or others. 
• Familiarity with Trust Zone for M-Class microcontrollers and/or Trusted Firmware for microcontrollers is preferred. 
• Experience with Graphics, Display and Audio/Video processing in embedded systems preferred. 
• The candidate must be able to independently manage assigned tasks, prioritize workload, and meet deadlines with minimal supervision. Proactive problem-solving skills and the ability to seek clarification when needed are essential. 

Austin, TX – Onsite (5 days/week)
U.S. Work Authorization Required (No Sponsorship Available)

Architect the Software Foundation for Ultra-Low-Power Edge AI Silicon

Ambiq designs and ships ultra-low-power Edge AI MCUs that enable real-time intelligence directly on device.

We are expanding our Austin engineering organization and hiring a Principal Embedded Software Architect to define the software architecture and requirements for our next-generation Edge AI MCU platforms.

This role sits at the hardware/software boundary — partnering directly with SoC architects, product teams, IP vendors, and embedded software leaders to shape how our silicon is exposed, controlled, optimized, and validated.

You won’t just write code.
You will define how the system behaves.

What You’ll Own

As Principal Architect, you will:

• Define the software architecture for next-generation low-power Edge AI MCUs

• Drive early-stage functional allocation between hardware and software

• Develop and refine Software Requirements Specifications (SRS) tied to real customer use cases

• Lead architectural decisions across:

  • Multi-processor communication

  • Control/data plane separation

  • Data movement acceleration

  • Memory management and protection

  • Dynamic resource allocation

  • Power optimization strategies

  • Debug and visibility tooling

• Partner with SoC architects to influence hardware/software trade-offs

• Support software prototyping to validate architectural decisions

• Act as architectural SME through implementation, validation, and bring-up phases

• Review designs, test plans, and implementation details to ensure alignment with architectural intent

• Mentor engineers and define best practices across embedded teams

This is a high-impact architectural role influencing multiple MCU generations.

Technical Environment

You will work deeply across:

• ARM Cortex-M architectures

• Bare metal and RTOS-based systems

• Asymmetric multi-core systems

• Inter-processor communication (OpenAMP, RPMsg, etc.)

• Data movement engines and acceleration blocks

• MMU/MPU, caches, shared memory, dual-port memory

• Power management (DVFS, clock gating, low-power states)

• FPGA-based emulation platforms and full reference systems

You will be embedded within engineering teams while influencing cross-functional decisions across silicon and software domains.

What We’re Looking For

Required Experience

• BS or MS in EE, CE, or CS

• 12+ years developing embedded software for real-time systems

• Deep experience on ARM Cortex-M platforms

• Strong C/C++ (assembly experience preferred)

• Experience defining and writing Software Requirements Specifications (SRS)

• Strong understanding of:

  • Functional allocation

  • Requirements traceability

  • Testability across pre-silicon and post-silicon platforms

• Experience with asymmetric multicore architectures

• Strong knowledge of memory systems, data movement, and processor interaction

• Ability to independently drive architectural decisions

Preferred Experience

• Power optimization strategies in embedded systems

• TrustZone for M-class microcontrollers

• Trusted firmware environments

• Graphics, display, or audio/video processing

• Experience working with IP vendors and external silicon partners

Why This Role Is Different

• Direct architectural influence on Edge AI MCU platforms

• Close collaboration with silicon architects and IP vendors

• Ownership across early-stage definition through validation

• Opportunity to shape hardware/software trade-offs that impact power, performance, and scalability

• Austin-based collaboration culture with tight hardware/software integration

This is a principal-level role for engineers who want to define system behavior — not just implement features.

Location & Work Authorization

Austin, TX – Onsite 5 days per week
Must be authorized to work in the United States. We do not sponsor or transfer visas for this role.

What we’re doing isn’t easy, but nothing worth doing ever is. 

Diligent builds helpful robots that operate safely in the real world. We move fast, ship often, and rely on pragmatic engineering to make high-risk systems trustworthy. 

We’re hiring a Staff TLM, Security Engineering — a hands-on leader who both manages a small team and executes high-impact technical work in a Tech-Lead-Manager (TLM) style. You’ll own the Security Engineering roadmap, ship secure features and controls, mentor junior engineers, and raise the bar for product and operational security across embedded systems, cloud services, and the supply chain.

Key Responsibilities

• Lead & execute: Act as a TLM — set technical direction, own deliverables, and regularly contribute as an IC (design, architecture, code, reviews, and hands-on proof-of-concepts).
• Build the security program: Define and deliver the long-term Security Engineering roadmap for device, firmware, cloud, and service security. Prioritize work to address the highest business risk.
• Secure product lifecycle: Embed security into product development: threat modeling, secure design reviews, architecture reviews, secure coding practices, and verification/testing (including fuzzing, static/dynamic analysis).
• Device & firmware security: Drive secure boot, hardware root of trust, cryptographic design/PKI, OTA update security, device identity, and secrets management for embedded platforms and sensor subsystems.
• Cloud & infrastructure security: Own security of backend services, CI/CD pipelines, IaC, identity and access management, secrets engines, logging/monitoring, and incident detection/response.
• Vulnerability management: Lead vulnerability discovery, triage, SLAs and remediation, coordinating across firmware, hardware, cloud, and third-party vendors.
• Incident response & forensics: Lead or support security incidents; develop runbooks, playbooks, and blameless postmortems.
• Mentor & grow the team: Hire, coach, and mentor security engineers. Run 1:1s, career development plans, and technical training; create a culture of ownership and continuous improvement.
• Cross-functional partnership: Partner with product, firmware, SRE/Ops, QA, and supply-chain teams to implement pragmatic controls and measure security outcomes.

What Success Looks Like

• Production systems with measurable reductions in exploitable vulnerabilities and shortened remediation times.
• Secure provisioning and lifecycle for devices and firmware with robust telemetry and verification.
• A high-performing security engineering team that consistently delivers technical outcomes and has visible growth.
• Repeatable security design and validation patterns integrated into product development.
• Clear, data-driven visibility into security posture for leadership and engineering teams.

Basic Qualifications

• • 8+ years experience in security engineering, with demonstrated impacts across product and infrastructure security.
    
    
  • 3+ years leading teams or operating in a TLM/tech-lead + manager capacity (hands-on plus people leadership).
    
    
  • Strong hands-on technical skills: design and implementation experience in secure firmware, embedded platforms, or device security and cloud/backend security. Comfortable writing and reviewing code (C/C++, Python, Go, or similar).
    
    
  • Deep knowledge of cryptography concepts, PKI, secure boot, secure OTA, device identity, and secrets management.
    
    
  • Proven experience in vulnerability management, threat modeling, and incident response for distributed systems.
    
    
  • Experience securing CI/CD pipelines, IaC (Terraform/CloudFormation), and cloud platforms (AWS/GCP/Azure).
    
    
  • Excellent technical communication skills: able to explain tradeoffs and design security controls to engineers and leadership alike.
    
    
  Strong mentoring skills and demonstrated success developing junior engineers into independent contributors.
  
• Experience: 3–5+ years of proven success managing complex Enterprise Network Environments.
• Firewall Expertise: In-depth experience with Palo Alto firewalls (configuration, management, and security policy).
• Wireless Mastery: Strong background in wireless network design, maintenance, and complex troubleshooting.
• Leadership: Demonstrated ability to lead projects and mentor team members.

Preferred Qualifications

• Hardware/Platform Experience: Ubiquiti/UniFi Systems, Routers (e.g. Cradlepoint), and NetCloud Manager.
• Network Tools: Experience with WiFi Survey tools (e.g., Ekahau), RADIUS, DNS, and MDM solutions.
• Cellular Connectivity: Knowledge of LTE/5G RF technologies and LTE failover configurations.
• Systems: Proficiency in Linux environments.
• Certifications: PCNSA/PCNSE, CCNA/CCNP, or equivalent.
• Agility: Previous experience thriving in a high-growth startup environment.

This role will be on-site 5 days a week in NW Austin.

As a member of the Security team at Ambiq, the Senior Staff Software Engineer, Security will participate in developing and supporting Ambiq’s TrustZone-based Trusted Execution Environment (TEE) offering for the Apollo & Atomiq SoC and emulation platforms.  

This role will work within our Security software development team and will work closely with SoC and system architecture teams, Security architects and local SoC design team, focusing on enabling the TrustZone functions in Ambiq’s SoC and software offerings.  

A successful candidate should be a fast-learning, result-driven, and self-motivated team player with an “always learning” mindset. He should have an inquiring spirit and be comfortable in a lab environment and with hands-on debugging of embedded systems.  

The candidate will be involved in the extension of each of these to cover new MCU members of the family as they become available. 

Responsibilities 

• Enable Trusted Execution Environments (TEE) support on Ambiq’s TrustZone (ARM v8) enabled Apollo and Atomiq family of products. 

• Take reference Trusted Firmware for Microcontroller (TF-m) implementation from ARM and adapt it to suit the specifics of Ambiq’s TrustZone implementation 

• Drive necessary Secure Bootloader software updates, laying the foundation for TEE and implementing necessary elements required for TF-m. 

• Help drive SDK infrastructure and architectural changes to support TF-m-enabled systems. 

• Spearhead Ambiq's compliance efforts by supporting industry-leading security certifications like ARM PSA and SESIP. 

• Work closely with Alpha customers to ensure seamless integration of TF-m by testing and verifying its functionality in customer builds 

• Work closely with the SQA and System Test team to help define and implement test cases for security deliverables to ensure full coverage.  

 Qualifications 

• A Bachelor's of Science or Master's in Electrical Engineering, Computer Engineering, or Computer Science. 

• 10+ years of experience developing embedded software for real-time environments (bare metal and RTOS). 

• At least 5 years working on embedded security, cryptography, TrustZone, and secure boot. 

• Solid understanding & proven ability to port and support ARM Trusted Firmware for Microcontrollers (TF-m). 

• Understanding of security implications for the embedded systems, and experience with IoT security concepts (TrustZone, Root of Trust, Secure Boot, Secure Update) 

• Familiarity and prior experience with ARM Platform Security Architecture (PSA), ARM TrustZone for microcontrollers, cryptographic algorithms/protocols, and ARM Cryptocell. Expertise in embedded C and assembly language, particularly for system initialization. 

• Familiarity with at least one MCU IDE on Windows from ARM/Keil, IAR, Eclipse, or others. 

• The candidate must be able to independently manage assigned tasks, prioritize workload, and meet deadlines with minimal supervision. Proactive problem-solving skills and the ability to seek clarification when needed are essential. 

• Experience in prioritizing tasks and managing workflow for oneself and potentially others in the future. Ability to delegate effectively and keep projects on track to achieve desired outcomes.

Must be currently authorized to work in the United States for any employer. We do not sponsor or take over sponsorship of employment visas (now or in the future) for this role.