About us

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption.

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies.

Job Summary

We are looking for high-quality silicon physical design engineers to complement our existing exceptional team. We have a range of roles available with focus on those with extensive ranges of skills and experience although exceptional candidates with less experience will be considered. We want people who work collaboratively and proactively within a team focusing on collectively achieving our goals and creating the right engineering solutions. Good communication is essential, as is the ability to adapt and learn – we value the right characteristics more than specific experience.

For the successful candidate we offer an open, honest and collaborative environment working on leading-edge designs at the most advanced nodes. Our engineers are not siloed, and they are trusted and encouraged to take ownership of their designs and problem solutions. You will become part of a team that looks for improvements to everything we do: our designs, our flows, our methodologies, our infrastructure.

The Team

The physical design team sits within the wider silicon design team which includes RTL, verification and DFT and with whom we collaborate extensively. Our work additionally involves strong links with architecture, packaging and product engineering. We are responsible for working with those teams to create high-quality RTL and then to build the final chip layout (e.g. GDSII) ensuring a signoff-quality design is delivered to the Foundry (e.g. TSMC).

Responsibilities and Duties

Applicants will be expected to contribute technically to the development of Graphcore's next generation of AI superchips, focusing on achieving robust, high-performance and power-efficient designs in leading-edge process technologies while meeting ambitious development schedules. Contributions are expected to span multiple areas and involve:

• using state-of-the-art EDA tools and in-house Graphcore flows to deliver final designs that are of sign-off quality
• enhancing existing flows and in-house tools/APIs to support new features and/or methodologies
• analysis and/or debugging of complex engineering problems leading to workable solutions
• developing an understanding of emerging technical issues and applying that knowledge to optimise in-house flows and methodologies

Candidates will be expected to work closely both with other teams within Graphcore and with 3rd party support engineers/contractors, ensuring good communication between all parties, and to contribute meaningfully to the overall efficiency and success of the Physical Team.

Candidate Profile

Essential:

• A Degree in Electronic/Electrical Engineering, Computer Science or related subject
• Be highly motivated, a self-starter, and a team player
• Enjoy taking responsibility and improving skills and knowledge
• Excellent problem-solving skills for debugging issues seen and finding root causes
• Ability to program/script (required to solve design issues, typically in Tcl and Python)
• Experience in 7nm or smaller technologies
• A good breadth of experience with physical design flows including: Floorplanning/Budgeting, Synthesis, Place and Route, Clock CTS, Timing Analysis, Logical Equivalence, Physical Verification (DRC/LVS/ERC)
• Minimum 6/7 years relevant engineering experience

Desirable

• In depth expertise in one or more aspects of physical design flows
• Structuring of builds to maximise PPA
• Silicon transistor knowledge including std cell libraries and/or memories
• 2D and 3D design (CoWoS, UCIe etc.)
• High speed, high power and/or full reticle chip designs
• Experience with Ethernet, PCIe, LPDDR, HBM, UCIe implementations
• Power integrity and optimization
• 2nm or 3nm technologies
• Chip finishing (pad rings, chip level LVS/DRC/ERC)
• Design for test
• Team management
• Technical leadership
• Project Planning

We're looking for a passionate and hands-on RISC-V CPU Cluster/SoC DV Engineer to architect, develop, and evolve world-class verification infrastructure for high-performance RISC-V CPU clusters. If building from scratch, innovating on methodology, and collaborating with top-tier CPU designers excites you — read on.

This role is hybrid, based out of Bangalore.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• You thrive in building robust verification environments using SystemVerilog, UVM and C++, and can define and drive verification plans independently.
• You bring a system-level mindset, with experience integrating multiple IPs into clusters or SoCs and verifying their interactions.
• You have a strong grasp of stimulus planning, debug techniques, and coverage closure for verifying complex hardware subsystems like caches, NoCs, and memory hierarchies.
• You’re comfortable working on features that span multiple IPs — such as coherence, security — and ensuring their correct behavior at the cluster or SoC level.

What We Need

• A Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field.
• Strong experience with System Verilog and UVM-based verification.
• Proven ability to drive subsystem or SoC-level DV projects with integration and system feature validation responsibilities.
• Familiarity with AXI/CHI protocols, System IPs flows (like debug/trace, power management), and integration flows for multi-IP verification environments.

What You Will Learn

• Techniques to scale DV infrastructure for verifying high-performance RISC-V clusters and SoCs.
• How to verify multi-agent interactions across CPUs, system IPs and NoC or fabric components.
• Best practices for cross-IP feature convergence, integration-level planning, and reuse across cluster/SOC programs.
• How to collaborate with global teams across RTL, DV, software, and validation for cohesive system-level bring-up.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

WHO WE ARE:
Aviatrix® is pioneering the Cloud Native Security Fabric — the architecture the Containment Era requires. The Cloud Native Security Fabric governs every workload communication path across every cloud, every VPC, every Kubernetes cluster, and every serverless function, from a single policy plane. One rule. Universal propagation. Enforced at the workload, not at a chokepoint. Trusted by more than 500 of the world's leading enterprises. For more information, visit aviatrix.ai. 

About the Role: Distinguished Engineer

Overview

We are seeking a Cloud AI Network Security Developer to architect and deliver advanced AI-driven network security capabilities across multi-cloud environments.

You’ll lead the design of Python/Go-based distributed systems that power intelligent firewalls, real-time telemetry analytics, and LLM-integrated threat automation.

This role combines deep knowledge of cloud networking, firewall technologies, data engineering, and AI model integration to create secure, adaptive, and self-learning security systems.

Key Responsibilities

• Lead the architecture, design, and development of advanced cloud networking solutions.
• Mentor and provide technical guidance to engineering teams, fostering a culture of innovation and excellence.
• Collaborate with cross-functional teams to develop and implement strategies that enhance cloud network performance, scalability, and security.
• Drive the adoption of new technologies and best practices in cloud networking.
• Conduct in-depth research and analysis to identify emerging trends and technologies in cloud networking.
• Present technical vision and roadmap to stakeholders, ensuring alignment with business goals.
• Contribute to the development of industry standards and participate in technical conferences and committees.

Required Skills

• Bachelor's or Master's degree in Computer Science, Electrical Engineering, or a related field.
• 15+ years of experience in software development and cloud networking.
• Deep understanding of cloud networking architectures, protocols, and technologies
• Proven experience in leading and mentoring engineering teams.
• Strong problem-solving skills and the ability to think strategically.
• Excellent communication and presentation skills.
• Demonstrated ability to drive innovation and influence industry standards.
• Solid experience in Kubernetes, microservices architecture, and observability systems (Prometheus, ELK, Grafana).
• Familiarity with security frameworks (Zero Trust, NIST CSF, CIS Benchmarks).

• Should have architected security and networking solutions, delivering key innovations.
• Patent holders in cloud networking or security are preferred.
• Must be hands-on, serve as a subject matter expert (SME), and provide both technical and thought leadership to a global team of engineers.
• Should have led large-scale initiatives across geographies within the company, including hackathons, idea generation, and driving successful implementation and delivery.
• Must possess up-to-date, hands-on expertise in AI technologies and their practical implementation.
• Should be able to code, debug, and provide effective fixes or solutions as needed.

Nice to Have

• Experience in LLM application design (RAG, LangChain, vector databases).
• Expertise with network telemetry analytics and visualization systems.
• Contributions to open-source network security or AI frameworks.
• Knowledge of distributed systems scaling, resilient cloud design, and multi-cloud policy federation.
• Certifications such as AWS Security Specialty, GCP Cloud Security Engineer, CISSP, or CKA.

About the role:

Samsara is looking for an experienced Technical Support Engineer to provide world-class hardware and software support experience to our customers. You will be a part of our Tier 2 support team within the umbrella of the Global Technical Support organization. You will be responsible for resolving complex customer problems and improving support across all teams. Your work will be collaborative in nature, working together with other support engineers in multiple support locations to serve our customers and troubleshoot complex issues.  

The ideal candidate will have a strong technical background with experience in a technical support role, proven customer-facing skills, and strong communication skills. You understand the day-to-day aspects of customer support including managing tickets, building knowledge base articles, and providing product feedback to Engineering and PM teams. 

You should apply if:

• You want to impact the industries that run our world: Your efforts will result in real-world impact—helping to keep the lights on, get food into grocery stores, reduce emissions, and most importantly, ensure workers return home safely.
• You are the architect of your own career: If you put in the work, this role won’t be your last at Samsara. We set up our employees for success and have built a culture that encourages rapid career development, countless opportunities to experiment and master your craft in a hyper growth environment.
• You’re energized by our opportunity: The vision we have to digitize large sectors of the global economy requires your full focus and best efforts to bring forth creative, ambitious ideas for our customers.
• You want to be with the best: At Samsara, we win together, celebrate together and support each other. You will be surrounded by a high-caliber team that will encourage you to do your best. 

In this role, you will: 

• Product Expertise: Become an expert on Samsara’s product portfolio of complete Internet of Things (“IoT”) solutions combining hardware, software, and cloud to bring real-time visibility, analytics, and AI to operations across multiple industries.
• Technical Troubleshooting: Use your technical knowledge and product expertise to troubleshoot and resolve customer issues with medium to high complexity.
• Responsiveness & Resolution: Respond to customers and resolve their inquiries in a timely and helpful manner with a primary focus on meeting our SLA goals.
• Documentation: Partner with Enablement to author and maintain customer-facing knowledge base articles to help improve the self-servisablity for our end users.
• Partnerships: Work closely to develop partnerships with our Engineering and Product teams in order to reproduce bugs and build testbeds as necessary.
• Feedback Loop: Provide direct feedback to Support Management for product and process improvements to help enhance the customer experience.
• Team Player: Champion, role model, and embed Samsara’s cultural principles (Focus on Customer Success, Build for the Long Term, Adopt a Growth Mindset, Be Inclusive, Win as a Team) as we scale globally and across new offices.

This is a hybrid position based in our Bengaluru office, requiring you to participate in an on-call rotation schedule to triage and manage high-severity issues and outages.

Minimum requirements for the role:

• B.S. in Computer Science, Engineering (Mechanical/Electrical), or other technical fields.
• Minimum 5 years of experience in support, engineering, or other technical roles.
• Fluent English is a must.
• Technical know-how - you’re comfortable interfacing with engineers, translating complex technical concepts into everyday language, and working with SaaS systems.
• Excellent customer service and interpersonal skills coupled with the ability to influence individual contributors and leaders across the company.
• Excellent written and verbal communication skills, you can speak both Engineer and Human.
• Strong bias for action, ability to dive deep, and insistence on the highest standards.
• Ability to work in a hyper-growth environment with shifting priorities.
• Willingness to work flexible hours during nights and weekends is preferred.

An ideal candidate also has:

• Experience with industrial systems, electronics, tinkering with cars or IoT devices, or similar hands-on work is a big plus.
• Trilingual English, Spanish and French is a big plus.
• Strong familiarity with using CRMs like Zendesk or Salesforce.

#LI-hybrid

Reports To

NOC Delivery Manager

What You Will Be Doing

• NOC Support Engineers will provide technical expertise in resolving and fixing the problems arising in the ChargePoint's array of Charging stations.
• You have to define and diagnose resolutions for the issues and drive resolution of charging stations faults, and systematically reduce critical outages and improve overall uptime of the Charging Stations.
• You will be analyzing, diagnosing, isolating and resolving problems and documenting your analysis in the case notes.
• You will also work collaboratively with other services teams.
• You learn and understand the various technological aspects of different models of the ChargePoint Charging stations and will handle the situation and drive towards faster resolution.
• You will work in a ITIL service lifecycle Framework and ensure MTTR and MTBF are achieved.
• You will Create technical documentation and make improvements to processes and procedures.
• Perform proactive preventative maintenance for both hardware and software.
• You will work in a Shift that spans 24 hours in various shift timings and you will work from the Office all 5 days of the week.

What You Will Bring to ChargePoint

• Tenacious commitment to customer focused support
• Comfort with making complex decisions and excited by "thinking outside the box"
• Must have exceptional troubleshooting and advanced analytical thinking skills for complex issue resolution between hardware/software components
• Ability to accurately convey complex concepts in easily digestible communications both verbally and in writing
• Proven experience in driving initiatives, cross-functional collaborations, and holding others accountable to expectations
• Account management skills including investigating and understanding current and historical issues for specific accounts
• Maintains effectiveness when experiencing major changes in personal work tasks or work environment; adjusts effectively to work within new work structures, processes, requirements, or cultures
• Ability to work effectively and complete tasks/projects with minimal supervision
• Proactively identify areas of product improvement including design enhancements, failure analysis, and quality control
• Focuses and guides self in accomplishing work objectives
• Deals effectively with others in antagonistic situations, using appropriate interpersonal styles and methods to reduce tension or conflict
• Actively appreciates and includes the diverse capabilities, insights, and ideas of others and working effectively and respectfully with individuals of diverse backgrounds, styles, abilities, and motivation
• Sets high standards of performance for self; assuming responsibility and accountability for successfully completing assignments or tasks; self-imposing standards of excellence rather than having standards imposed

Requirements

• Minimum of 6 years in a technical support environment for complex hardware and software solutions
• Working experience, certifications, or bachelor’s degree in technical field
• The ideal candidate should be from any of the following experience - Network engineer - Systems engineer – Linux, Unix or Windows engineer - Backup or Storage engineer - Electrical or Electronics engineer - Technical Support engineer who has ability to understand and diagnose the technical aspect in any technological domains.
• The ideal candidate should have previous exposure and working knowledge into CLI interface of more or more flavors of Linux (ex: RedHat, Ubuntu etc). The candidate can also have working experience in Unix.
• The ideal candidate is well versed in Industry standards practices and solutions.
• The candidate should have good exposure and understanding of the Operational processes of Incident Management, Change Management and Problem Management.
• Understand the ITIL or any other operations Service lifecycle frameworks or Project management or quality frameworks.
• Desirable to have candidates with well versed knowledge in Microsoft Word, Excel and Powerpoint.
• Its desirable if the candidate has knowledge on Power distribution and/or power electronics fundamentals, familiarity with AC/DC EV charging protocols: CCS, CHAdeMO, J1772 etc.
• The candidate should be an excellent communicator with skills in Documentation and creating knowledge articles.
• Desirable to have worked in CRM tools like Salesforce, Servicenow, Jira etc.
•  

Location

Bangalore, India

Title: Lead Firmware QA Engineer, Astera Labs, Bengaluru, India. 
 
Astera Labs Inc., a leader in purpose-built connectivity solutions for data-centric systems, is seeking Lead Software QA Engineer for their Bengaluru (India) Design Center. Partnering with leading processor and GPU vendors, cloud service providers, world-class manufacturing companies, Astera Labs is helping data-centric system designers remove performance bottlenecks in compute-intensive workloads such as Artificial Intelligence and Machine Learning.

Basic Qualifications:

• Bachelor’s degree in electrical engineering (EE) or Computer Science is required; a master’s or PhD in EE is preferred with minimum 4 years of experience.

Required Experience:

• Experienced and detail oriented PCIe switch test engineer with solid understanding of PCIe protocol.
• Estimate work, identify dependencies and develop schedules.
• Responsible for designing and executing functional, performance, interoperability and stress tests.
• Work closely with  Silicon team, architecture team, FW development team to understand the design and develop test strategies.
• Responsible for manual and automation testing.
• Strong knowledge of scripting ( Python ) is must.
• Responsible for automation development and manual testing.
• Perform Signal integrity and protocol level validation.
• Closely work with development teams to triage and debug issues.
• Knowledge of collecting PCIe trace using PCIe analyzer and analyzing the trace to triage issues.
• Experience in PRBS testing, loopback and margining tests.
• Good understanding of OOB testing and Protocols like MCTP, I2C, SPDM etc.
• Experience is PCIe compliance testing is a plus.
• Regularly working with Hyperscale's and Tier 1 OEMs to communicate plans and status, address escalations, deliver on SLAs.
• Knowledge in validation of NIC controllers and storage controllers is preferred.
• Requirements management and traceability through software development phases.
• Mentoring and coaching team members to help them excel in their jobs.
• Power user of Git, Jira and Confluence.

• Bachelor’s degree or advanced diploma in Electrical Engineering (EE)

• 10+ years of experience in high-speed analog IC layout using Cadence Virtuoso
• Prior experience with BiCMOS layout is strongly preferred
• Proven experience handling at least one chip top-level through tapeout
• Proficiency in layout extraction and parasitic analysis for high-speed circuits
• Awareness of EMIR and antenna DRC rule-compliant layout practices
• Experience with Cadence SKILL and TCL scripting is highly recommended

As an Astera Labs’ Principal DFT (Design for Test) Engineer, you will be part of the DFT Design team that develops the next generation of Astera Labs’ connectivity products that support the world’s leading cloud service providers and server and networking OEMs. In this role, you have exposure and be responsible for the full product life cycle, from definition to mass production to end of life of the products. You will be working closely with all engineering teams, physical design and functions like back-end testing, manufacturing, defect, and reliability analysis. This employee must be team oriented with a focus on solving problems in a collaborative manner between multiple engineering teams.

Basic qualifications:

• Minimum of bachelor’s degree in computer engineering/ electrical engineering, Masters preferred.
• Minimum 10+ years of experience in a semiconductor company as a DFT engineer
• Must be local or willing to relocate

Required experience:

• Chip design, Verilog and System Verilog
• Verification, UVM methodology
• ATPG tools
• Scan insertion tools
• Gate-level simulations
• Static timing analysis
• Scripting (Perl/Tcl)
• Familiarity with ATE
• Hands-on expertise with commercial test generation tools for large complex designs
• Experience with IEEE 1500 Standard or IEEE 1687 standard and MBIST, LBIST
• Strong fundamental knowledge of DFT techniques include JTAG, ATPG, test pattern translation, yield learning, logic diagnosis, scan compression
• Experience running test compression software
• Experience using the Mentor Tessent or synopsys DFT Max and Tetramax tools

Preferred experience:

• Experience with defining and implementing SOC level verification on large designs.
• Working with 93k Tester

 Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.  

• Bachelor’s degree or advanced diploma in Electrical Engineering (EE)

• 8+ years of experience in high-speed analog IC layout using Cadence Virtuoso
• Prior experience with BiCMOS layout is strongly preferred
• Proven experience handling at least one chip top-level through tapeout
• Proficiency in layout extraction and parasitic analysis for high-speed circuits
• Awareness of EMIR and antenna DRC rule-compliant layout practices
• Experience with Cadence SKILL and TCL scripting is highly recommended

Overview of Role

66degrees’ Managed Cloud Optimization (MCO) team works with some of the largest cloud users in the world to help them transform their businesses with technology. Our Site Reliability Engineers (SREs) combine Google Cloud Platform expertise with a passion for devops methodologies to help our clients maintain, optimize, and scale their cloud implementations. 

On a daily basis, our SREs work with varied and exciting customers on topics ranging from solving critical outages to designing and deploying new cloud workloads to building self-healing automation. Our SREs work with cutting-edge Google Cloud technologies like Google Kubernetes Engine (GKE), Anthos, BigQuery and data pipelines, as well as leading 3rd party tools like Prometheus, Datadog, and many others. Our SREs also work with languages like Python and Terraform to create automation, deploy infrastructure, and contribute to open-sourcing.

If you’re looking to continually build and apply your Google Cloud expertise to new and varied environments while acting as a key contributor to building the best Google consulting partner in the industry – let’s talk.

Responsibilities

Our ideal candidate will understand the value of teamwork. We are looking for the right fit with our rapidly growing organization and will invest in training.

We are based in Chicago, Illinois and Denver, Colorado. Remote candidates should not hesitate applying. A 66degrees’ Site Reliability Engineer’s responsibilities and duties are as follows: 

• Ensure near-zero downtime with monitoring and alerting, self-healing automation, and continuous improvement
• Create highly automated, available and scalable systems by applying software and infrastructure principles
• Employ and advise clients on DevOps and SRE principles and practices, covering deployment pipelines, HA, service reliability, technical debt, and operational toil for live services running at scale
• Provide a proactive approach to our clients’ workloads, anticipating failures, automating tasks, ensuring availability, and providing a great customer experience
• Work closely with clients, your team, and Google engineers to investigate and resolve infrastructure issues
• Contribute to ad-hoc initiatives such as writing documentation, open-sourcing, and improving operation, making a huge impact at a rapid-growth Google Premier Partner

Qualifications

• Minimum 3+ years of cloud and infrastructure experience, including demonstrated expertise with Linux, Windows, k8s, databases, and networking services
• 2+ years of Google Cloud experience and related certifications strongly preferred but not required
• Proficiency with Python required. Other programming language experience is a plus
• Strong provisioning and configuration skills using Terraform
• Experience with 24x7x365 monitoring, incident response, and on-call support.
• Experience in troubleshooting that spans systems, network, and code
• Experience determining & negotiating Error budgets, SLIs, SLOs, and SLAs with product owners
• Demonstrate the ability to work independently and as a member of a greater team, including cross-team activities
• Experience working in Agile Scrum, Kanban methodologies in SDLC
• Proven experience balancing service reliability, metrics, sustainability, technical debt, and operational toil for live services running at scale
• Strong communication skills, as this is a heavily customer-facing role
• Bachelor’s degree in computer science, electrical engineering, or equivalent required

Position Overview

We are looking for Hardware Engineers to help build and maintain our robotic systems. You will be responsible for designing, developing, and testing hardware systems that integrate mechanical as well as electrical components. You will work closely with cross-functional teams to ensure our products achieve the highest standards of performance, reliability, and efficiency.

Responsibilities

• Design and develop hardware systems, including circuit boards, processors, and mechanical assemblies.
• Create detailed CAD models and drawings for jigs, fixtures, and tools using SolidWorks or other CAD software for mechanical components.
• Utilize 3D printing and rapid prototyping techniques to develop and test hardware prototypes.
• Collaborate with software engineers, mechanical engineers, and other team members to integrate hardware with software and mechanical designs.
• Conduct tests and simulations to ensure the functionality and reliability of hardware systems.
• Troubleshoot and resolve hardware issues and provide technical support during the product development lifecycle.
• Prepare documentation for hardware designs, specifications, and test procedures.

Preferred Qualifications

• BS, MS or higher degree in Computer Science, Robotics, Engineering or a related field, or equivalent practical experience.
• Proven experience in hardware design and development, including both electrical and mechanical components.
• Proficiency in SolidWorks or other CAD software for mechanical design.
• Experience with Arduino or similar platforms for electronic prototyping and control systems.
• Familiarity with 3D printing and rapid prototyping techniques.
• Strong understanding of electronic components, circuit design, and signal processing.
• Experience with testing and debugging hardware systems.

Position Overview

We are seeking a proficient Firmware Engineer that will develop and optimize firmware for BLDC motor control and real-time embedded systems. Key responsibilities include implementing control algorithms, debugging communication protocols, and integrating firmware with frameworks like ROS, while collaborating with hardware teams to ensure system performance. 

Responsibilities

• Develop and optimize firmware for BLDC motor control, including advanced control algorithms and system identification.
• Design, debug, and integrate low-level communication protocols such as RS-485, CAN, UART, and SPI.
• Implement and maintain real-time systems using RTOS (e.g., FreeRTOS, RT Linux, VxWorks).
• Collaborate with hardware engineers to design and validate motor driver circuits and power electronics systems.
• Integrate firmware into higher-level communication frameworks, such as DDS (Distributed Data Service), e.g., ROS.
• Test, validate, and debug firmware systems in the lab.
• Document firmware design processes and contribute to best practices.

Preferred Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Robotics, or Mechatronics.
• Hands-on experience in firmware development for robotics, motor control, or embedded systems.
• Expertise in BLDC motor control, including FOC (Field-Oriented Control), PWM, and current/position control techniques.
• Proficiency in low-level communication protocols such as RS-485, CAN, and SPI.
• Experience with real-time embedded systems (e.g., FreeRTOS, RT Linux).
• Familiarity with DDS frameworks (e.g., ROS).
• Proficient in C/C++ for embedded systems and adept with debugging tools.
• Excellent problem-solving skills and ability to handle complex system integration challenges.

What You Will Do:

Get ready to dive into an exhilarating journey as you work on the bring-up, validation, and debugging of a groundbreaking interference accelerator chip/chiplets! Here’s what you can look forward to:

• Work on chip(s) bring up, validation and debug of cutting-edge interference accelerator chiplet. This includes cutting-edge technology: test and validate high-speed serial protocols like PCIe Gen5, high-speed memory interfaces such as LPDDR5, and die-to-die chiplet interconnect blocks.
• Innovate and execute:** Create and implement comprehensive test bring-up and validation plans alongside your dynamic team, develop automated randomization of software/firmware kernel functions and logging instrumentation in conjunction with self-checking post processors
• Craft impactful test scripts:** Develop test scripts and embedded firmware functions for host systems that will test and validate aspects of our high-speed interfaces, including PCIe, LPDDR, and D2D, pushing the boundaries of what's possible.
• Equip your workspace: Collaborate with your team to procure and acquire the latest lab equipment, ensuring you have the tools needed to succeed.
• Collaborate and conquer:** Work hand-in-hand with hardware, software, and operations teams on exciting challenges such as ATE tests and hardware/software debugging, fostering a spirit of teamwork and innovation.

What you will bring:

• Do you have the following qualifications and Experience?
• BS/MS in Electrical/Computer Engineering with 5 + years industry experience working with high performance SoC
• Familiarity with high speed serial protocol (such as PCIe Gen3/4/5) and/or high speed external memory technology (such as LPDDR3/LPDDR4/LPDDR5 and/or high speed I/O standards.
• Excellent debugging verbal and written communication skills
• Capable of working effectively across cross functional organizational boundaries.

P-1492

At Databricks, we are passionate about enabling data teams to solve the world's toughest problems — from making the next mode of transportation a reality to accelerating the development of medical breakthroughs. We do this by building and running the world's best data and AI infrastructure platform so our customers can use deep data insights to improve their business. Founded by engineers — and customer obsessed — we leap at every opportunity to solve technical challenges, from designing next-gen UI/UX for interfacing with data to scaling our services and infrastructure across millions of virtual machines. And we're only getting started in Bengaluru , India ! As a software engineer with a backend focus, you will work with your team to build infrastructure for the Databricks platform at scale.

The Role : 

We are seeking a highly skilled and experienced Senior Software Engineer with a deep understanding of low-level systems to join our team. In this role, you will be instrumental in designing, developing, and optimizing application frameworks  that form the building blocks for all software development at Databricks. This is not a full-stack role; your expertise will be focused on the intricate details of system internals, performance, and efficiency.

What we look for : 

• Design, implement, and maintain core system infrastructure and low-level software components.
• Optimize system performance, reliability, and scalability through meticulous analysis and innovative solutions.
• Work with JVM internals, memory management, concurrency, and distributed systems.
• Collaborate with other senior engineers and architects to define technical strategies and roadmaps.
• Mentor junior engineers and contribute to a culture of technical excellence.
• Participate in code reviews, design discussions, and architectural decision-making.
• Troubleshoot complex system issues and provide effective resolutions.

Qualifications

• Bachelor's or Master's degree in Computer Science, Electrical Engineering, or a related field.
• 7+ years of professional experience in software development.
• Deep understanding of Java Virtual Machine (JVM) internals, including garbage collection, JIT compilation, class loading, and memory model.
• Proficiency in at least one JVM language and extensive experience with its runtime environment.
• Strong programming skills in Scala/Java/Rust or other systems-level languages.
• Extensive experience with operating system concepts; including processes, threads, concurrency, scheduling, and I/O.
• Proven track record of building and optimizing high-performance, scalable, and reliable systems.
• Experience with distributed systems concepts and technologies.
• Excellent problem-solving, analytical, and debugging skills.
• Strong communication and collaboration abilities
• Experience with performance profiling and tuning tools.
• Contributions to open-source projects related to JVM or systems software.
• Experience with RPC frameworks.

If you are a systems-level expert with a passion for optimizing the core of technology and possess a deep understanding of JVM internals, we encourage you to apply and help us build the future.

P-926

At Databricks, we are passionate about enabling data teams to solve the world's toughest problems — from making the next mode of transportation a reality to accelerating the development of medical breakthroughs. We do this by building and running the world's best data and AI infrastructure platform so our customers can use deep data insights to improve their business. Founded by engineers — and customer obsessed — we leap at every opportunity to solve technical challenges, from designing next-gen UI/UX for interfacing with data to scaling our services and infrastructure across millions of virtual machines. 

The Role : 

We are seeking a highly skilled and experienced Senior Software Engineer with a deep understanding of low-level systems to join our team. In this role, you will be instrumental in designing, developing, and optimizing application frameworks that form the building blocks for all software development at Databricks. Your expertise will be focused on the intricate details of system internals, performance, and efficiency.

What we look for : 

• Design, implement, and maintain core system infrastructure and low-level software components.
• Optimize system performance, reliability, and scalability through meticulous analysis and innovative solutions.
• Work with JVM internals, memory management, concurrency, and distributed systems.
• Collaborate with other senior engineers and architects to define technical strategies and roadmaps.
• Mentor junior engineers and contribute to a culture of technical excellence.
• Participate in code reviews, design discussions, and architectural decision-making.
• Troubleshoot complex system issues and provide effective resolutions.

Qualifications

• Bachelor's or Master's degree in Computer Science, Electrical Engineering, or a related field.
• 7+ years of professional experience in software development.
• Deep understanding of Java Virtual Machine (JVM) internals, including garbage collection, JIT compilation, class loading, and memory model.
• Proficiency in at least one JVM language and extensive experience with its runtime environment.
• Strong programming skills in Scala/Java/Rust or other systems-level languages.
• Extensive experience with operating system concepts; including processes, threads, concurrency, scheduling, and I/O.
• Proven track record of building and optimizing high-performance, scalable, and reliable systems.
• Experience with distributed systems concepts and technologies.
• Excellent problem-solving, analytical, and debugging skills.
• Strong communication and collaboration abilities
• Experience with performance profiling and tuning tools.
• Contributions to open-source projects related to JVM or systems software.
• Experience with RPC frameworks.

If you are a systems-level expert with a passion for optimizing the core of technology and possess a deep understanding of JVM internals, we encourage you to apply and help us build the future.

Role Overview

We are seeking a Senior Staff DFT Engineer to join a rapidly growing DFT design team focused on next-generation AI accelerator SoCs. In this role, you will define, architect, and implement current and future DFT/DFX solutions, supporting advanced SoC designs that leverage innovative memory-centric compute and heterogeneous chiplet architectures.

This is a highly hands-on role requiring both deep technical execution and high-level planning, working across design, verification, product, and test teams to ensure robust manufacturability and silicon bring-up.

Location:

Hybrid, working onsite at our Bengaluru, Karnataka, headquarters 3-5 days per week.

Key Responsibilities

• Drive DFT partitioning strategies for ATPG, including hierarchical and scalable approaches.

• Implement ATPG compression and serialization, and perform RTL scan insertion with associated design rule fixes.

• Own Memory BIST (MBIST) solutions, including memory repair and in-system test (IST), from implementation through verification and silicon debug.

• Support boundary scan and define DFT mode constraints for IPs, providing timing feedback to STA teams.

• Generate and integrate DFT RTL, ensuring quality through RTL-level checks (e.g., linting and DFT rule verification).

• Apply and support IEEE 1149.1, IEEE 1500, and IEEE 1687 standards.

• Execute and verify ATPG (SAF, TDF) and MBIST using unit-delay and min/max timing simulations.

• Perform detailed ATPG coverage analysis and drive coverage closure.

• Collaborate with product and test engineering teams to deliver manufacturing test patterns for ATE.

• Develop diagnostic tools and flows for ATPG, MBIST, and silicon bring-up on ATE.

• Work hands-on with industry-standard DFT tools, contributing from low-level implementation through architectural planning.

Minimum Qualifications

• BE/ME (or equivalent) in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

• 7+ years of experience in DFT, including scan test and MBIST.

• Proficiency with HDLs such as Verilog, SystemVerilog, or VHDL.

• Experience with scripting or programming languages (e.g., Python, Perl, TCL, C).

• Strong ability to collaborate effectively in cross-functional and diverse teams.

• Experience producing clear, detailed technical documentation.

Location:

Hybrid, working onsite at our Bangalore offices 3 days per week.

• Bachelor's or master's degree in Computer Science, Electrical Engineering, or related degree with 7+ Years of Industry Experience
• Strong Linux systems knowledge (package management, networking, storage, services).
• Experience with GitLab/GitHub CI/CD or similar systems (GitHub Actions, Jenkins, PRs, Merges, etc.).
• Experience with Docker/Podman and container-based workflows.
• Proficiency with Python or Bash scripting for automation.
• Experience managing, monitoring, and troubleshooting CI pipelines and runner environments.
• Working knowledge of configuration management tools (Ansible, Puppet, Chef, or Terraform).
• Familiarity with Prometheus/Grafana or similar observability stacks.
• Ability to diagnose issues across systems, networks, and applications.
• Self-motivated team player
   

• Experience with cloud infrastructure platforms (Azure, AWS, GCP, etc).
• Job control systems (Slurm, LSF) and hypervisors (Proxmox)
• Prior DevOps/SRE experience in a fast-moving startup or small-team environment.
• Experience supporting ML, HPC, or hardware-accelerated development environments.
• Experience with Kubernetes (installation, troubleshooting, workload management).
• Experience with artifact repositories (Nexus, Artifactory, GitLab Package Registry).
• Be part of a cross-site or follow-the-sun DevOps operations.

Location:

Hybrid, working onsite at our Bangalore offices 3 days per week.

Minimum:

• BS in Electrical Engineering, Computer Science, or a related field with 8+ years of industry experience, or an MS in Electrical Engineering, Computer Science, or a related field with 7 years of industry experience is preferred.

• Experience in IP/SoC verification cycle preferably from concept to tape-out to bring-up.

• Good knowledge of verification methodologies such as UVM/OVM, etc.

• Hands-on ASIC-SoC design verification tests and debug experience.

• Fluency with SystemVerilog randomization constraints, coverage, and assertions methodology.

• Good problem-solving skills and the passion to take on challenges (particularly in AI domain).

• Passionate about AI and thriving in a fast-paced and dynamic startup culture.

Preferred:

• Part of Successful implementation of multiple verification environments and tape-out efforts.

• Experience with C/C++ is good

This position is located in India. 

Join the Trackonomy Team! 

Want to be part of the next hyper-growth IoT story in Silicon Valley? Our seasoned leadership team has successfully grown the company 100x in four years while securing top VC investors like Kleiner Perkin and 8VC. We have paying customers and are rapidly scaling in the United States and Internationally. Are you looking for a high-energy, fast-paced, team-oriented environment that challenges your talents daily with cutting-edge technologies that solve global problems across multiple markets? Join the Trackonomy Team; we offer opportunities to talented professionals covering all engineering disciplines while creating  unique opportunities for career growth. 

About Trackonomy:

Trackonomy aims to make people and organizations more productive through our next-generation operating system for the connected world. Our unique diversity of technologies allows us to create building blocks and vertically integrated, configurable platforms that enable our customers to drive digital transformation throughout their organization. We have a successful track record of leading initiatives at multibillion-dollar businesses in the Logistics, Industrial, Healthcare, Homeland Security spaces, and more. Despite being in strategic stealth mode, our solutions have been on ABC, CNBC, CNN, FOX, and even featured during US Senate hearings. In 2019 we joined AirBnB, Google, and Twitter as a recipient of the prestigious World Economic Forum Pioneer Award! We have raised over $250 million from top investors, including Kleiner Perkins and 8VC. Trackonomy is headquartered in San Jose, California, in the heart of Silicon Valley. 

Summary:

You will be a core engineer of our early-stage team. We work on everything from machine learning, to security, to high performance computing, to IoT devices, to dynamic web apps, etc. Don’t be surprised if you get to touch every system while you work here, often teaming up with other team members on critical work. Candidates must be comfortable working with microcontrollers and low-level hardware control in a test-driven development environment. The ideal candidate will have experience working with wireless communications modules, IoT technologies, RF protocols and have great troubleshooting and prototyping skills. You will be a role model and live our Vision, Mission, and Values.

Qualifications: 

• 3- 7 years embedded code experience, with emphasis on C
• Bachelor / Masters of Electronics Engineering and 4 years of experience
• Experience with micro controllers and low-level hardware control programming
• Experience with low power embedded devices
• Experience with real time embedded systems
• Experience with firmware development, testing, and system level bring up and debugging
• Experience in working with wireless communications modules (like BLE, LORA, 4G, NB IoT), IoT technologies, RF protocols
• Experience with Nordic (or similar) Semiconductor platforms
• Candidates must have hands-on experience on Linux.
• Exposure to multi-threaded design and implementation.
• Must have hands on experience on GIT
• Good interpersonal, organizational and communication skills
• Team player, be capable of sharing knowledge, learn from others, and support other groups within an organization
• Self-starter, highly motivated

Preferred skills:

• Knowledge about firmware development best practices including proper testing, documentation, debugging, and code review.
• Experience developing bootloaders and firmware over the air update
• Experience on evolving embedded sensor technologies and networks
• Knowledge of one or more scripting languages (Python)
• Basic understanding of subsystem interfacing and I2C, SPI as well as other standard chip interface protocols
• Comfortable reading and interpreting complex electrical schematics
• Experience with embedded network exchange protocols like with RSTP, PTP, LLDP and UDP/TCP is highly regarded

Trackonomy Systems is proud to ensure equal employment opportunities to all individuals regardless of their race, color, religious creed, national origin, ancestry, physical or mental disability, sex, gender, gender identity, gender expression, sexual orientation, age, medical condition, genetic information, marital or registered domestic partnership status, military or veteran status, or any other characteristic protected by state, federal, or local law. 

We strive to provide a stellar experience throughout the application process and ensure all applicants will be given proper consideration based solely on merit and Trackonomy’s business needs.

Trackonomy Systems is dedicated to working with and providing reasonable accommodations to individuals with physical and mental disabilities. If you need assistance or accommodation due to a disability while interviewing, please contact hr@trackonomysystems.com.

MICROARCHITECT AND RTL DESIGN  

BENGALURU, INDIA

About the role:

We are seeking a seasoned Microarchitect and RTL Design Engineer with a strong background in microarchitecture and RTL coding. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions

Responsibilities:

• Design and develop microarchitectures for a set of highly configurable IP's

• Microarchitecture and RTL coding ensuring optimal performance, power, area

• Collaborate with software teams to define configuration requirements, verification collaterals etc.

• Work with verification teams on assertions, test plans, debug, coverage etc.

Qualifications and Preferred Skills:

• BS, MS in Electrical Engineering, Computer Engineering or Computer Science

• 8+ years and current hands-on experience in microarchitecture and RTL development

• Proficiency in Verilog, System Verilog

• Familiarity with industry-standard EDA tools and methodologies

• Experience with large high-speed, pipelined, stateful designs, and low power designs

• In-depth understanding of on-chip interconnects and NoC's

• Experience within Arm ACE/CHI or similar coherency protocols

• Experience designing IP blocks for caches, cache coherency, memory subsystems, interconnects and NoC's

• Familiarity with RAS designs, QoS in fabrics, PCIe/IO is a plus

• Experience with modern programming languages like Python is a plus

• Excellent problem-solving skills and attention to detail

• Strong communication and collaboration skills

DESIGN VERIFICATION ENGINEER

BENGALURU, INDIA

About the role:

We are seeking a seasoned Design Verification Engineer with a strong background in building testbenches and writing test sequences for complex IPs. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions

Responsibilities​:

• Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SoC, chiplet, or multi-chiplet systems

• Write UVM/SystemVerilog code to implement the test plan, checkers, and scoreboards

• Collaborate with software teams to define and implement configurable test benches

• Work with design teams test plans, failure debug, coverage, etc.​

Qualifications and Preferred Skills​

• BS, MS in Electrical Engineering, Computer Engineering or Computer Science

• 8+ years and current hands-on experience in block-level/IP-level/SoC-level verification

• Proficiency in Verilog, SystemVerilog

• Familiarity with industry-standard EDA tools for simulation and debug

• Deep experience with UVM-based test benches

• Experience with modern programming languages like Python

• Knowledge of Arm AMBA protocols such as AXI, APB, and AHB

• Understanding of Arm CHI protocol is a plus

• Experience on working with IPs for caches, cache coherency, memory subsystems, interconnects and NoCs

• Experience with formal verification techniques, emulation platforms is a plus

• Excellent problem-solving skills and attention to detail

• Strong communication and collaboration skills

SENIOR FIELD APPLICATIONS ENGINEER 

BENGALURU, INDIA

About the role:

If you are skilled and have experience as a Senior Field Applications Engineer, you will play a critical role in providing technical expertise and support to our customers. You will empower and guide them on designing and deploying Baya technologies into their products. You will work closely with our sales and engineering teams to understand customer requirements, troubleshoot technical issues, and deliver customized solutions that exceed expectations.

Responsibilities:

• Serve as the primary technical point of contact for key customers, providing guidance and support throughout the product development lifecycle.
• Assist in the design and implementation of customized solutions to meet customer-specific requirements.
• Develop and deliver technical presentations, demonstrations, and training sessions to customers, partners, and internal teams.
• Provide timely resolution to customer inquiries, issues, and concerns, ensuring high levels of customer satisfaction.
• Stay current with industry trends, technologies, and standard methodologies to effectively advise customers on product development strategies.

Skills and Experience:

• 5+ years of experience in a field application engineering or customer-facing technical role, with a master’s degree in electrical engineering, Computer Engineering, or related field.
• Experience in designing or supporting complex SoC, from architecture definition to tape-out, addressing implementation challenges on advanced process nodes.
• Understanding of RAS and reliability for enterprise and infrastructure markets is a plus.
• Understanding of functional safety standards and certification.
• Excellent communication and interpersonal skills, with the ability to effectively engage with customers, colleagues, and partners at all levels.

The role will involve travel to customer sites and events.

SOFTWARE VERIFICATION ENGINEER 

BENGALURU, INDIA

• Own functional and performance verification of Baya’s software platforms
• Define software verification infrastructure and processes to ensure high quality and performance
• Develop and execute software test plans, verification convergence plans and monitor quality metrics
• Collaborate with architects to define and verify performance metrics of the IP
• Guide engineers on verification closure
• Manage regressions, triaging and debugging
• Sign-off on verification and quality for release milestones​

• BS, MS in Computer Science, Computer Engineering or Electrical Engineering (or equivalent experience)
• 4+ years of experience in SW or HW verification in the semiconductor, CAD or automotive industry
• Proficiency in Python and C++
• Proficiency with System C is a plus
• Excellent problem-solving skills and attention to detail
• Familiarity with Arm CHI and AXI protocols is a plus
• Understanding of software systems design and modeling
• Understanding of computer architecture and networking concepts
• Understanding of System/SoC architecture
• Experience with modern code development practices: Git, CI, UI
• Strong communication and collaboration skills