About the team

Join the Home Screen team — the engineers behind Roku's home screen and the experiences that greet every Roku user the moment they turn on their TV. Our work ships to hundreds of millions of devices worldwide.

We move fast and hold a high bar. Engineers on this team own features end-to-end — from the OS platform layer through BrightScript/SceneGraph UI to cloud integration — and collaborate closely with product, design, and cross-functional engineering partners to bring ambitious ideas to production at scale.

About the role

We are looking for a Senior Software Engineer to take deep ownership of the OS UI platform that powers the Roku home screen and Browse Surfaces. You will drive architecture and delivery across the OS client stack: SceneGraph component framework, performance and memory optimization, and the user-facing experiences built on top of it.

For California Only - The estimated annual base salary for this position is between $370,000 - $400,000 annually. Compensation packages are based on factors unique to each candidate, including but not limited to skill set, certifications, and specific geographical location. This role is eligible for health insurance, equity awards, life insurance, disability benefits, parental leave, wellness benefits, and paid time off.

What you'll be doing

• Architect and implement features across the Roku home screen & Browse Surfaces, through SceneGraph UI to cloud-backed content experiences
• Drive performance, memory efficiency, and reliability of the home screen on constrained embedded hardware
• Own features end-to-end: design, implementation, testing, and production rollout to hundreds of millions of devices
• Collaborate with UI/UX design, product management, and cloud engineering teams to define and deliver new user experiences, including AI-driven features
• Mentor engineers, establish technical standards, and evangelize best practices across the team
• Investigate and resolve complex platform issues affecting millions of users

We're excited if you have

• 7+ years of software engineering experience, with significant time in embedded or consumer electronics environments
• Deep proficiency in C++ and/or BrightScript/SceneGraph/TypeScript (or equivalent TV platform SDK experience)
• Proven track record in architecting and shipping features on constrained embedded platforms (memory, CPU, GPU)
• Strong understanding of multi-threaded development, concurrency, and real-time programming
• Experience building and shipping UI experiences on embedded or consumer electronics platforms
• Knowledge of Linux operating systems and system-level debugging
• Experience with API design and cross-team integration
• Familiarity with AI/ML and LLM technologies, with interest in applying them to content and UI experiences
• Strong communication skills — this role involves frequent collaboration across engineering, product, and design
• B.S. or M.S. in Computer Science or equivalent engineering experience

#LI-SG1

About the team

You will be part of the Roku Video Platform Engineering team and responsible for building the next-generation video services for the Roku Cloud TV Platform. Roku pioneered TV streaming and continues to innovate and lead the industry. The Roku Channel has us well-positioned to help shape the future of streaming. Continued success relies on investing in the Roku Cloud TV Platform to deliver a high-quality streaming TV experience on a global scale. 

About the role

As a Video Encoding Engineer, you will build, optimize, and maintain high-performance video processing workflows. You will own our end-to-end encoding toolchain—from experimentation and profile tuning to automated packaging workflows—ensuring our content is delivered with maximum quality, reliability, and efficiency.

You will work closely with the team on key video services projects around video ingestion, encoding, VoD/live-linear, Server-Side Ads Insertion, and Video QoS, with the goal of delivering a best-in-class streaming TV experience across all Roku devices. The projects that you will work on will impact millions of Roku users around the world. Throughout, you will have the opportunity to collaborate with key product engineering stakeholders across Roku engineering teams and to lead the design of our video services platform.

The ideal candidate will have endless curiosity and can pair a global mindset with locally relevant execution. You should be a gritty problem solver and self-starter who can drive programs with the product and commercial teams within Roku and across external strategic partner organizations. The successful candidate will display a balance of hard and soft skills, including the ability to respond quickly to changing business needs. 

What you’ll be doing

• Design, build, optimize, and maintain FFmpeg-based encoding pipelines for both VOD and Live workflows, operating at scale in cloud environments such as AWS or GCP
• Develop, refine, and validate encoding presets for modern codecs, including H.264, HEVC, and AV1, ensuring optimal quality-to-bitrate performance
• Implement advanced encoding strategies such as multi-pass workflows, CRF tuning, per-title optimizations, and quality-targeted encoding
• Benchmark and evaluate video quality using VMAF and other objective metrics to drive continuous improvements in efficiency and viewing experience
• Build and maintain adaptive streaming packaging workflows, including HLS, DASH, and CMAF, ensuring broad device compatibility and reliable playback
• Profile and optimize system performance by identifying and eliminating bottlenecks across compute, storage, and I/O layers
• Write, review, and improve code, assessing architectural tradeoffs to deliver secure, high-performance, and highly concurrent video infrastructure services
• Collaborate cross-functionally with engineering, product, and platform teams to support and advance company-wide video service initiatives

We’re excited if you have

• Strong problem-solving and analytical abilities
• 5+ years of solid programming experience and passionate about writing high-quality and well-architected code
• Expert-level knowledge of FFmpeg or Gstreamer and their related toolchains (filters, flags, debugging, custom builds)
• Experience with hardware-based encoder/decoder libraries (NVENC, Vulkan
• Strong understanding of compression theory, codec internals, GOP structures, bitrate control, etc
• Experience with container formats: MP4, TS, fragmented MP4, ISOBMFF
• Familiarity with HLS/DASH, CMAF, adaptive bitrate design, DRM, and SCTE 35
• A track record working with applied AI-based video enhancement and compression algorithms (Super Resolution, Denoising, Artifact Removal)
• Hands-on experience with cloud compute (AWS Lambda/ECS/Batch, GCP, Kubernetes, or similar)
• Ability to handle periodic on-call duty as well as out-of-band requests; strong written and verbal communication skills
• Bachelor's degree in computer science plus 8 years of experience or equivalent; Master's degree preferred 

#LI-SB-5

About the team

You will be part of the Roku Video Platform Engineering team and responsible for building the next-generation video services for the Roku Cloud TV Platform. Roku pioneered TV streaming and continues to innovate and lead the industry. The Roku Channel has us well-positioned to help shape the future of streaming. Continued success relies on investing in the Roku Cloud TV Platform to deliver a high-quality streaming TV experience on a global scale. 

About the role

As a Video Encoding Engineer, you will build, optimize, and maintain high-performance video processing workflows. You will own our end-to-end encoding toolchain—from experimentation and profile tuning to automated packaging workflows—ensuring our content is delivered with maximum quality, reliability, and efficiency.

You will work closely with the team on key video services projects around video ingestion, encoding, VoD/live-linear, Server-Side Ads Insertion, and Video QoS, with the goal of delivering a best-in-class streaming TV experience across all Roku devices. The projects that you will work on will impact millions of Roku users around the world. Throughout, you will have the opportunity to collaborate with key product engineering stakeholders across Roku engineering teams and to lead the design of our video services platform.

The ideal candidate will have endless curiosity and can pair a global mindset with locally relevant execution. You should be a gritty problem solver and self-starter who can drive programs with the product and commercial teams within Roku and across external strategic partner organizations. The successful candidate will display a balance of hard and soft skills, including the ability to respond quickly to changing business needs. 

For California Only - The estimated annual salary for this position is between $285,000 - $345,000 annually. Compensation packages are based on factors unique to each candidate, including but not limited to skill set, certifications, and specific geographical location. This role is eligible for health insurance, equity awards, life insurance, disability benefits, parental leave, wellness benefits, and paid time off.

What you’ll be doing

• Design, build, optimize, and maintain FFmpeg-based encoding pipelines for both VOD and Live workflows, operating at scale in cloud environments such as AWS or GCP
• Develop, refine, and validate encoding presets for modern codecs, including H.264, HEVC, and AV1, ensuring optimal quality-to-bitrate performance
• Implement advanced encoding strategies such as multi-pass workflows, CRF tuning, per-title optimizations, and quality-targeted encoding
• Benchmark and evaluate video quality using VMAF and other objective metrics to drive continuous improvements in efficiency and viewing experience
• Build and maintain adaptive streaming packaging workflows, including HLS, DASH, and CMAF, ensuring broad device compatibility and reliable playback
• Profile and optimize system performance by identifying and eliminating bottlenecks across compute, storage, and I/O layers
• Write, review, and improve code, assessing architectural tradeoffs to deliver secure, high-performance, and highly concurrent video infrastructure services
• Collaborate cross-functionally with engineering, product, and platform teams to support and advance company-wide video service initiatives

We’re excited if you have

• Strong problem-solving and analytical abilities
• 5+ years of solid programming experience and passionate about writing high-quality and well-architected code
• Expert-level knowledge of FFmpeg or Gstreamer and their related toolchains (filters, flags, debugging, custom builds)
• Experience with hardware-based encoder/decoder libraries (NVENC, Vulkan
• Strong understanding of compression theory, codec internals, GOP structures, bitrate control, etc
• Experience with container formats: MP4, TS, fragmented MP4, ISOBMFF
• Familiarity with HLS/DASH, CMAF, adaptive bitrate design, DRM, and SCTE 35
• A track record working with applied AI-based video enhancement and compression algorithms (Super Resolution, Denoising, Artifact Removal)
• Hands-on experience with cloud compute (AWS Lambda/ECS/Batch, GCP, Kubernetes, or similar)
• Ability to handle periodic on-call duty as well as out-of-band requests; strong written and verbal communication skills
• Bachelor's degree in computer science plus 8 years of experience or equivalent; Master's degree preferred 

#LI-SB-5

We are looking for a heavy-hitter to build the "Data Backbone" of our company. You will be responsible for the architecture, scaling, and reliability of the infrastructure that powers our Data Engineering and ML teams. Your goal is to provide a seamless, self-service environment where data scientists can go from a JupyterHub notebook to a massive Ray cluster or Trino query without worrying about the underlying hardware.

Responsibilities

• Data Plane Ownership: Architect and manage the lifecycle of high-throughput data tools including Trino, Ray, and JupyterHub on Kubernetes.
• GitOps & Automation: Drive a "zero-manual-touch" philosophy using ArgoCD and Terraform to manage complex, stateful data environments.
• Observability at Scale: Build high-cardinality monitoring systems using VictoriaMetrics and Vector to track pipeline health, data ingestion rates, and system performance.
• ML Lifecycle Support: Maintain and optimize MLflow for model tracking, ensuring it integrates deeply with our compute and storage layers.
• Engineering Sovereignty: As a self-starter, you will identify performance bottlenecks in data processing and proactively implement infrastructure-level optimizations.
• Reliability: Participate in on-call rotations for the data stack, treating "data downtime" with the same urgency as a site outage.

The Technical Toolkit

Qualifications:

• The "Data-Aware" Engineer: You understand that scaling a database or a Ray cluster is different from scaling a stateless API. You know how to handle persistent volumes and data gravity.
• Senior Leadership: You’ve spent time in the trenches. You’ve been on-call for 2:00 AM outages and have built the automation to ensure those outages never happen twice.
• Tooling Polyglot: You don't just use tools; you contribute to them. You are comfortable writing Go or Python to extend Kubernetes Operators or automate data workflows.
• Self-Directed: You thrive in ambiguity. You can take a high-level requirement ("Make Trino faster") and turn it into a multi-week infrastructure roadmap.
• Bachelor's degree in Computer Science, Engineering, or a related field, or equivalent practical experience.

Successful candidates must be able to demonstrate U.S. citizenship, permanent residency, or status as a protected individual to satisfy ITAR, contractual, and/or regulatory requirements.

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $182,400 - $228,000. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is proud to be an Equal Opportunity employer committed to diversity and inclusivity in the workplace. All aspects of employment are decided on the basis of merit, qualifications, and business needs. We do not discriminate based upon race, color, religion, sex, sexual orientation, age, national origin, disability status, protected veteran status, gender identity or any other characteristic protected by federal, state or local laws.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

Job Description:

We are seeking an experienced and hands-on Senior Product Engineer to lead and develop next generation high-speed, high performance and low power semiconductor products in advanced process node. The ideal candidate possesses breadth of industry experience in high-speed product development in the field of product and/or test engineering, can apply fundamentals in circuit, ATE, and test program to aid problem solving, and is a self-driven, result focused go-getter in the pursuit of goals and objectives.

Basic Qualifications:

• Minimum of 2 years of experience in the field of post silicon product development dealing with high-speed XCVR (product, test or validation)
• Experience in working with PCIe Gen3 and above
• Have gone through at least one cycle of full product development life cycle
• Strong academic/technical background in electrical or computer engineering; Bachelor’s is required; MS preferred
• Strong problem-solving skills that involve system level analysis with test hardware, test program and DUT.
• Digital and analog circuit level understanding for DUT.
• Excellent team player with great communication skills
• Professional attitude with the ability to prioritize a dynamic list of multiple tasks

Required Experience:

• Hands on experience with using the Advantest 93k ATE platform with specific skills updating ATE test programs for wafer sort and final test solutions
• Hands-on knowledge of NRZ/PAM4 SerDes protocols like PCIe (Gen3 and above), Ethernet (25G and above), etc. and/or memory interfaces such as (LP)DDR5/4.
• Detailed mindset monitoring device ATE test yields, ATE test time, device quality and rolling out new ATE test programs using consistent BKMs
• Strong data analysis skills using tools such as JMP or Spotfire calculating limits and drawing conclusions
• Energetic work mindset meeting the demands of shipping quality parts to Astera Labs’ customers through the manufacturing stage of development

Preferred Experience:

• Working with silicon validation teams to ensure device performance meets production requirements.
• Firmware development in C/C++, scripting in Python, or other equivalent programming experience.
• Hands on experience in product/package qualification

About the Role

Muon seeks a talented Guidance, Navigation, and Control (GNC) engineer to join our team. The ideal candidate can go both deep and broad across the control system analysis and design process. They would use a “systems mindset” to be a multiplier when collaborating with other disciplines to arrive at an elegant, best-fit spacecraft design.

Responsibilities

• Design and implement guidance, navigation & control architectures and algorithms in an embedded C++ environment
• Define requirements for ADCS algorithms, hardware, and related systems - both for existing missions as well as roadmap development that unlock new customer opportunities
• Perform analysis and simulation of mission-specific GNC performance
• Collaborate on the development of ground-processing algorithms for sensor calibration
• Collaborate on the development of an offline geolocation processing pipeline
• Support anomaly resolution of on-orbit systems, including oncall duties
• Support software- and hardware-in-the-loop test planning, execution, and validation
• Lead technical efforts and provide mentorship of more junior engineers

Qualifications

• PhD or Master’s degree in mechanical or aerospace engineering or equivalent plus 5+ years of professional experience, OR several years of experience hands-on with GNC analysis and design
• Software skills in C++
• Knowledge of control and optimization theory
• Expertise in common numerical programming environments (Python, Julia, MATLAB)
• Experience designing, analyzing, and implementing ADCS/GNC subsystems for spacecraft
• Excellent communication, presentation, and coordination skills
• Excited to work in a fast-paced environment with new opportunities each week

Nice-to-Have Skills

• Experience with control stability analysis of flexible bodies
• Experience with ADCS of precision pointing platforms
• Experience with spacecraft flight operations

Salary

The salary range for this role is $138,000 - $208,000 plus a competitive equity grant and comprehensive benefits package. Final compensation will be based on skills, qualifications, experience, and geographic location as assessed during the interview process.

About the Role

Muon seeks a talented Guidance, Navigation, and Control (GNC) engineer to join our team. The ideal candidate can go both deep and broad across the control system analysis and design process. They would use a “systems mindset” to be a multiplier when collaborating with other disciplines to arrive at an elegant, best-fit spacecraft design.

Responsibilities

• Design and implement guidance, navigation & control architectures and algorithms in an embedded C++ environment
• Define requirements for ADCS algorithms, hardware, and related systems - both for existing missions as well as roadmap development that unlock new customer opportunities
• Perform analysis and simulation of mission-specific GNC performance
• Collaborate on the development of ground-processing algorithms for sensor calibration
• Collaborate on the development of an offline geolocation processing pipeline
• Support anomaly resolution of on-orbit systems, including oncall duties
• Support software- and hardware-in-the-loop test planning, execution, and validation

Qualifications

• PhD or Master’s degree in mechanical or aerospace engineering or equivalent plus at least 2-3 years of professional experience, OR several years of experience hands-on with GNC analysis and design
• Software skills in C++
• Knowledge of control and optimization theory
• Expertise in common numerical programming environments (Python, Julia, MATLAB)
• Experience designing, analyzing, and implementing ADCS/GNC subsystems for spacecraft
• Excellent communication, presentation, and coordination skills
• Excited to work in a fast-paced environment with new opportunities each week

Nice-to-Have Skills

• Experience with control stability analysis of flexible bodies
• Experience with ADCS of precision pointing platforms
• Experience with spacecraft flight operations

Salary

The salary range for this role is $124,000 - $189,000 plus a competitive equity grant and comprehensive benefits package. Final compensation will be based on skills, qualifications, experience, and geographic location as assessed during the interview process.

Role

We are looking for a Staff Site Reliability Engineer (Automation) to join our Engineering team. This is a hybrid role based in San Jose, CA (3 days in office), reporting to the Director, Site Reliability Engineer. You will be a key driver in provisioning and deploying new infrastructure, focusing heavily on infrastructure automation. Your expertise will help manage how customer traffic is routed within the cloud and ensure seamless troubleshooting across hardware and automated systems.

What you’ll do (Role Expectations)

• Manage and maintain large-scale distributed systems using an infrastructure-as-code approach
• Develop and enhance tools to automate the deployment and management of large-scale services, focusing on reliable system architecture and maintaining high code quality
• Diagnose and resolve issues by editing code, adjusting infrastructure configurations, conducting performance and network analysis, and creating reusable tools
• Develop automation solutions and manage services efficiently using version-controlled infrastructure-as-code
• Support mission critical services and participate in on-call rotations as needed.

Who You Are (Success Profile)

• You act like an owner. Your passion for the mission fuels your bias for action. You operate with integrity because you genuinely care about the outcome. You adapt to what’s needed, navigating seamlessly between high-level strategy and hands-on execution.
• You are a problem-solver. You seek out challenges because you are energized by finding solutions, knowing that solving the hard problems delivers the biggest impact.
• You are a learner. You have a true growth mindset and never stop developing yourself, actively seeking feedback to become a better partner and a stronger teammate. You love what you do and you do it with purpose.
• You are driven by innovation. You have a deep curiosity for how things work and are energized by solving complex technical challenges. You believe in the power of technology to accelerate transformation and are always looking for a better, more secure, and scalable way.
• You are resilient and adaptable. You view change as an opportunity and setbacks as temporary. You maintain composure and focus in high-pressure situations, guiding yourself and your team through complexity with a steady, positive hand.

What We’re Looking for (Minimum Qualifications)

• 5+ years of relevant experience in site reliability or systems engineering
• Proficiency with Python or Ansible for automation tasks as well as proficiency with interacting with external APIs. 
• Demonstrated experience building and maintaining automation solutions
• Strong background in systems administration, specifically with Linux or other major operating systems
• Bachelor’s degree in Computer Science, a related field, or equivalent practical experience

What Will Make You Stand Out (Preferred Qualifications)

• Hands-on experience with Systems Kickstart using PXE and monitoring and observability tools like Prometheus, Grafana, or Nagios. 

#LI-Hybrid #LI-KM9

Role 

We are looking for a Principal Site Reliability Engineer to join our Infrastructure services and architecture team. This role is hybrid 3 days a week onsite in San Jose, CA, or can be remote reporting to the Senior Manager, Cloud Operations. As a lead engineer, you will leverage deep expertise in IaC/CaC, Linux virtualization, and physical hardware management to drive our infrastructure forward. You will oversee networking services and general software engineering to ensure our systems remain scalable, resilient, and high-performing.

What you’ll do (Role Expectations)

• Mentor junior engineers and lead high-impact infrastructure projects
• Support business operations by responding to alerts and triaging systems to restore mission-critical capabilities
• Ensure the reliability and performance of all customer-facing services
• Design, document, and build technical solutions that align with evolving organizational needs
• Support Agile processes to maintain high velocity and a collaborative environment

Who You Are (Success Profile)

• You possess deep expertise in Kubernetes management and deployment, ensuring containerized environments are optimized and secure.
• You are a champion for Infrastructure/Configuration as Code, maintaining a strict IaC/CaC mindset in every solution you build.
• You operate with a security-first focus, embedding protection and compliance into the foundation of the infrastructure.
• You bring a "go-getter" attitude, proactively identifying problem areas and proposing innovative solutions.
• You are highly proficient in CI/CD pipelines and believe that automated testing is non-negotiable for stable releases.

What We’re Looking for (Minimum Qualifications)

• Expert-level proficiency with Kubernetes
• Deep professional experience with Terraform and Ansible
• Expert-level programming skills in Python or Go
• Hands-on experience with Enterprise Linux distributions such as Rocky, Red Hat, or Alma
• Proven experience using Git within a structured SDLC
• U.S. citizenship due to the nature of the customers assigned to this role

What Will Make You Stand Out (Preferred Qualifications)

• Deep knowledge of Linux Hypervisors, including OpenStack, Proxmox, libvirt, or QEMU
• Technical experience working with FreeBSD
• Familiarity with Identity Access Management tools like HashiCorp Vault, LDAP, or OIDC

#LI-SanJose #LI-Remote #LI-JG1

Role

We are looking for a Staff Data Center Operations Engineer to join our Cloud Ops Build and Infrastructure Team. This role is on-site in Fremont, CA, reporting directly to the Datacenter Deployment Manager. In this position, you will play a critical role in expanding Zscaler’s global cloud by utilizing automation to provision hardware that will be deployed to our data centers.

What you’ll do (Role Expectations)

• Provision new hardware and network devices in a staging environment that will be deployed globally to expand and supplement the Zscaler network
• Troubleshoot issues within our build environment and repair or replace server and network components and infrastructure
• Collaborate with the maintenance, network, install and platform engineering teams, execute and validate build activities, and engage and assist in optimizing processes

Who You Are (Success Profile)

• You are a positive force. You approach hard problems with constructive energy and a 'can-do' spirit that is contagious, inspiring your team to stay focused on the solution.
• You operate with urgency. You understand that in a high-growth environment, speed and quality are not mutually exclusive. You have a relentless focus on execution and a bias for action, delivering high-impact results quickly to win for the customer and the team.
• You are driven by innovation. You have a deep curiosity for how things work and are energized by solving complex technical challenges. You believe in the power of technology to accelerate transformation and are always looking for a better, more secure, and scalable way.
• You champion simplicity. You are skilled at distilling complex problems, user needs, and technical concepts into clear, simple, and actionable plans. You are a precise communicator who brings clarity and focus to every interaction.
• You are resilient and adaptable. You view change as an opportunity and setbacks as temporary. You maintain composure and focus in high-pressure situations, guiding yourself and your team through complexity with a steady, positive hand.

What We’re Looking for (Minimum Qualifications)

• USA Citizenship (required due to the nature of assigned customers)
• 5+ years experience working in Data Center or hardware build and development environments
• Experience with the LINUX/UNIX command-line, BIOS, OOB management (ILO, SAA, iDRAC, IPMI, etc)
• Deep understanding of various types of servers, network devices and configurations, and physical connectivity
• Ability to occasionally lift and carry 50 lbs

What Will Make You Stand Out (Preferred Qualifications)

• Basic scripting capabilities (e.g., BASH, Python, etc.)
• Familiarity with build automation technologies such as Ansible or PXE boot
• Familiarity with JIRA, Confluence, or other ticketing and documentation tools

#LI-KM9 #LI-Hybrid

Figure is an AI robotics company developing autonomous general-purpose humanoid robots. The goal of the company is to ship humanoid robots with human level intelligence. Its robots are engineered to perform a variety of tasks in the home and commercial markets. Figure is based in San Jose, CA and requires 5 days/week in-office collaboration.

We are looking for a Mechanical Design Engineer with experience owning complex mechanical modules from concept through production. The ideal candidate has operated in a high-tech, fast-paced environment, is comfortable driving across multiple stakeholders, and has a strong background in design, testing, validation, and scaling hardware to production. Robotics experience is not required.

Responsibilities:

• Design structural parts and assemblies in 3D CAD that meet load, durability, manufacturability, and packaging requirements within a tightly constrained envelope
• Collaborate closely with actuator, sensing, and electronics teams to integrate subsystems into a unified hand structure
• Perform structural analysis, tolerance stack-ups, and FEA to validate design intent
• Generate accurate 2D drawings using GD&T in accordance with ASME Y14.5
• Prototype, build, and test components to validate structural performance and reliability
• Partner with supply chain, contract manufacturers, and manufacturing engineers to drive designs through NPI and into production
• Own and drive Failure Analysis & Corrective Actions (FA/CA) for issues discovered during manufacturing, testing, or field use
• Communicate clearly and proactively across a small, fast-moving team — structure touches every subsystem and requires constant cross-functional coordination
• Some international travel

Requirements: 

• 2+ years of meaningful experience in structural or mechanical engineering at a high-tech company (consumer electronics, EV, aerospace, or similar)
• Bachelor's or Master's Degree in Mechanical Engineering or related field
• Expert in 3D CAD (CATIA preferred; NX, SolidWorks, or equivalent accepted)
• Experience owning structural design end-to-end: requirements, tradeoffs, build, and validation
• Strong understanding of structural analysis, FEA, and material selection
• Experience shipping hardware at scale, including working with contract manufacturers and supporting NPI builds
• Excellent cross-functional communication and collaboration skills — ability to work across actuator, sensing, and electronics teams in a fast-paced, flat organization
• Comfortable operating in a high-ambiguity environment without rigid process frameworks

Bonus Qualifications: 

• 5+ years of experience
• Experience with body-in-white or body structures in consumer electronics or EV programs
• Production engineering experience with high-volume manufacturing

The US base salary range for this full-time position is between $120,000 - $250,000 annually.

The pay offered for this position may vary based on several individual factors, including job-related knowledge, skills, and experience. The total compensation package may also include additional components/benefits depending on the specific role. This information will be shared if an employment offer is extended.

About the Company

DiDi's autonomous driving unit was established in 2016 with the mission of developing Level 4 autonomous driving (AD) technology to make transportation safer and more efficient. In August 2019, the unit became an independent company, DiDi Autonomous Driving, dedicated to advanced AD R&D, product application, and business expansion. We believe integrating AD technology into a shared-mobility fleet will generate immense social value. By leveraging DiDi's specialized technology, operational expertise, and integrated ecosystem, we are positioned to build and operate a highly efficient, user-oriented autonomous fleet.

• Perform optimization on simulation software under the guidance of profiler.
• Identify and resolve algorithm deficiencies that affects simulation determinism.
• Implement new simulation capabilities that fits new hardware.

• PhD, Master’s students or senior undergraduate students majoring in Computer Science or a related field.
• Strong C++ development skills with experience in performance-critical applications.
• Deep understanding of computer architecture.
• Great communication skills that fosters cross-team collaboration.
• Familiarity with robotics (perception, motion planning) is a plus.
• Experience with GPU/CUDA programming is a bonus.
  

The hourly rate for the Intern position in the selected city is $46.

I acknowledge that prior to submitting this application, I have read and accepted the Privacy Notice for California Residents which is available on https://v.didi.cn/AQnxlBa

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Develop and maintain highly interactive, large-scale and complex web-based visual analytics tools on AI/ML workloads.
• Design and implement creative and performant visualizations to assist in diagnosing issues or uncovering optimization opportunities in AI/ML inference and serving.
• Collaborate closely with hardware architects and compiler engineers to define, design, and implement effective visualization solutions enhancing their workflow.
• Develop high-performance visualization workflows by integrating independent graphics modules with micro-services to handle asset optimization, ensuring a non-blocking experience on the client.
• Continuously seek improvements to existing tools and develop new approaches to meet fast-evolving requirements.
• Stay up-to-date with the latest advancements in web development and visualization techniques.
• Contribute to the development of the documentation and user guides.
• Complete other responsibilities as assigned.

What You Bring

• Bachelor’s with 10+ years, or Master’s with 8+ years, or PhD's with 5+ years of industry experience.
• An innate drive to clarify deep technical complexity, balancing creative visualization with engineering rigor to build analytical tools that make interdependent hardware and software models intuitive without sacrificing logical precision.
• Strong experience in full-stack visual analytics software development, with a focus on building scientific or infrastructure visualization tools. Experience in AI model visualization integrated with PyTorch is a plus.

• Strong proficiency in modern frontend technologies like React and backend technologies like Node.js or Python-based frameworks. Experience in graph-based UI is a plus.
• Proven experience in WebGL/WebGPU based frameworks such as three.js or deck.gl. GLSL experience is a plus. Experience in WebAssembly with C++ is a plus.
• Excellent problem-solving skills and ability to think critically and creatively.

• Excellent communication and interpersonal skills.
• Ability to work independently and as part of a team.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-VL1

Senior, CPU Architecture & Performance Research Engineer

What You’ll Do

Architecture Research Lab is  seeking Senior CPU Architecture & Performance Engineer to contribute to performance analysis and microarchitectural optimization of current and next-generation CPU (RISC-V) cores. This role emphasizes hands-on analysis, modeling, and close collaboration with architects and design teams to improve performance across real-world workloads.

You will focus on executing well-defined performance studies, identifying bottlenecks, and helping translate architectural ideas into measurable performance gains

 Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42851

• Perform performance analysis for CPU microarchitectural features under guidance from Staff and Principal engineers.
• Run architectural simulations and analyze results (IPC, CPI stacks, latency and throughput metrics).
• Identify performance bottlenecks in frontend, execution engine, or memory subsystems.
• Assist in evaluating design trade-offs using trace-driven or cycle-accurate models.
• Characterize workloads and benchmarks (SPEC, server, client, internal traces).
• Develop scripts and tools to automate performance analysis.
• Work leading to patents and publication.

What You Bring

• Master’s, or PhD in Computer Engineering, Computer Science, or related field.
• 2+ years of experience in CPU microarchitecture and/or performance engineering.
• Strong understanding of:
• Out-of-order execution, branch prediction, pipelines, and speculation
• Cache coherence, memory systems, prefetching, and NUMA effects
• Hands-on experience with architectural simulators (like gem5).
• Strong programming skills in C/C++ and Python.
• Experience analyzing large performance datasets and traces.
• Familiarity with compiler optimizations and hardware/software co-design.

Preferred Qualifications

• Experience with RISC-V, ARM or X86 architectures.
• Background in power/performance/area (PPA) trade-off analysis.
• Familiarity with SIMD / Vectors / VME for AI inference workloads.
• Prior tapeout / patent / publication experience. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

We are looking for a Senior Engineer, RTL Memory Centric Computing.  This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design.

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Develop IP for memory centric computing systems using Verilog, System Verilog and HLS
• Optimize the IP for performance, power, and area by leveraging advanced design techniques such as pipelining, parallelism, and data compression.
• Collaborate with Verification engineers to design and develop test plans
• Make design decisions out of a large design trade-off space across performance, power, thermal, and cost.
• Troubleshoot and debug hardware issues and ensure the quality of the design through verification and validation.
• Stay up-to-date with the latest advancements in machine learning and hardware architecture and contribute to the development of new technologies.
• Communicate effectively with stakeholders, including users, partners, and management, to ensure that the systems are delivered on time and within budget
• Complete other responsibilities as assigned.

What You Bring

• Bachelor’s with 15+ years, or Master’s with 13+ years, or PhD's with 10+ years of industry experience.
• Strong background in microarchitecture and computer architecture
• 5+ years of experience in front-end design methodology involving RTL development for complex control and data path IPs
• Experience in designing Memory Controller, NOC, Interconnect IP
• Experience in Memory Centric computing IP and  SOC integration
• Experience in AI/ML workloads.
• Strong analytical and problem-solving skills
• Excellent communication and interpersonal skills
• Ability to work independently and as part of a team
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change

#LI-VL1

Job Title: Principal Engineer, AI System Architect (Hardware)

The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung’s world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung’s long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42852

What You’ll Do

• Technically Lead the architecture team with strong  direction, shaping system‑architecture strategy and advancing key innovations
• Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems.
• Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale. 
• Analyze representative and emerging system-level architectural research (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power.  
• Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections. 
• Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices. 
• Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities.  
• Communicate architectural insights and recommendations through clear technical presentations and documentation.   
• Occasional domestic and international travel (<10%).

 What You Bring

• Ph.D. in Computer Science, Electrical Engineering, or a related field preferred,  with 15+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads 
• Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation. 
• Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects.
• Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems.
• Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions.
• Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation. 
• Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams.
• A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Samsung Semiconductor is hiring now for a Staff Engineer, Memory Systems Architecture.  The conventional DRAM failure analysis was physical electrical FA and physical FA. But, in the era of Data center, it is easier to track the field failure information. With this data set, Fault management team’s role is finding DRAM failure mode, abnormality and failure rate projection.

You will be part of an incubation team working on in-field telemetry intended to transform the Customer Quality Experience for Samsung memory products. Fault Management is the future of quality to minimize system downtime within AI/ML hardware deployments and workloads of the future. We analyze trends and patterns from enormous memory fleet telemetry to bucketize failures and perform virtual root-cause analysis. Telemetry analysis helps us design solutions to proactively avoid system downtime. We conduct research and develop both in-house and collaboratively in the industry with the opportunity to publish our findings through whitepapers and conferences. We are looking for innovative and passionate thinkers who can work in a start-up environment and are excited to shape the future of data centers around the world. Join us in our mission!

What You'll Do

• Based on the knowledge of SOC controller and memory operation including RAS feature, find and recommends better solution to mitigate the field DRAM failure rate.
• Needs to communicate better ECC scheme to customers based on Samsung DRAM failure mode(DQ and burst)
• Interface with customers to establish the value add of enabling in-field fault management architecture
• Contribute to the standardization of DRAM/HBM failure logging in the OCP.
• Propose and develop platform RAS (Reliability Availability Serviceability) algorithms for memory fault management such as page offlining, hPPR and conduct POC with known failure DIMMs in the real server and application.

Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work Policy.

Job ID: 42886

 What You Bring

• Bachelor’s degree with 10+ years of relevant industry experience, or Master’s with 8+ years or PhD with 5+ years hardware fault management, reliability, data center fleet management experience or related technical field preferred. (Must)
• Knowledge of platform memory subsystem, platform RAS (Reliability Availability Serviceability) such as ECC, page offlining, hPPR and hardware sparing.
• ECC design and verification and reverse engineering experience.
• Understanding on the address mapping between CPU and memory.
• Memory controller register modification.
• Linux kernel commit experience.
• DRAM and HBM failure mode understanding.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-MD1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

We are looking for a Senior Engineer, RTL Memory Centric Computing.  This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design.

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Develop IP for memory centric computing systems using Verilog, System Verilog and HLS
• Optimize the IP for performance, power, and area by leveraging advanced design techniques such as pipelining, parallelism, and data compression.
• Collaborate with Verification engineers to design and develop test plans
• Make design decisions out of a large design trade-off space across performance, power, thermal, and cost.
• Troubleshoot and debug hardware issues and ensure the quality of the design through verification and validation.
• Stay up-to-date with the latest advancements in machine learning and hardware architecture and contribute to the development of new technologies.
• Communicate effectively with stakeholders, including users, partners, and management, to ensure that the systems are delivered on time and within budget
• Complete other responsibilities as assigned.

What You Bring

• Bachelor’s with 10+ years, or Master’s with 8+ years, or PhD's with 5+ years of industry experience.
• Strong background in microarchitecture and computer architecture
• 5+ years of experience in front-end design methodology involving RTL development for complex control and data path IPs
• Experience in designing Memory Controller, NOC, Interconnect IP
• Experience in Memory Centric computing IP and  SOC integration
• Experience in AI/ML workloads.
• Strong analytical and problem-solving skills
• Excellent communication and interpersonal skills
• Ability to work independently and as part of a team
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change

#LI-VL1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Develop the verification infrastructure and automation environment involved in build, simulation, regression and triages.
• Lead the verification for IP blocks of an AI accelerator by working with architects and RTL engineers.
• Create direct or random testbench, define verification scope and test plans for both functional and performance validation, close the verification quality metrics.
• Provide comprehensive documentation of verification strategy and ensure test environment is easy to use.
• Mentor junior engineers when necessary
• Work cross-functionally in debugging failures with design, compiler and simulation engineers

What You Bring

• Bachelor’s with 10+ years, or Master’s with 8+ years, or PhD's with 5+ years of industry experience.
• Strong background in SoC or IP verification and test bench development using UVM, System Verilog, C/C++ and scripting languages such as Perl/Python.
• Experience verifying at multiple levels of logic from scratch, starting from complex IP blocks to dies to SoCs to full system testing
• Understanding RTL and strong overall debugging skills
• Prior experience with computational logic, interconnect networks and/or memory system is desirable
• Strong background in microarchitecture and computer architecture preferably in the area of AI accelerators
• Knowledge of FPGA and emulation platforms preferred
• Strong analytical and problem-solving skills
• Excellent communication and interpersonal skills
• Ability to work independently and as part of a team
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.

#LI-VL1

Principal, CPU Architecture & Performance Research Engineer

What You’ll Do

Architecture Research Lab is seeking Principal CPU Architecture & Performance Engineer to lead the definition, analysis, and optimization of next-generation CPU microarchitectures (RISC-V core). This role is focused on end-to-end performance: from architectural trade-offs and workload characterization to micro-architectural modeling, simulation, and silicon bring-up correlation.

You will work closely with architecture, design, compiler, and system teams to drive performance and efficiency across a broad set of real-world workloads

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42918

• Define and evaluate CPU micro-architectural features for future cores (frontend, execution engine, memory hierarchy, interconnect).
• Lead performance analysis using simulators, RTL.
• Help develop and validate performance models (cycle-accurate, trace-driven, statistical).
• Characterize workloads (SPEC, server, client, AI/ML, cloud, internal traces) and translate findings into architectural requirements.
• Identify performance bottlenecks and propose data-driven optimizations.
• Drive architecture-to-implementation alignment with design team.
• Collaborate with compiler, OS, and system architects on cross-stack performance issues.
• Mentor senior and staff engineers; provide technical leadership across projects.
• Work leading to patents and publication

What You Bring

• Master’s with 18+ years of experience in Computer Engineering, Computer Science, or related field.
•  or PhD with 15+ years of experience preferred.
• 10+ years of experience in CPU microarchitecture and/or performance engineering.
• Experience with RISC-V, ARM or X86 architectures.
• Strong understanding of:
• Out-of-order execution, branch prediction, pipelines, and speculation
• Cache coherence, memory systems, prefetching, and NUMA effects
• Hands-on experience with architectural simulators (like gem5).
• Strong programming skills in C/C++ and Python.
• Familiarity with compiler optimizations and hardware/software co-design.
• Familiarity with SIMD / Vectors / VME for AI inference workloads.
• Experience analyzing large performance datasets and traces.
• Proven ability (Tapeout / Patents /Publications) to influence architecture / micro architectural decisions through quantitative analysis.

Preferred Qualifications

• Background in power/performance/area (PPA) trade-off analysis.
• Experience with SIMD/Vectors.
• Experience with compiler optimizations and hardware/software co-design.
• Prior technical leadership at Senior Staff or Principal level. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

The SoC Architect will serve as a key technical leader, translating client requirements into an optimal SoC blueprint that achieves aggressive PPA (Power, Performance, Area) targets and driving its successful implementation.  This role will be a critical leader who provides the technical blueprint that ultimately realizes our clients' business objectives and should have a deep understanding of the complexities of custom SoC development and the ability to leverage broad system knowledge to create innovative solutions.

Location:  Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work Policy with an average of 20% travel per month.

Reports to: Team leader/Head of Custom SoC Solutions Team

What You’ll Do

Customer Requirement Definition and Architecture Design:

• Analyze and define the functional, performance, and power requirements based on the client's end product and application (e.g., mobile, edge device, data center or physical AI).
• Conceive and specify the Top-Level SoC Architecture and Microarchitecture, including CPU/GPU/NPU cores, memory subsystem, Interconnect (Coherent/Non-Coherent Fabric), and high-speed I/O interfaces (e.g., PCIe, UALink or ESUN).

Architecture Exploration and Validation:

• Evaluate various architectural trade-offs and validate architectural decisions using performance and power modeling (C/C++, SystemC).
• Provide technical guidance on IP selection, integration, and system optimization, and define the Design for Debug/Test/Excellence (DFx) strategy.

Technical Collaboration and Leadership:

• Collaborate closely with cross-functional teams (HW Design, Verification, Physical Design, Software) to ensure architectural specifications are accurately translated into the design and implementation phases.
• Identify and resolve technical risks throughout the project lifecycle, and lead technical communication with clients and

 What You Bring

• Bachelor’s Degree in Electrical Engineering, Computer Science, or related discipline and 10+ years of experience, or Master’s and 8+ years of experience. 
• 5+ years experience in SoC Architecture or System Engineering (experience in custom ASIC/SoC projects is a plus)
• Deep understanding of Computer Architecture and SoC Design (including CPU, GPU, Accelerators, Caches, and Memory Systems).
• Expert knowledge and design experience with on-chip interconnects (e.g., AMBA AXI/CHI) and High-Speed Interface protocols.
• In-depth knowledge of Power Management and low-power design techniques.
• Experience with SoC-level Clock, Reset, and Power Domain architecture.
• Comprehensive understanding of the overall RTL design and SoC design flow (Implementation & Verification).
• Excellent problem-solving skills to independently identify, analyze, and resolve complex technical issues.
• Ability to communicate and negotiate effectively with diverse stakeholders, including hardware and software engineering teams, managements, and clients.
• Proficiency in scripting languages such as Python/Perl
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-VL1

Staff, CPU Architecture & Performance Research Engineer

What You’ll Do

Architecture Research Lab  is looking for  Staff CPU Architecture & Performance Engineer to drive detailed performance analysis and architectural optimization for current and next-generation CPU (RISC-V) cores. This role focuses on deep ownership of performance-critical micro-architectural domains, workload analysis, and data-driven recommendations that influence core architecture decisions.

You will work closely with architects, design, compiler, and system teams to evaluate trade-offs, identify bottlenecks, and improve performance across real-world workloads

 Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42850

• Own performance analysis for one or more CPU microarchitectural domains (e.g., frontend, execution engine, memory subsystem).
• Build, extend, and validate architectural performance models and simulators.
• Perform CPI/IPC breakdowns and root-cause performance bottlenecks.
• Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models.
• Characterize workloads and benchmarks (SPEC, server, client, AI/ML, internal traces).
• Translate performance data into clear architectural recommendations.
• Work leading to patents and publication.

What You Bring

• Master’s in Computer Engineering, Computer Science or related filed with 8+ years of experience or PhD in Computer Engineering, Computer Science, or related field with 5+ years of experience.
• 5+ years of experience in CPU microarchitecture and/or performance engineering.
• Experience with RISC-V, ARM or X86 architectures.
• Strong understanding of:
• Out-of-order execution, branch prediction, pipelines, and speculation
• Cache coherence, memory systems, prefetching, and NUMA effects
• Hands-on experience with architectural simulators (like gem5).
• Strong programming skills in C/C++ and Python.
• Experience analyzing large performance datasets and traces.
• Familiarity with compiler optimizations and hardware/software co-design..
• Proven ability - prior tapeout experience.

Preferred Qualifications

• Background in power/performance/area (PPA) trade-off analysis.
• Experience / Familiarity with SIMD / Vectors / VME for AI inference workloads..
• Prior  leadership guiding junior engineers.
• Prior patent / publication experience. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Develop the verification infrastructure and automation environment involved in build, simulation, regression and triages.
• Lead the verification for IP blocks of an AI accelerator by working with architects and RTL engineers.
• Create direct or random testbench, define verification scope and test plans for both functional and performance validation, close the verification quality metrics.
• Provide comprehensive documentation of verification strategy and ensure test environment is easy to use.
• Mentor junior engineers when necessary
• Work cross-functionally in debugging failures with design, compiler and simulation engineers

What You Bring

• Bachelor’s with 15+ years, or Master’s with 13+ years, or PhD's with 10+ years of industry experience.
• Strong background in SoC or IP verification and test bench development using UVM, System Verilog, C/C++ and scripting languages such as Perl/Python.
• Experience verifying at multiple levels of logic from scratch, starting from complex IP blocks to dies to SoCs to full system testing
• Understanding RTL and strong overall debugging skills
• Prior experience with computational logic, interconnect networks and/or memory system is desirable
• Strong background in microarchitecture and computer architecture preferably in the area of AI accelerators
• Knowledge of FPGA and emulation platforms preferred
• Strong analytical and problem-solving skills
• Excellent communication and interpersonal skills
• Ability to work independently and as part of a team
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.

#LI-VL1

Job Title: Staff Engineer, AI System Architect (Hardware)

What You’ll Do
The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung’s world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Senior Staff AI System Architect who will play a key role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung’s long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42917

• Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems.
  • Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale.
  • Analyze representative and emerging AI workloads (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power.
  • Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections.
  • Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices.
  • Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities.
  • Communicate architectural insights and recommendations through clear technical presentations and documentation.
  • Occasional domestic and international travel (<10%).

 What You Bring

• Ph.D. in Computer Science, Electrical Engineering, or a related field, with 5+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads.
  • Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation.
  • Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects.
  • Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems.
  • Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions.
  • Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation.
  • Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams.
  • A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges.  
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build.
• Understanding. You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 

#LI-SF1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

We are looking for a Senior Engineer, Performance Architecture.  This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design.

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Model the architecture, performance, and power characteristics of Memory Centric Computing platforms
• Develop and optimize models to explore a large design space.
• Analyze various trade-offs within a design space, considering different architectural choices and workloads.
• Collaborate with architecture, design and software engineers to ensure that the PPA of modeled systems meet the requirements of our users
• Conduct research and development in emerging technologies and trends in AI/ML workloads and Memory Centric Computing architectures
• Communicate effectively with stakeholders, including users, partners, and management, to ensure that the systems are delivered on time and within budget

What You Bring

• BS in Computer/Electrical Engineering or Computer Science with 5+ years of working experiences in silicon development or MS in Computer/Electrical Engineering or Computer Science with 3+ years of relevant working experience or PhD and 0+ years of relevant working experience preferred.
• Strong background in computer architecture
• Experiences in developing and optimizing models for high-performance computing systems
• Strong analytical and problem-solving skills
• Excellent communication and interpersonal skills
• Ability to work independently and as part of a team
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-VL1

Job Title: Principal engineer, AI Serving Framework Architect (Software)

What You’ll Do    

The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung’s world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Principal AI System Architect who will play a key role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung’s long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42853

• As a Tech Lead, leading research teams in Korea and proposing technical direction
• Research on dynamic scheduling methodologies for maximizing AI inference performance in multi-rack scale memory-centric systems, comprised of heterogeneous compute-capable memory and hierarchical memory
• Investigating methods to accelerate search operations in RAG’s vector DB and AI Agent’s knowledge-graph by leveraging compute-capable memory
• Studying strategies for optimally placing KVCache and a vector DB in hierarchical memory to minimize frequent SSD accesses and reduce IO stalls
• Proposing SW design for implementing the derived optimization algorithms on open-source platforms such as vLLM

What You Bring

• PhD in Computer Science or a related field with 10+ years of experience in AI Serving Framework for large-scale computing, with focusing on the AI workloads. 
• Led a project to build and optimize a Large Language Model (LLM) Inference Software Stack on a multi-rack scale system to deliver AI Inference services to over 100,000 users. 
• Extensive experience in designing AI Inference Software Stacks for heterogeneous devices.In-depth understanding of the internal architecture and operation mechanisms of inference engines such as vLLM. 
• Proficiency in AI Inference System Profiling and optimization. 
• Knowledge and practical experience with future AI workloads, including reasoning models, multi-modal solutions, AI agents, and world models. 
• Strong understanding of compute, memory, and networking bottlenecks in AI systems. 
• Required skillsets: PyTorch, Python, and C++ 
• A collaborative mindset, curiosity, and resilience in solving complex challenges. 
• Excellent verbal, presentation, and written communication skills. 
• (Nice to have) Native or fluent Korean speakers are preferred. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build. Understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change 

#LI-SF1

Samsung Semiconductor is hiring now for a Senior CIS Application Engineer.  You will join a dynamic team focused on developing and validating cutting-edge CMOS Image Sensor (CIS) technologies and the complete imaging pipeline they power. Your expanded role will involve not just sensor characterization, but also establishing objective and subjective image quality standards. You’ll collaborate across design, process and product engineering to ensure that CIS devices meet stringent technical specifications and exceed end-user visual expectations across the entire system. This position offers opportunities to define holistic test methodologies and drive product innovation in advanced imaging systems.

What You'll Do

• Establish objective evaluation criteria and subjective perceptual measurement methodologies for the full imaging system (CIS devices, PKG, modules, and ISP output) under dark and light conditions.
• Conduct detailed characterization and performance analysis.
• Analyze test results to identify trends, anomalies, and potential root causes of image performance issues, spanning hardware defects to ISP.
• Work closely with design and process team to provide feedback and propose improvements for image sensor and overall system performance.
• Develop and automate test flows for consistent and efficient evaluation using standard programming languages and specialized IQV software tools (e.g., Imatest).
• Ensure compliance with relevant industry image quality standards.
• Communicate results effectively to cross-functional teams and management stakeholders.
• Act as the primary technical contact person for customers, addressing their technical questions and concerns.
• Serve as a bridge between the customer and internal engineering/product development teams, conveying customer feedback and advocating for necessary fixes or improvements.
• Diagnose and resolve complex technical issues promptly, often involving embedded hardware and software debugging in camera systems.

Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work Policy.

Job ID: 42887

 What You Bring

• Bachelor’s degree in Electrical Engineering, Physics, Optics, or related field with 5+ years of relevant industry experience, or Master’s with 3+ years or PhD with 0+ years of experience.
• Strong understanding of CIS operation principles, including pixel, readout chain, ADC behavior, and the full imaging pipeline (Optics, Sensor, ISP).
• Hands-on experience with image sensor characterization, test system operation, and standardized image quality lab environments (light booths, test charts).
• Knowledge of optical measurement techniques and evaluation under both dark and illuminated conditions.
• Proficiency in data analysis tools such as Python, MATLAB, or similar platforms, ideally paired with experience using professional IQV software like Imatest.
• Familiarity with industry standards for objective image quality measurement.
• Excellent analytical, problem-solving, and communication skills.
• A proactive mindset and strong attention to detail when working in cross-functional environments.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-MD1

Job Title: Principal Engineer, AI System Architect (Hardware)

 What You’ll Do
The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung’s world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung’s long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42852

• • Technically Lead the architecture team with strong  direction, shaping system‑architecture strategy and advancing key innovations
  • Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems.
• Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale. 
• Analyze representative and emerging AI workloads (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power.  
• Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections. 
• Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices. 
• Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities.  
• Communicate architectural insights and recommendations through clear technical presentations and documentation.   
• Occasional domestic and international travel (<10%).

 What You Bring

• Ph.D. in Computer Science, Electrical Engineering, or a related field preferred,  with 15+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads 
• Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation. 
• Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects.
• Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems.
• Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions.
• Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation. 
• Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams.
• A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

What You’ll Do

Samsung Semiconductor is seeking a Senior Systems Engineer to lead the design, modeling, simulation, and experimental validation of high-performance optical products and precision lenses.

You will apply strong fundamentals in physics, optics, and mathematics, alongside hands-on experience in electro-optical prototyping and hardware integration. Your role involves advanced ray-tracing simulations for complex LiDAR systems to generate 3D point cloud data and ensure system-level performance.

Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy with an average of 15% travel per month

Reports to: Director

• Lead the design, modeling, and experimental validation of LiDAR sensors and precision optics.
• Optimize optical architectures using sequential and non-sequential ray-tracing tools (e.g., Zemax, LightTools, or Speos).
• Design high-precision lenses and validate the seamless integration of optical components.
• Develop detailed ray-tracing models for sophisticated LiDAR scanners (multi-beam, scanning mechanisms, and detectors) while assembling and aligning electro-optical setups.
• Simulate environmental interactions to produce accurate 3D point cloud data for algorithm verification and system validation.
• Script custom simulation tools in Python or other languages for error budgeting and performance analysis.
• Execute experimental measurements and data acquisition to drive iterative design improvements and technical reporting.
• Complete other responsibilities as assigned.

What You Bring

• Master’s degree with 3+ years experience or PhD in Physics, Optical Engineering, Electrical Engineering, or a related field.
• 3 + years in automotive semiconductor or sensor industries, focused on optical system design and manufacturing.
• Solid background in physics, optics, and applied mathematics.
• Proven expertise in optical design, modeling, and experimental validation.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-MD1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design.

Our team works hands-on with cutting-edge accelerator hardware, experimental memory systems, and emerging domain-specific languages (DSLs). We build and optimize a Triton-based software stack that pushes the limits of performance, efficiency, and scalability for modern LLM workloads.

We are looking for a Senior AI Systems Engineer with deep experience in high performance Triton kernel development on modern accelerators. In this role, you will design, analyze, and optimize performance-critical kernels used in large scale LLM inference and training pipelines. You will work closely with hardware architects, compiler engineers, and ML researchers to identify performance bottlenecks, interpret profiling data, and co-design solutions that span software and hardware boundaries.

This role is ideal for engineers who enjoy working close to the hardware stack while still reasoning deeply about model level abstractions.

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Design, implement, and optimize high-performance Triton kernels for LLM workloads on existing accelerators.
• Analyze kernel performance using profiling tools; interpret metrics such as latency, throughput, occupancy, memory bandwidth, and compute utilization.
• Identify performance bottlenecks in kernel design (e.g., memory access patterns, synchronization, tiling strategies) and propose concrete optimizations.
• Work across the stack; from model architecture to kernel implementation—to ensure end-to-end performance efficiency.
• Collaborate with hardware and compiler teams on hardware–software co-design, providing feedback that influences future accelerator and DSL designs.
• Prototype and evaluate kernel optimizations using upcoming DSLs and experimental compiler flows.
• Contribute to the evolution of a Triton-based software stack used for cutting-edge research and production-grade experimentation.
• Document design decisions, performance trade-offs, and optimization strategies clearly for internal and external stakeholders.

What You Bring

• Bachelor’s with 5+ years, or Master’s with 3+ years, or PhD's with 0+ years of industry experience.
• Strong experience writing high-performance Triton kernels for GPUs or other accelerators.
• Solid understanding of LLM fundamentals, including attention mechanisms, transformer architectures, and inference/training workflows.
• Deep knowledge of accelerator hardware architecture, including:  Memory hierarchies (HBM, SRAM, caches).
• Proven ability to read and interpret profiling data and performance counters.
• Experience diagnosing and resolving performance bottlenecks in kernel-level code.
• Strong systems programming skills in Python and low-level performance-oriented programming paradigms.
• Experience with hardware–software co-design or compiler-assisted optimization.
• Familiarity with FlashAttention, fused kernels, MoE kernels, and different attention mechanisms.
• Experience working with emerging or experimental domain-specific languages (DSLs) for accelerator programming.
• Background in ML systems, compilers, or performance engineering.
• Prior experience working with different accelerator backends (including but not limited to CUDA).
• Opportunity to work on cutting-edge accelerator hardware and experimental software stacks.
• Direct impact on the performance and design of next-generation AI systems.
• A highly collaborative environment spanning hardware, systems, and ML research.
• Flexibility to publish, prototype, and influence future hardware and software directions.
• Ability to work effectively in cross-functional, research-oriented environments.
• Strong analytical and problem-solving skills.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-VL1

About The Team

As part of the mission at Archer, we’re scaling production of our cutting-edge Electric Propulsion System (EPS) — the heart of our eVTOL aircraft. EPS comprises the Electric Motor, Inverter and Propeller assemblies and represents one of the most technically demanding, highly automated manufacturing systems in our factory.

We’re looking for a Lead Powertrain Manufacturing Engineer to bridge the gap between design and high-volume production. We are specifically seeking an expert in Battery/HVPS (High Voltage Power Supply) assemblies, though we are also eager to speak with leaders experienced in Electric Drive Units (EDU) or EPS systems. If you have a track record of scaling capacity through strategic CapEx and continuous improvement, we want you to help us build world-class hardware from the ground up.

What You’ll Do:

• Build & Mentor a High-Performing Team: Lead and develop a multi-disciplinary engineering squad, providing technical mentorship to a team ranging from Associate to Senior Engineers
• Scale World-Class Infrastructure: Own the full lifecycle of major CapEx projects, from initial factory layout and equipment sourcing to final commissioning and handover
• Drive Technical Excellence: Serve as the Subject Matter Expert for Battery/HVPS assembly or Electric Drive Units (EDU), overseeing complex processes such as stator manufacturing, gearbox assembly, and End-of-Line (EOL) testing
• Bridge Design & Production: Lead the transition from concept to high-volume manufacturing, maintaining the agility to design production lines "at risk" while product specifications are still being finalized
• Optimize for "Automotive Pulse": Thrive in a high-pressure, high-cadence environment where you’ll solve complex continuous improvement challenges to support aggressive production targets
• Strategic Resource Management: Manage vendor relationships and internal stakeholders to ensure capacity increases stay on track, on budget, and ahead of the technology curve.

What You Need:

• Bachelor’s degree in Mechanical, Electrical, or Manufacturing Engineering (or equivalent)
• Powertrain Expertise: 7+ years of experience in EV or Aerospace manufacturing, with deep technical knowledge of Battery/HVPS assembly or Electric Drive Units (EDU) including stator, rotor, or gearbox production
• CapEx Ownership: Proven track record of managing large-scale projects ($10M+), driving the entire lifecycle from equipment specification and commissioning to full-scale production handover.
• Leadership & Mentorship: Experience leading and developing multi-level engineering teams (Associate to Senior), with the ability to foster technical growth in a fast-paced, high-stakes environment
• Technical Agility: Ability to work "at risk," designing and de-risking complex production lines while product designs are still being finalized in a concurrent engineering cycle
• Automation & Systems: Proficiency in NX/AutoCAD and PLM/MES systems, with hands-on experience in industrial automation (robotics, PLCs, gantries)
• Operational Rigor: Strong foundation in GD&T, SPC, and structured problem-solving (DMAIC, 8D, or 5 Whys) to optimize OEE and develop predictive maintenance programs
• High-Cadence Mindset: A "Tesla-speed" approach to manufacturing—thriving in high-pressure environments where you must translate complex technical challenges into clear, actionable results
•  

Bonus Qualifications:

• Specialized Testing: Direct experience with Dyno testing, high-voltage battery safety validation, or advanced EOL diagnostic systems
• Industrial Automation Mastery: Expertise in programming or architecting high-speed automated assembly lines involving multi-axis robotics and vision systems
• Regulatory & Quality Standards: Familiarity with aircraft conformity, configuration management, or IATF 16949/AS9100 quality frameworks
• Advanced CAD/Sim: Expert-level proficiency in NX for factory layout and experience using simulation tools to model line throughput and bottlenecks

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications.

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $182,500 - $228,100. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is committed to provide a safe workplace and a safe aircraft. This is a safety sensitive designated role. Employment in safety sensitive positions is contingent on successful passage of a background check and is subject to pre-employment and random drug screening.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

About The Team

At Archer’s Production Realization Lab, we build the electromechanical infrastructure that makes flight possible. From megawatt-scale dynamometers, complex electrical test stands to bespoke mechanical test equipment from concept to reality.

We are seeking a Staff Equipment Design Engineer to focus on the end-to-end design of specialized hardware for testing aircraft structural integrity and propulsion components. This isn't a "follow the manual" role. You’ll be designing mechanical test equipment from a blank sheet of paper to functional hardware, partnering closely with controls and electrical teams to push the boundaries of what’s possible.

What You’ll Do:

• End-to-End Ownership: Lead the development of aircraft subsystem test equipment from initial concept to customer acceptance
• Systems Integration & Collaboration: Partner cross-functionally with Electrical and Controls Engineering to define equipment architecture and design
• Technical Rigor & Analysis: Execute high-level engineering analyses, including DFMEA and worst-case tolerance stacks, to ensure robust mechanical, pneumatic, and hydraulic designs that meet safety and reliability standards
• Project Leadership & Strategy: Manage project scope, budgets, and aggressive timelines, serving as the primary technical point of contact for stakeholders while translating high-level functional requirements into actionable technical specifications
• Design Governance: Spearhead formal design reviews to ensure equipment exceeds performance expectations, and oversee the creation of comprehensive documentation packages, including training manuals and installation guides
• Technical Oversight & Commissioning: Provide expert mechanical support during equipment build and bring-up cycles, directing assembly technicians and troubleshooting complex hardware issues through to final site acceptance testing (SAT)

What You Need:

• Education: Bachelor’s degree in Mechanical, Mechatronics, or Aerospace Engineering (Master’s preferred) or equivalent
• Experience: 7+ years of progressive experience in specialized test equipment or complex machine design
• Technical: Expert-level proficiency in 3D CAD (SolidWorks, CATIA, or NX) and GD&T, with a proven track record of managing large, complex assemblies and generating high-fidelity manufacturing documentation
• Advanced Engineering Analysis: Demonstrated ability to apply first-principles engineering, including FEA, CFD, and statistical tolerance analysis, to solve sophisticated machine design and structural challenges
• Full Lifecycle Commissioning: Extensive experience leading the bring-up, debugging, and continuous improvement of automated equipment, including the integration of data acquisition (DAQ) systems and sensors
• Strategic Communication: Exceptional ability to distill complex technical concepts into clear, actionable insights for executive presentations, cross-functional design reviews, and comprehensive technical reports 
• Operational Agility: A self-starting mindset capable of maintaining rigorous organization and project momentum within a fast-paced, highly dynamic aerospace development environment
• Travel: Flexibility to travel up to 10% domestically and internationally to support vendor site visits, equipment installations, and final acceptance testing

Bonus Qualifications:

• Specialized Domain Expertise: Direct experience in the development of electric powertrain or component-level test equipment
• Advanced PLM Ecosystems: Deep proficiency in NX CAD within a Teamcenter environment
• Full-Scale Project Execution: Proven success managing the complete lifecycle of custom automation or test cells, from initial white-sheet concepting through to final site acceptance and factory integration
• Hands-on Technical Depth: Practical "wrench-heavy" experience in the physical assembly of complex mechanical and electrical systems, allowing for more intuitive and manufacturable design decisions (DFM/DFA)
• Modern Tool-stack: Advanced proficiency in collaborative project management and documentation tools such as Jira, Slack, and Google Workspace to drive team efficiency

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications.

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $172,800 - $216,000. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is committed to provide a safe workplace and a safe aircraft. This is a safety sensitive designated role. Employment in safety sensitive positions is contingent on successful passage of a background check and is subject to pre-employment and random drug screening.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

itD is seeking a Diagnostic Software Engineer to design, develop, and validate embedded diagnostic solutions that support system reliability, performance, and hardware-software integration. The ideal candidate will bring deep experience in embedded systems development and low-level programming, along with a proven track record of debugging complex hardware/software interactions and delivering high-quality, production-ready solutions.

Location: Hybrid – 4 days onsite (5 days as needed) in San Jose, CA
Pay Range: $34 - $34.61 (hourly)

We provide comprehensive medical benefits, a 401k plan, paid holidays, and more. Please note that we are only considering direct W2 candidates at this time, as we are unable to offer sponsorship.

Responsibilities:

• Develop and maintain embedded diagnostic software for hardware systems and device drivers
• Debug and resolve complex issues across hardware and software layers, including kernel and application levels
• Validate and test embedded systems to ensure reliability, performance, and compliance with requirements
• Collaborate with cross-functional teams to support hardware bring-up and system integration
• Implement and support communication protocols such as I2C, SPI, UART, PCIe, and GPIO
• Analyze system performance and troubleshoot defects using kernel-level debugging tools
• Contribute to continuous improvement of development and validation processes

Internal Responsibilities:

• Attend regular internal practice community meetings.
• Collaborate with your itD practice team on industry thought leadership.
• Complete client case studies and learning material (blogs, media material).
• Build out material to contribute to the Digital Transformation practice.
• Attend internal itD networking events (in person and virtual).
• Work with leadership on career fast-track opportunities.

Required Qualifications and Skills:

• Proficient in C programming
• Experience with hardware and device driver development, including Linux hardware bring-up
• Experience developing, debugging, and validating embedded systems and device drivers
• Hands-on experience with protocols such as I2C, SPI, UART, PCIe, and/or GPIO

Preferred Qualifications and Skills:

• Experience troubleshooting software defects from kernel modules to applications
• Familiarity with Layer 2/3 network protocols
• Proficiency with kernel debugging tools such as GDB and KGDB

Education:

• Bachelor’s degree in a relevant field or equivalent work experience required

What You’ll Do:

• Design a wide array of structural components and integration of flight-critical electromechanical actuation systems from concept through experimental  flight testing
• Design mechanisms and own kinematic layouts for flight control systems
• Design detailed metallic parts and assemblies to support actuation and propulsion integration
• Own the prototype development process; requirements, design, BOM, procurement, assembly, test, etc.
• Perform initial  structural analysis and hand calculations to verify component margins, load paths, and interface requirements
• Interface with suppliers to select COTS solutions where appropriate (mounts, fasteners, brackets, etc.)
• Create and review technical drawings, plans, and specifications
• Support requirements development and documentation
• Collaborate with our multi-disciplinary engineering team

What You Need:

• 5+ years of engineering experience
• Bachelor's degree in Mechanical Engineering
• Exposure to integrating or designing flight critical systems
• Proficient in CAD (Solidworks, NX, etc.) - NX preferred
• Ability to manage CAD and complex assemblies  in Team Center
• Proficient in load analysis, free body diagrams, and FEA
• Experience designing complex metallic parts and weldments
• Fluent in GD&T and creating manufacturing drawings
• Familiarity with aerospace hardware standards
• Hands-on experience in multiple technical fields especially those related to carbon composite and metallic structures
• Ability to communicate effectively and clearly

Bonus Qualifications:

• Bachelor’s degree in Aerospace, Mechanical, or Electrical Engineering (or equivalent)
• Knowledge of, and experience within, electric powertrain systems or aerospace systems.
• Familiarity with simscape
• Experience designing mechanisms for flight control systems
• Thorough understanding of electro-mechanical actuators 
• Thorough understanding of engineering product development including design phases, manufacturing processes and global supply chain management.
• Familiarization with Atlassian Jira and Confluence for task management and collaborative documentation.
• Experience supporting vehicle development from concept/prototype aircraft phase through certification and mass production
• Part 23 Certification Experience and/or experience working with ARP4754A.

At Archer, we aim to attract, retain, and motivate talent with the skills and leadership needed to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s strategy. For this position, we are targeting a base pay range of $144,000 - $198,000. Actual compensation offered will be determined by job-related knowledge, skills, and experience.        
                

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

About the Role

As a Principal Product Applications Engineer on the Leo team, you will sit at the intersection of firmware engineering and customer-facing technical engagement. You will be a key technical resource for enabling Leo CXL Smart Memory Controllers at hyperscale customers and OEM partners — owning firmware bring-up, validation, and customer issue resolution from early silicon through production ramp.

Firmware is considered equally important to hardware at Astera Labs, and this role reflects that. You will work directly with customers to ensure their needs are fully understood and translated into firmware solutions, while collaborating closely with the internal firmware, hardware, and systems engineering teams.

This position is required onsite in San Jose, CA.

Key Responsibilities

• Lead firmware-focused customer engagements for Leo CXL Smart Memory Controllers, including bring-up support, feature enablement, and issue triage on customer platforms
• Develop, validate, and debug firmware using C and Python across Leo's PCIe/CXL and DDR memory subsystems
• Spearhead internal and external discussions on design requirements of DDR4/DDR5 DRAM interfaces, including initialization, training, RAS (Reliability, Availability, Serviceability) features, and performance tuning 
• Serve as the primary firmware technical point of contact for key customer accounts (hyperscalers, OEMs), driving issue resolution and feature demonstrations
• Interpret and implement requirements from CXL, PCIe, and JEDEC DDR specifications into robust firmware solutions
• Collaborate with cross-functional teams (FW engineering, HW, systems, product management) to deliver firmware releases and customer collateral on schedule
• Develop and maintain Python-based test scripts, automation frameworks, and diagnostic tools to support validation and customer debug workflows
• Contribute to technical documentation including application notes, release notes, design guides, and customer-facing collateral
• Represent the Leo team in customer technical reviews, design-in engagements, and industry forums

Basic Qualifications

• Bachelor's degree in Electrical Engineering, Computer Science, or a related technical field; Master's degree preferred
• 8+ years of experience in firmware development, product applications engineering, or a related technical role supporting complex SoC/silicon products for Server, Storage, and/or Networking applications
• Professional attitude with the ability to prioritize a dynamic list of tasks and work with minimal guidance
• Entrepreneurial, open-minded behavior and can-do attitude — think and act fast with the customer in mind!
• Authorized to work in the US and available to start immediately

Required Experience

• High proficiency in C for embedded firmware development in RTOS environments
• Working knowledge of CXL (Compute Express Link) — CXL 1.1/2.0/3.0 — including memory expansion, pooling, and sharing concepts
• Proficiency in Python for scripting, test automation, and diagnostic tooling
• Deep hands-on knowledge of high-speed memory interfaces — DDR4 and/or DDR5 DRAM — including initialization sequences, training algorithms, timing margins, and ECC/RAS features
• Experience with firmware bring-up, debug, and validation of memory or I/O subsystems on server platforms
• Strong debugging skills with the ability to triage and root-cause issues in complex embedded systems
• Familiarity with SoC interfaces including DDR controllers, PCIe controllers, and on-chip memory subsystems
• Experience working with developer workflows: SCM (preferably Git), code reviews, CI/CD pipelines

Preferred Experience

• Experience with PCIe endpoint firmware at the PHY, Link, and Transaction layers; familiarity with PCIe enumeration, MSI/MSI-X, SR-IOV, and error handling
• Hands-on experience with PCIe/CXL protocol analyzers, BERT, and other lab debug equipment
• Familiarity with BIOS/BMC/OS interactions with PCIe/CXL devices and MMIO/RAS concepts
• Experience with server memory performance tuning — latency and bandwidth optimization
• Prior customer-facing or field applications experience in a semiconductor or systems company is a strong plus

Compensation

The base salary range for this role is $175,000 – $230,000 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

Astera Labs is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

About The Role:

As part of Archer’s mission to scale production of our cutting-edge eVTOL aircraft, we are seeking an Sr. Automation Controls Engineer to help design and build manufacturing automation at scale. This role goes beyond maintaining existing lines—it’s about architecting intelligent manufacturing systems from the ground up. We’re looking for a hands-on technical engineer who thrives on turning complex designs into reliable, scalable solutions, bridging the gap between early R&D concepts and flight-ready hardware.

The primary objective of this role is to collaborate with cross-functional teams to develop innovative machine and process concepts. You will lead the full controls system lifecycle, including programming PLCs, HMIs, robotics, and servo drives. In addition, this role involves drafting detailed electrical schematics and overseeing the procurement and fabrication of electrical control panels.

What You’ll Do:

• Assist in the development of high-volume production systems, from early process feasibility studies through scalable production
• Contribute to the development of Equipment Development Standards and templates to drive hardware and software standardization across the factory
• Partner with external system integrators to deliver equipment that meets Archer standards and specifications
• Provide machine design feedback from an electrical, controls, and machine/operator safety perspective; drive implementation with cross-functional teams to ensure compliance with regulatory requirements, Archer standards, equipment specifications, and field labeling
• Support installation, commissioning, and qualification of new equipment and tooling alongside system integrators
• Develop, deploy, and validate MES interfaces to production equipment
• Build HMIs from scratch and improve existing HMIs, with a focus on ignition and V8 systems
• Support in-line troubleshooting of electrical systems, control panels, field devices, and safety interlock circuits
• Develop comprehensive handoff packages for production and sustaining engineering teams
• Support continuous improvement efforts by identifying opportunities to improve quality, increase throughput, and reduce cost
• Specify and select controls and safety hardware, and program devices for prototype lines and internally developed equipment

What You Need:

• Bachelor’s degree in Electrical Engineering, Mechatronics, Mechanical Engineering, Computer Science, or related field, or equivalent hands-on automation experience
• 6+ years of hands-on experience in an industrial automation, controls, or manufacturing equipment environment
• Experience working as a Controls Engineer, Automation Engineer, Electrical Engineer, Applications Engineer, or Equipment Engineer
• Hands-on PLC programming experience, including:
• Allen-Bradley (primary)
• Beckhoff (nice-to-have)
• Siemens (nice-to-have / future-focused)
• Ability to modify existing PLC programs and/or develop logic from scratch
• Experience supporting automated manufacturing equipment or production lines
• Strong hands-on electrical troubleshooting skills
• Ability to read and understand electrical schematics
• Experience using AutoCAD Electrical and/or EPLAN (both acceptable)
• Familiarity with industrial communication protocols (e.g., Ethernet/IP or equivalent)
• Experience developing or supporting HMI systems
• Ignition experience is a plus, not required
• Exposure to SQL databases for logging, recipes, or data exchange between PLCs and higher-level systems
• Willingness to work onsite in a hands-on manufacturing environment
• Ability to travel up to ~20% (primarily domestic, later-phase support)

Bonus Qualifications:

• NFPA 70E certification
• RIA certifications (e.g., Certified Vision Professional, Certified Motion Control Professional)
• Hands-on experience with battery module and/or pack manufacturing
• Experience with PFMEA development
• Experience with NX and Teamcenter

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications.

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $126,700 - $158,400. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience. 

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

We are looking for a highly motivated and versatile Senior Platform Engineer to join our platform engineering team. This unique role is central to accelerating our product development lifecycle and operational efficiency. You will be instrumental in bridging the gap between development, infrastructure, and our burgeoning AI/ML initiatives, focusing on automation, self-service infrastructure, and workflow optimization. This position is ideal for an experienced engineer who thrives on creating leverage for others and tackling complex, interdisciplinary challenges.

Key Responsibilities:

CI/CD and Automation

• Design, implement, and maintain scalable and reliable CI/CD pipelines (e.g., using GitLab CI, GitHub Actions, Jenkins, Spinnaker) to ensure rapid and safe deployments across multiple environments.
• Drive the adoption of best practices for build management, testing automation, and deployment strategies (Canary, Blue/Green, etc.).
• Minimize deployment friction and cycle time for all engineering teams.

Self-Service Infrastructure & Provisioning

• Develop and champion self-service tooling and internal platforms (leveraging tools like Terraform, Ansible, Kubernetes, or equivalent cloud provider APIs) that empower development teams to provision and manage their own infrastructure resources securely and efficiently.
• Establish guardrails and policy-as-code to ensure compliance, cost efficiency, and security across all provisioned infrastructure.

AI Infrastructure Enhancement & Support

• Collaborate closely with AI/ML Engineers to improve the underlying platform used for model training, experimentation, and serving.
• Focus on the operationalization of MLOps pipelines, including data lineage tracking, feature store integration, and production model deployment automation.
• Assist in optimizing resource allocation (e.g., GPU usage, specialized hardware) for AI workloads.

Workflow Automation & Internal Tooling

• Architect and build automated workflows and bots, primarily within communication tools like Slack or Zoom, to streamline common engineering tasks (e.g., on-call handoffs, incident response, environment status checks, approval processes).
• Develop internal APIs and services that connect disparate engineering systems to enhance communication and cross-functional transparency.

Required Qualifications

• 5+ years of professional experience in Platform Engineering, DevOps, Site Reliability Engineering (SRE), or a related discipline.
• Deep expertise in cloud platforms (AWS, GCP, or Azure) and infrastructure-as-code tools (Terraform strongly preferred).
• Expertise in containerization and orchestration technologies (Docker and Kubernetes).
• Proficiency in scripting and general-purpose programming languages (e.g., Python, Go, Bash).
• Extensive experience designing and managing CI/CD systems at scale.
• Proven track record of building internal developer platforms or self-service tools.

Preferred Qualifications

• Experience with AI/ML infrastructure, MLOps tooling, or data pipeline technologies (e.g., Airflow, Kubeflow, Vertex AI, SageMaker).
• Prior experience building conversational interfaces, bots, or workflow automation tools for platforms like Slack or Teams.
• Familiarity with distributed tracing, logging, and monitoring systems (e.g., Prometheus, Grafana, ELK stack, Datadog).
• Experience with security best practices in a cloud environment (IAM, network security, secrets management).

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $144,000 - $175,000. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is proud to be an Equal Opportunity employer committed to diversity and inclusivity in the workplace. All aspects of employment are decided on the basis of merit, qualifications, and business needs. We do not discriminate based upon race, color, religion, sex, sexual orientation, age, national origin, disability status, protected veteran status, gender identity or any other characteristic protected by federal, state or local laws.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

What You’ll Do:

• Design mechanical integration solutions for powertrain components on prototype aircraft including: generators and  turboshaft engines
• Design detailed metallic parts and assemblies to support powertrain mounting, structural interfaces, and system integration
• Design inlet and exhaust ducting systems for turboshaft engines and thermal management systems on aircraft
• Collaborate with aerothermal analysts to optimize duct designs for performance, pressure drop, and thermal efficiency
• Collaborate with structural analysts to ensure designs meet strength, stiffness, and fatigue requirements
• Work closely with powertrain engineers and airframe team to ensure proper integration of all systems
• Own the prototype development process; requirements, design, BOM, procurement, assembly, test, etc.
• Complete handbook calculations to verify system performance and component margins
• Interface with suppliers to select COTS solutions where appropriate
• Develop verification testing strategies and see your designs through rigorous process intensive testing (DO-160G, etc.)
• Create and review technical drawings, plans, and specifications
• Support requirements development and documentation

What You Need:

• 5+ years of engineering experience
• Bachelor's degree in Mechanical Engineering
• Exposure to integrating air breathing turbomachinery or propulsion systems (Turbofan, Turboshaft, etc)
• Proficient in CAD (Solidworks, NX, etc.)
• Ability to manage CAD and complex assemblies  in Team Center
• Familiarity with Mil-Spec fasteners and aerospace hardware standards
• Proficient in FEA using professional tools (NASTRAN, ANSYS, Abaqus, etc.)
• Experience designing metallic parts including machined components, sheet metal, and weldments
• Fluent in GD&T and creating manufacturing drawings
• Hands-on experience in multiple technical fields especially those related to carbon composite, sheet metal ducting, and metallic structures

Bonus Qualifications:

• Bachelor’s degree in Aerospace, Mechanical, or Electrical Engineering (or equivalent)
• Knowledge of, and experience within, electric powertrain systems or aerospace systems.
• Thorough understanding of engineering product development including design phases, manufacturing processes and global supply chain management.
• Familiarization with Atlassian Jira and Confluence for task management and collaborative documentation.
• Experience supporting vehicle development from concept/prototype aircraft phase through certification and mass production
• Part 23 Certification Experience and/or experience working with ARP4754A.

At Archer, we aim to attract, retain, and motivate talent with the skills and leadership needed to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s strategy. For this position, we are targeting a base pay range of $144,000 - $198,000. Actual compensation offered will be determined by job-related knowledge, skills, and experience.        

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

About The Role

At Archer’s Product Realization Lab, we build the high-power electromechanical infrastructure that makes flight possible. From megawatt-scale dynamometers to complex electrical test stands, we own the full stack: integration, software, and controls.

We are seeking a Senior Electrical (Test) Systems Engineer to serve as the ultimate authority on system health. This isn't a "follow the manual" role. You’ll be operating at the volatile intersection of high-voltage power and sensitive low-voltage instrumentation—a boundary where noise, grounding issues, and transients create real-world consequences. We need a battle-tested expert who has seen these systems fail in industry and knows exactly how to build them to last.

What You’ll Do

• Diagnose and resolve electrical faults in medium- to high-power test systems including voltage/current ripple, transient noise, EMI, and grounding failures, with full ownership of root-cause findings and mitigation recommendations
• Lead grounding architecture reviews and remediation across the lab, with specific focus on how high-voltage ground faults cascade into low-voltage instrumentation systems
• Set up and operate oscilloscopes, signal conditioning hardware, and bench instrumentation to characterize and isolate electrical anomalies in complex, integrated test environments
• Own ongoing support of delivered test systems including software updates, bug fixes, new feature integration, and in-field troubleshooting to ensure systems remain reliable as configurations evolve
• Build and maintain real-time test and control applications using NI VeriStand and LabVIEW, and interface with subsystems via CAN bus, Modbus, and related industrial communication protocols
• Support system bring-up, integration verification, and validation across hardware, controls, and software layers

What You Need

• Degree in Electrical Engineering (BS, MS, or PhD) or equivalent hands-on industry experience
• Proven experience personally diagnosing and resolving faults in high-power or high-voltage electrical systems with root cause ownership, not just oversight
• Deep hands-on expertise with grounding architecture in mixed high/low voltage environments, including experience solving real grounding failures that impacted low-voltage instrumentation
• Expert-level proficiency with oscilloscopes, signal conditioning hardware, and bench instrumentation as everyday diagnostic tools
• Working knowledge of CAN bus and Modbus in deployed, real-world systems and not coursework or theoretical familiarity
• Experience with NI VeriStand and/or LabVIEW for real-time test and control applications, with the ability to troubleshoot across hardware, controls, and software layers
• Demonstrated ability to support and evolve test systems post-delivery, comfortable owning sustaining engineering, software updates, and fielded system troubleshooting alongside greenfield work

Bonus Qualifications

• Experience in aerospace, EV powertrain, motor drive, or power electronics test environments
• Familiarity with additional fieldbus or industrial protocols (EtherCAT, Ethernet/IP, LIN, RS-232/485)
• Python or MATLAB scripting for data analysis or automation
• Background in HIL (Hardware-in-the-Loop) or real-time validation systems
• Familiarity with electrical CAD tools (EPLAN, AutoCAD Electrical)

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications.

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $126,700 - $158,400. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is committed to provide a safe workplace and a safe aircraft. This is a safety sensitive designated role. Employment in safety sensitive positions is contingent on successful passage of a background check and is subject to pre-employment and random drug screening.

About the Role

As part of the mission at Archer, we’re scaling production of our cutting-edge Electric Propulsion System (EPS) — the heart of our eVTOL aircraft. EPS comprises the Electric Motor and Propeller assemblies and represents one of the most technically demanding, highly automated manufacturing systems in our factory.

We’re looking for a Powertrain Manufacturing Engineer who is passionate about bridging design and production — someone who thrives on creating scalable manufacturing systems, optimizing complex processes, and building world-class hardware from the ground up.

What You’ll Do:

• Contribute to the design and scaling of Archer’s Electric Propulsion System production line — from concept to high-rate manufacturing — including layout, automation strategy, tooling, and ramp-up planning.
• Collaborate cross-functionally with Product Design, Quality, Facilities, and Manufacturing teams to bring new electric motor and propeller systems into production.
• Design for Manufacturability (DFM) efforts to ensure products are built efficiently, safely, and at scale.
• Develop and execute comprehensive manufacturing build plans — defining part flow, line layout, tools, equipment, and the manufacturing bill of materials (MBOM).
• Specify and validate automation systems, tooling, and test equipment to support high-reliability production.
• Perform PFMEA (Process Failure Mode & Effects Analysis) to proactively identify and mitigate risk in the production system.
• Author and approve detailed work instructions for EPS assembly and installation.
• Support first article builds and production validation testing to ensure process stability and repeatability.
• Drive continuous improvement through Lean, Six Sigma, and structured problem-solving methodologies.

What You’ll Bring:

• Bachelor’s degree in Electrical, Mechanical, or Manufacturing Engineering (or equivalent).
• 3+ years of relevant experience in manufacturing engineering — preferably in EV, aerospace, or advanced hardware production.
• Hands-on experience in equipment commissioning, OEE improvement, and maintenance program development (preventive/predictive).
• Experience building mechanical and electronic assemblies using sophisticated manufacturing tools and equipment.
• Knowledge of CAD, PLM, MES, and ERP systems.
• Strong foundation in GD&T and statistical process control (SPC).
• Demonstrated ability to use structured problem-solving tools such as DMAIC, 8D, or 5 Whys.
• Well-developed communication and documentation skills — able to translate complex technical challenges into clear actions.
• Self-starter attitude with the ability to thrive in a fast-paced, highly regulated environment.

Bonus Points:

• Experience with EV Drive Unit (DU) manufacturing — rotor, stator, or gearbox assembly.
• Background in industrial automation (PLC, robotics, gantries).
• Familiarity with high-voltage systems, batteries, or electric motors.
• Knowledge of aircraft conformity or configuration management.
• Experience with NX and AutoCAD.
• Willingness to travel up to 10%.

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications.

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $126,700 - $158,400. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

About the Role

As part of the mission at Archer, we’re scaling production of our cutting-edge Electric Propulsion System (EPS) — the heart of our eVTOL aircraft. EPS comprises the Electric Motor, Inverter and Propeller assemblies and represents one of the most technically demanding, highly automated manufacturing systems in our factory.

We’re looking for a Powertrain Manufacturing Engineer who is experienced with power electronic assemblies and is passionate about bridging design and production — someone who thrives on creating scalable manufacturing systems, optimizing complex processes, and building world-class hardware from the ground up.

What You’ll Do:

• Contribute to the design and scaling of Archer’s Electric Propulsion System production line — from concept to high-rate manufacturing — including layout, automation strategy, tooling, and ramp-up planning.
• Collaborate cross-functionally with Product Design, Quality, Facilities, and Manufacturing teams to bring new electric motor and propeller systems into production.
• Design for Manufacturability (DFM) efforts to ensure products are built efficiently, safely, and at scale.
• Develop and execute comprehensive manufacturing build plans — defining part flow, line layout, tools, equipment, and the manufacturing bill of materials (MBOM).
• Specify and validate automation systems, tooling, and test equipment to support high-reliability production.
• Perform PFMEA (Process Failure Mode & Effects Analysis) to proactively identify and mitigate risk in the production system.
• Author and approve detailed work instructions for EPS assembly and installation.
• Support first article builds and production validation testing to ensure process stability and repeatability.
• Drive continuous improvement through Lean, Six Sigma, and structured problem-solving methodologies.

What You’ll Bring:

• Bachelor’s degree in Electrical, Mechanical, or Manufacturing Engineering (or equivalent).
• 5+ years of relevant experience in manufacturing engineering — preferably in EV, aerospace, or advanced hardware production.
• Experience building mechanical and electronic assemblies using sophisticated manufacturing tools and equipment.
• Hands-on experience with one of the following:
• Inverter production: sensitive electronic device assembly.
• Rotor/stator/engine production: heavy machinery and pressing operations.
• Knowledge of CAD, PLM, MES, and ERP systems.
• Strong foundation in GD&T and statistical process control (SPC).
• Demonstrated ability to use structured problem-solving tools such as DMAIC, 8D, or 5 Whys.
• Well-developed communication and documentation skills — able to translate complex technical challenges into clear actions.
• Self-starter attitude with the ability to thrive in a fast-paced, highly regulated environment.

Bonus Points:

• Experience with EV Drive Unit (DU) manufacturing — rotor, stator, or gearbox assembly.
• Background in industrial automation (PLC, robotics, gantries).
• Familiarity with high-voltage systems, batteries, or electric motors.
• Knowledge of aircraft conformity or configuration management.
• Experience with NX and AutoCAD.
• Willingness to travel up to 10%.

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications.

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $126,700 - $158,400. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

About the Role

As part of the mission at Archer, we’re scaling production of our cutting-edge Electric Propulsion System (EPS) — the heart of our eVTOL aircraft. EPS comprises the Electric Motor, Inverter and Propeller assemblies and represents one of the most technically demanding, highly automated manufacturing systems in our factory.

We’re looking for a Powertrain Manufacturing Engineer who is experienced with electric motors and its integration into the higher level assembly and is passionate about bridging design and production — someone who thrives on creating scalable manufacturing systems, optimizing complex processes, and building world-class hardware from the ground up.

What You’ll Do:

• Contribute to the design and scaling of Archer’s Electric Propulsion System production line — from concept to high-rate manufacturing — including layout, automation strategy, tooling, and ramp-up planning.
• Collaborate cross-functionally with Product Design, Quality, Facilities, and Manufacturing teams to bring new electric motor and propeller systems into production.
• Design for Manufacturability (DFM) efforts to ensure products are built efficiently, safely, and at scale.
• Develop and execute comprehensive manufacturing build plans — defining part flow, line layout, tools, equipment, and the manufacturing bill of materials (MBOM).
• Specify and validate automation systems, tooling, and test equipment to support high-reliability production.
• Perform PFMEA (Process Failure Mode & Effects Analysis) to proactively identify and mitigate risk in the production system.
• Author and approve detailed work instructions for EPS assembly and installation.
• Support first article builds and production validation testing to ensure process stability and repeatability.
• Drive continuous improvement through Lean, Six Sigma, and structured problem-solving methodologies.

What You’ll Bring:

• Bachelor’s degree in Electrical, Mechanical, or Manufacturing Engineering (or equivalent).
• 7+ years of relevant experience in manufacturing engineering — preferably in EV, aerospace, or advanced hardware production.
• Experience building mechanical and electronic assemblies using sophisticated manufacturing tools and equipment.
• Hands-on experience with one of the following:
• Thrust Assembly (or EPS) classified as the completed unit, integrating the electric engine with the propeller and miscellaneous parts.
• Inverter production: sensitive electronic device assembly.
• Rotor/stator/engine production: heavy machinery and pressing operations.
• Knowledge of CAD, PLM, MES, and ERP systems.
• Strong foundation in GD&T and statistical process control (SPC).
• Demonstrated ability to use structured problem-solving tools such as DMAIC, 8D, or 5 Whys.
• Well-developed communication and documentation skills — able to translate complex technical challenges into clear actions.
• Self-starter attitude with the ability to thrive in a fast-paced, highly regulated environment.

Bonus Points:

• Experience with EV Drive Unit (DU) manufacturing
• Background in industrial automation (PLC, robotics, gantries).
• Familiarity with high-voltage systems, batteries, or electric motors.
• Knowledge of aircraft conformity or configuration management.
• Experience with NX and AutoCAD.
• Willingness to travel up to 10%.

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications.

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $152,100 - $190,100. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

What you’ll do:

• Lead the end-to-end design of high voltage battery pack components across commercial and defense aircraft programs.
• Collaborate with key stakeholders including CAE engineers, quality, testing, supply chain, and manufacturing.
• Provide hands-on prototyping, building, and root cause support throughout the design cycle.
• Work closely with integration and certification teams to ensure the product meets all FAA certification requirements.
• Push conventional battery design boundaries to meet stringent aerospace application requirements.
• Establish design standards and best practices for battery design at Archer.
• Mentor early career battery design engineers.
• Develop the battery hardware technology roadmap for future applications.

What you need:

• Bachelor’s degree in Mechanical, Aerospace Engineering, or a related field.
• 10+ years of mechanical design experience, preferably in high voltage battery design for automotive or aerospace.
• Strong engineering fundamentals (structural design, materials, heat transfer, fluids, etc.).
• Solid background in CAD (NX preferred), tolerance stack analysis, and 2D drafting with GD&T.
• Experience developing parts with various manufacturing processes in both prototype and mass production settings.
• Ability to use simplified tools, calculations, and CAE to quickly drive development.
• Hands-on prototype and build experience.
• Exceptional communication skills.

At Archer, we aim to attract, retain, and motivate talent with the skills and leadership needed to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s strategy. For this position, we are targeting a base pay range of $207,800 - $259,600. Actual compensation offered will be determined by job-related knowledge, skills, and experience.        

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

Our team is seeking a talented and versatile Full Stack Software Engineer responsible for building and maintaining essential tools and automations which allow our diverse aerospace engineering teams to be efficient while remaining compliant to external and internal process standards. You'll be working directly with data used to define, test, configure aviation systems and aircraft flight testing, leveraging DevOps best practices.

What You'll Do

Develop Full-Stack Web Applications and Integration Tools: Design, build, and maintain modern Typescript, Javascript and Go applications to assist with testing, data capture, and config management of our aircraft. This work will span web applications, web APIs and desktop environments, initially focused on the management of airplane system test lab configurations.Identify Gaps in Processes and Workflows: Use existing vehicle development knowledge and previous experience to identify new tooling and application needs, as well as optimize or refactor existing toolchains and integrations

• Build for Reliability: Ensure the infrastructure and tooling you create are scalable, reliable, and easy to maintain. Document your work and champion best practices across the engineering organization.
• Collaborate Cross-Functionally: Work closely with hardware engineers, embedded software developers, and integration / lab teams to understand their requirements and build the tools they need to succeed.

Required Qualifications

• Bachelor's degree in Computer Science, Electrical Engineering, or a related technical field, or equivalent practical experience.
• 5+ years of professional software development experience, with a strong emphasis on tooling, automation, or DevOps.
• 2+ years of software tool development experience in the Aerospace industry
• Experience with front-end development (e.g. using Typescript / React)
• Experience with back-end development (e.g. using Node Express or Gin)
• Strong ability with relational databases and schema design (e.g using postgres)
• A strong foundation in software development best practices, including version control (Git), code reviews, and testing.

Preferred Qualifications

• Familiarity with GraphQL and GraphQL backend engines (bonus for Hasura)
• Experience with modern React/TypeScript frontend libraries (e.g. Flowbite-React, PrimeReact )
• Proficient in writing and maintaining automated tests using frameworks (e.g. Jest, React Testing Library)
• Demonstrable experience designing, building, and maintaining Tailwind CSS Web Interfaces
• Experience building RESTful APIs
• Experience with containerization (Docker) and orchestration (Kubernetes).
• Knowledge of hardware communication standards like CAN bus, ARINC-429, or RS-422.

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $173,000 - $216,000. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

We are an equal-opportunity employer committed to creating a diverse and inclusive workplace. All qualified applicants will receive equal consideration for employment without regard to race, color, creed, religion, sex, gender identity, sexual orientation, national origin, disability, uniform service, Veteran status, age, or any other protected characteristic per federal, state, or local law, including those with a criminal history, in a manner consistent with the requirements of applicable state and local laws.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

What you’ll do

• Report to the Director of Product Quality and serve as the primary Engineering Lead for the development, implementation, and governance of Archer's enterprise Metrology and Dimensional Engineering Program.

• Engineer and execute the strategic roadmap for metrology hardware and software integration, ensuring digital continuity between CAD models and physical inspection results.

• Lead the engineering of comprehensive aircraft inspection plans, utilizing Model-Based Definition (MBD) and advanced GD&T synthesis to ensure design intent is maintained through the conformity phase.

• Architect a robust verification framework for the Midnight program; perform technical risk assessments and engineering analysis on critical characteristics to determine optimal inspection intervals and methods.

• Design, validate, and standardize complex measurement algorithms for critical aircraft features (e.g., wing dihedral, twist, and sweep), utilizing high-precision laser trackers and spatial analyzer platforms.

• Provide engineering oversight for the authoring of technical procedures, ensuring measurement uncertainty budgets and gauge R&R studies meet aerospace structural requirements.

• Act as a technical liaison to Design Engineering, influencing the "Design for Inspection" (DFI) philosophy by reviewing engineering drawings and CAD models for metrology compatibility.

• Lead Dimensional Control investigations into non-conformances, utilizing root cause analysis and engineering principles to resolve complex assembly interface issues.

What you need

• BS or MS in Mechanical Engineering, Aerospace Engineering, Physics, or a related technical field.

• 10+ years of experience in Metrology Engineering or Dimensional Management within aerospace, defense, or high-precision manufacturing.

• Expert-level proficiency in Metrology Engineering software (e.g., PolyWorks, Calypso, or Spatial Analyzer), with the ability to script or automate complex measurement routines.

• Deep technical mastery of ASME Y14.5 (GD&T), including the ability to perform complex 3D tolerance stack-up analysis and influence design tolerances.

• Strong experience in Metrology Systems Engineering, including the selection, commissioning, and qualification of enterprise-level measurement cells (CMM, Laser Tracker, Photogrammetry).

• Demonstrated ability to lead cross-functional engineering projects, bridging the gap between design requirements and manufacturing capabilities.

• Working knowledge of aerospace quality and engineering standards (AS9100, AS9103, AS9145).

Bonus qualifications

• Professional Engineering (PE) license or relevant certifications (e.g., ASQ Certified Calibration Technician or ASQ CQE).

• Experience in Composite Engineering metrology, specifically regarding spring-back analysis and the inspection of large-scale carbon fiber structures.

• Experience with Automated Metrology (Robotic Integration) or In-situ monitoring systems in a high-rate production environment.

• Familiarity with Finite Element Analysis (FEA) results as they relate to predicted versus actual dimensional variations.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

What You’ll Do:

• Support the Design, Fabrication, Developmental Test, and Certification Efforts of Archer’s piloted eVTOL aircraft project.
• Perform the Electrical Installation Design for all Flight Test Instrumentation related hardware for flight test aircraft. 
• Support the Installation planning and liaison manufacturing for the installation of flight test instrumentation onto test aircraft in buildup and in active test.
• Work with internal customers and vendors to solve instrumentation and measurement related challenges. 
• Key advisor to the Instrumentation Director regarding all aircraft instrumentation electrical design activities.
• Develop processes and documentation to support the installation and maintenance of flight test instrumentation.
• Collaborate with the Flight Test Engineering and Certification Teams to plan and perform all required development and certification flight test activities.
• Collaborate with all engineering design and analysis teams to establish a comprehensive instrumentation plan including, but not limited to, monitoring of strain, temperature, vibration, pressure, airdata, ECS, etc.  
• Assist in designing all hardware required for flight test. For example, instrumentation racks, air data booms, aircrew interfaces, workstations, camera systems, telemetry systems, etc.
• Support instrumentation technicians and Aircraft Operations Team in the implementation of instrumentation designs.
• Ensure flight test instrumentation activities are completed on time and within budget.

What You Need:

• B.S. in Engineering
• 7+ years experience as Electrical Design Engineer or Instrumentation Engineer
• Experience with design and installation of wiring for flight
• Experience with the routing of wires/harnesses for aircraft 
• Experience generating work instructions
• Experience with design for manufacturing
• Must be able to lift 30 lbs unassisted

Bonus Qualifications:

• Flight test configuration management process experience
• Experience with FTI systems and sensor maintenance
• Experience in Siemens Capital for Diagrams and Harnesses 
• Experience as an instrumentation engineer or in an instrumentation related field
• Experience managing drawing configuration 
• Experience training people on Basics and Advanced Design Topics

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications.

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $185,000 - $235,000. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

About the Role

As the Design Data Integrity Engineer, you will ensure the accuracy, completeness, and compliance of engineering drawings and models. You will serve as the quality gate for design data, verifying adherence to drafting standards, dimensioning practices, and configuration management requirements before release. Your work will directly support the production of error-free, manufacturable, and compliant engineering designs.

What You'll Do

• Review and verify engineering drawings, models, and documentation against company, industry, and regulatory standards
• Check drawings for compliance with ASME Y14.5 Geometric Dimensioning and Tolerancing (GD&T) and ASME Y14 drafting standards
• Identify and document errors, inconsistencies, and missing information in design data
• Provide clear feedback and recommendations to design engineers for correction and improvement
• Validate the accuracy of CAD models and associated metadata before release
• Ensure drawings reflect design intent and support producibility and manufacturability
• Collaborate with multiple design engineering organizations supporting multiple commodity types while ensuring design standards and configuration management processes are met.
• Eg. Machine Parts, Composites, Wiring Harnesses, PCBAs, etc.
• Support drawing release processes within PLM systems (e.g., Teamcenter, Windchill, Enovia)
• Coordinate with Configuration Management team when drawing/model issues may impact change notices, effectivity, or configuration control
• Participate in tolerance stack-up and interface checks to ensure fit, form, and function integrity
• Contribute to process improvements that enhance drawing quality and release efficiency

What You Need

• To be detail-oriented with a strong ability to identify discrepancies in complex design data
• 5+ years of experience in producing, reviewing or checking engineering drawings or model based definition in aerospace, automotive, or other complex product environments
• Proficiency with CAD tools (NX, CATIA, CREO, or equivalent) for viewing and validating models and drawings
• Experience with Product Lifecycle Management (PLM) systems such as Teamcenter, Windchill, or Enovia
• Strong knowledge of ASME Y14.5 GD&T and ASME Y14 drafting standards
• Ability to interpret engineering drawings, CAD models, and metadata accurately
• Familiarity with tolerance analysis and drawing release processes
• Basic understanding of configuration management concepts (effectivity, baselines, change control)
• Effective written and verbal communication skills to document findings and provide feedback
• Ability to collaborate across design, manufacturing, quality, and configuration management teams
• Bonus Qualifications
• Prior experience working for an aerospace OEM or tier 1 supplier, with exposure to large-scale product development and release processes
• Background as a senior design engineer interested in contributing their expertise to shape methods, standards, and best practices across the organization while remaining engaged in new aircraft design
• Experience checking flight hardware, test hardware, or ground support equipment drawings
• Familiarity with model-based definition (MBD) and digital thread practices
• Knowledge of design for manufacturability (DFM) and producibility best practices
• Exposure to tolerance stack-up and interface analysis workflows
• Experience mentoring or guiding junior engineers and drafters on drawing standards
• Hands-on experience with aerospace or highly regulated engineering environments

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

What you’ll do:

• Architect and lead the team managing Archer’s lab integration environments supporting validation and verification activities, handling quality evaluations, human factor evaluations and test pilot training.
• Collaborate cross-functionally with internal groups and suppliers to integrate, instrument and maintain configuration of simulation models in a real-time, integrated hardware-in-the-loop environments .
• Own end-to-end configuration of simulation environments (e.g., SIL, HIL, CeRT, Iron Bird), including data analysis and simulation correlation with flight test data.
• Develop and optimize simulation pipelines including CI/CD integration for automated deployment, execution, and monitoring.
• Integrate third-party software/hardware systems into cohesive simulation architectures.
• Set technical standards, provide mentorship, and foster a collaborative and high-performance engineering culture.
• Guide the design and build of graphical user interfaces to control the real-time simulation environment.
• Lead task decomposition, technical planning, and debugging of complex issues across real-time and distributed systems.
• Influence tool architecture in support of lab configuration and automation

What you need:

• 9+ years of experience in simulation software development and systems integration.
• Bachelor's or higher degree in Aerospace, Software, Electrical Engineering, Computer Science, or a related field.
• Seasoned technical lead for an engineering team; providing guidance in planning and execution.
• Advanced proficiency in C/C++ and Python.
• Very experienced  in MATLAB/Simulink.
• Extensive experience developing real-time HIL test infrastructures.
• Proven ability to develop simulation tools with a focus on usability, modularity, and performance.
• Expert of communication standards and protocols (RS-422/485, CAN/CAN-FD, ARINC-429, Ethernet, TCP/IP, USB etc…)
• Experience prototyping Graphical User Interfaces based on user feedback.

• Knowledgeable with software engineering practices including CI/CD (GitHub Actions, Jenkins), test-driven development, and agile methodologies.
• Strong problem-solving and debugging skills with a proactive, solutions-oriented mindset.
• Comfortable working in cross-disciplinary teams and mentoring junior engineers.
• Comfortable leading Agile/SCRUM methodologies and tools throughout the organization
• Familiarity with Tool Qualification Levels TQL

Preferred Qualifications

• Experience with aerospace, spacecraft, or robotics systems—including modeling of flight dynamics, sensor-actuator loops, or avionics.
• Proficiency in the NI software suite (LabVIEW, VeriStand).
• Experience developing and troubleshooting custom code (i.e. plugins, logical devices, custom devices) for real-time OS
• Background in simulation infrastructure for VTOL, rotorcraft, or autonomous vehicles.
• Understanding of control theory, GNC algorithms, and physics-based modeling.
• Hands-on experience with HIL/SIL test rigs, hardware communication protocols, and test instrumentation.
• Exposure to regulatory frameworks (FAA, DoD, NASA) and test certification environments.
• Startup or fast-paced development experience is a plus.
• Experience automating and executing test plans.
•  Experience with DO-178 and other aviation standards  
• Familiarity with fault injection methodologies.
• Familiarity with lab equipment such as oscilloscopes, logic analyzers and protocol analyzers.

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $170,000 - $215,000. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

As a Design Engineer - Avionics Integration, you will work on aircraft-level avionics systems integration within the Advanced Projects group. We are a small but diverse group of multi-disciplinary engineers responsible for the rapid development of future Archer aircraft concepts, taking them from idea to experimental flight testing on aggressive accelerated timelines. In this role, you will play a critical role in integrating and optimizing the avionics systems packaging throughout Archer’s future hybrid-electric aircraft platform.

What You’ll Do:

• Design and Engineering
• Develop and maintain CAD and drawings to document interfaces between avionics subsystems and airframe interfaces
• Own and maintain avionics envelope CAD models and keep out zones to enable comprehensive vehicle package studies
• Maintain avionics configuration management, tracking various pedigrees and versions of hardware
• Assist in defining assembly processes and techniques and standardizing across the department
• Collaborate with manufacturing team to ensure seamless aircraft integration processes
• Analysis and Project Management 
• Maintain comprehensive mass budget tracking for all avionics subsystems, identifying risks and weight optimization opportunities
• Conduct trade studies to optimize system integration, mass efficiency, and performance
• Support test planning and validation activities for thrust unit assemblies
• Analyze test data and implement design improvements based on findings
• Collaboration
• Work cross-functionally with sourcing and quality teams to support supplier selection, component qualification, and inspection requirements for integration components
• Participate in design reviews and provide technical expertise for critical integration decisions
• Drive improvements to existing processes and develop new procedures as needed

What You Need:

• Education & Experience
• Bachelor's Degree in mechanical/aerospace engineering, or related field
• 2-15 years with system-level integration and interface management 
• Experience generating Bills of Materials (BOM) and managing change control processes
• Technical Expertise
• Proficiency in CAD modeling (NX preferred), 2D drawings, tolerance analysis, and GD&T
• Understanding of mass budgeting, configuration management, and systems integration
• Knowledge of manufacturing processes for aerospace structural components including machining, joining methods, and composite manufacturing
• Communication and Organization
• Proven ability to coordinate cross-functional technical initiatives across multiple subsystem teams
• Excellent documentation and communication skills for maintaining complex interface requirements
• Capacity to manage multiple integration challenges and priorities simultaneously
• Strong analytical and problem-solving skills for resolving interface conflicts
• Additional Requirements
• Availability for domestic travel as needed
• Demonstrated commitment to safety and quality in engineering practices

Bonus Qualifications:

• Aerospace development and certification experience
• Deep understanding of prototype development lifecycle and the unique requirements for experimental flight test vehicles
• Familiarity with regulatory requirements and design practices for system separation (e.g., flight-critical vs. non-critical systems).
• Demonstrated hand-on experience in a prototype environment through prior work or personal projects
• Self-motivated with exceptional attention to detail and systems-thinking approach

At Archer, we aim to attract, retain, and motivate talent with the skills and leadership needed to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s strategy. For this position, we are targeting a base pay range of $124,000 - $198,000. Actual compensation offered will be determined by job-related knowledge, skills, and experience.        
        

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

What you’ll do:

• Design and develop fault tolerant and high power density motor controller including drivers, sensors, power stages, and embedded control interfaces
• Be responsible for all aspects of power electronics designs from components, circuits, modules and system integration 
• Passive component design and optimization in power electronics systems
• EMC and Lightning design, analysis, and testing for low voltage and high voltage electronic systems
• Lead new designs from conception into production while working with a multidisciplinary team
• Start to finish ownership of hardware – from specification to design, prototype, reliability validation and manufacturing
• Requirements capture, topology trade-study and performance modeling
• Schematic, layout and PCB assembly design and review
• Design and carry out prototype verification tests for proof of concept
• Analyze test data and reports to verify functional and performance specifications.
• Troubleshoot and execute root cause analysis on prototype and production designs.

What you need:

• Electrical Engineering Degree or equivalent experience.
• 3+ years of relevant electrical system and circuit board design experience.
• Sound knowledge and hands-on experience in traditional and modern power electronic technologies including (not limited to):
• Inverter technology for variable speed motor drive (MOSFET, rectifiers and gate driver PWM technologies).
• Passive power devices, e.g. inductors, capacitors, resistors and transformers.
• Power electronics system architecture design and hardware integration.
• Motor drive and power converters (AC-DC, DC-DC, DC-AC) control technologies.
• Motor control and commutation methods for various types of three phase motors.
• Microcontrollers and processors
• Sensor technology and implementation
• Gate drive design for wide bandgap devices (SiC and GaN)
• Experience with 1-10kW inverters at 400V-1000V
• Experience in using schematic capture and circuit simulation software (e.g. Altium Designer or Xpedition). 
• PCB layout experience
• Experience performing circuit design analyses such as worst-case circuit analysis, fault analysis, and reliability analysis
• Experience in design for test and design for high volume manufacture
• Mastery of all types of lab instruments: oscilloscope, EMC analyzers etc.
• Excellent organizational and communication skills

Bonus Qualifications: 

• Hands on experience with DO-160G testing and DO-254 development
• Masters or Ph. D. in electrical engineering 
• Embedded firmware development experience
• Passion for aviation and eVTOLs

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $120,000.00 - $150,000.00. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.