Role 

We are looking for a Staff Site Reliability Engineer to join our Cloud Infrastructure & Operations team in our San Jose, CA HQ Office. This is a hybrid role reporting to the Chief Architect, REIS. You are an SRE with proven experience in Linux/UNIX System Administration and hands-on expertise in building infrastructure and managing platforms like Kubernetes using automation tools and high security standards. In this role, you will troubleshoot complex Linux networking and security issues, apply a strong understanding of firewall technologies, and manage access across various systems, platforms, and applications.

What you’ll do (Role Expectations)

• Create and maintain highly scalable solutions based on KVM Linux, Kubernetes, and Public Cloud Providers
• Analyze and troubleshoot systems performance and complex issues across operating systems and applications
• Maintain platform security and observability through nftables and comprehensive monitoring
• Manage and deploy systems and software in diverse environments, including Kubernetes and Openstack
• Write and maintain custom tools using Python, Golang, and BASH

Who You Are (Success Profile)

• You thrive in ambiguity and are comfortable building the path as you walk it, seeing a dynamic environment as the raw material to build something meaningful.
• You are a problem-solver who seeks out challenges because you are energized by finding solutions that deliver the biggest impact.
• You operate with urgency and maintain a relentless focus on execution, understanding that speed and quality are not mutually exclusive in a high-growth environment.
• You are driven by innovation and a deep curiosity for how things work, always looking for a better, more secure, and scalable way to accelerate transformation.
• You lead with integrity and hold yourself to a high standard of accountability, building trust by matching your words with consistent, transparent action.

What We’re Looking for (Minimum Qualifications)

• Strong understanding of web security, protocols, and SSH
• Technical security aptitude including PGP, SSH, PKI, and Multi-factor authentication
• Mastery of network fundamentals including DHCP, ARP, subnetting, routing, NAT, firewalls, and IPv4/IPv6
• Experience in container orchestration services including Docker and Kubernetes, alongside automation tools like Ansible
• 5+ years of experience in a Linux/UNIX System Administration or SysAdmin role

What Will Make You Stand Out (Preferred Qualifications)

• Strong Openstack and CEPH experience paired with advanced Kubernetes expertise
• Extensive professional history in dedicated Linux System Administration roles
• Direct experience with Secrets Management Systems such as Hashicorp Vault or similar technologies

#LI-Hybrid 

#LI-CM3

Who we are: 

Archer is an aerospace company based in San Jose, California building an all-electric vertical takeoff and landing aircraft with a mission to advance the benefits of sustainable air mobility. We are designing, manufacturing, and operating an all-electric aircraft that can carry four passengers for 100 miles at speeds of up to 150 mph while producing minimal noise. 

Our sights are set high and our problems are hard, and we believe that diversity in the workplace is what makes us smarter, drives better insights, and will ultimately lift us all to success. We are dedicated to cultivating an equitable and inclusive environment that embraces our differences, and supports and celebrates all of our team members.

What you’ll do:

• Own the development, documentation, and improvement of the airframe loads development process
• Collaborate with teams that interface with loads (aerodynamics, airframe, engine, mass properties, mechanical systems, propeller, etc.)
• Responsible for providing static and fatigue loads that are directly consumable by all downstream users (airframe, engine, mechanical systems, propeller, etc.)
• Responsible for providing clear documentation of loads assumptions and methods to generate traceable and repeatable analyses.
• Support wind tunnel and flight test planning and execution in the areas of external airframe loads, propeller loads, aeroelasticity, and aeromechanics, including test plan development, instrumentation and data acquisition definition, test monitoring and execution, data analysis and interpretation, and test report writing.
• Participate in loads means and methods of compliance discussions with the FAA
• Support preparation of certification test plans

What you need:

• BS / MS in Aerospace Engineering or a related field
• 5+ years of experience developing processes for loads analysis and downselection for air vehicles 

• Working knowledge of structural analysis and test, including a fundamental understanding of strength, stability and fatigue failure mechanisms

• Proficiency in Python and/or Matlab scripting
• Familiarity with software development best practices and version control

• Strong technical, written, and verbal communication skills
• Ability to work in groups and individually
• Experience in a fast-paced design environment

Bonus Qualifications:

• Knowledge of aircraft, rotorcraft, and propeller certification standards (14 CFR Parts 23, 27, and 35)
• Experience with structural dynamics, rotor dynamics, and vibratory loads
• Experience developing FE models (NASTRAN or similar structural solvers) Experience with rotorcraft comprehensive simulation tools (such as RCAS or CAMRAD)
• Experience with fixed-wing and rotorcraft aerodynamics, structures, flight dynamics, and vehicle performance
• Experience in developing loads for eVTOL vehicles and/or tiltrotors, including loads for airframe components, tilting mechanisms, and propeller blades.
• CAD (NX preferred)
• Pilot’s license

At Archer, we aim to attract, retain, and motivate talent with the skills and leadership needed to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s strategy. For this position, we are targeting a base pay range of $172,800 - $225,600. Actual compensation offered will be determined by job-related knowledge, skills, and experience.           
        

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Develop and maintain highly interactive, large-scale and complex web-based visual analytics tools on AI/ML workloads.
• Design and implement creative and performant visualizations to assist in diagnosing issues or uncovering optimization opportunities in AI/ML inference and serving.
• Collaborate closely with hardware architects and compiler engineers to define, design, and implement effective visualization solutions enhancing their workflow.
• Develop high-performance visualization workflows by integrating independent graphics modules with micro-services to handle asset optimization, ensuring a non-blocking experience on the client.
• Continuously seek improvements to existing tools and develop new approaches to meet fast-evolving requirements.
• Stay up-to-date with the latest advancements in web development and visualization techniques.
• Contribute to the development of the documentation and user guides.
• Complete other responsibilities as assigned.

What You Bring

• Bachelor’s with 10+ years, or Master’s with 8+ years, or PhD's with 5+ years of industry experience.
• An innate drive to clarify deep technical complexity, balancing creative visualization with engineering rigor to build analytical tools that make interdependent hardware and software models intuitive without sacrificing logical precision.
• Strong experience in full-stack visual analytics software development, with a focus on building scientific or infrastructure visualization tools. Experience in AI model visualization integrated with PyTorch is a plus.

• Strong proficiency in modern frontend technologies like React and backend technologies like Node.js or Python-based frameworks. Experience in graph-based UI is a plus.
• Proven experience in WebGL/WebGPU based frameworks such as three.js or deck.gl. GLSL experience is a plus. Experience in WebAssembly with C++ is a plus.
• Excellent problem-solving skills and ability to think critically and creatively.

• Excellent communication and interpersonal skills.
• Ability to work independently and as part of a team.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-VL1

About the role

Muon seeks a Senior Software Engineer to join our Information Systems team. The ideal candidate is a self-motivated and versatile software engineer with a strong desire to develop mission-critical internal software and platforms with the primary goal to reduce manual and repetitive tasks. The Information Systems team owns the comprehensive suite of custom software, vendor software, data platforms and automated tools that will enable various teams to work more rapidly, our factories to build efficiently, and our launch teams to operate flawlessly.

Responsibilities

• Hands-on software development of internal software using modern methodologies and tools.
• Own the end-to-end software development from product concept to delivery and maintenance to our internal customers.
• Participate in designing overall information systems architecture, from technology selection to buy-vs-build decisions.
• Embrace adaptability by taking on meaningful responsibilities as the company’s needs change, and be comfortable changing elevations from low-level coding to higher-level project and initiative needs.
• Assist in the integration and implementation of core systems (e.g., custom ERP, PLM, MES, Supply Chain) to integrate seamlessly and automate handoffs between functions.

Qualifications

• B.S., M.S., or Ph.D. in computer science or related field, or equivalent experience
• 7+ years full-stack (frontend and backend) software engineering experience.
• Proficiency in common programming languages such as Python and Javascript along with common libraries such as React and Angular.
• Experience selecting and deploying database technology based on specific performance and feature needs (SQL/NoSQL, PostgreSQL, MongoDB, InfluxDB, etc)
• Proficiency developing, versioning and optimizing REST and GraphQL APIs.
• Excellent communication and presentation skills
• Excited to work in a fast-paced environment with new challenges each week

Nice-to-have Skills

• Modern space systems experience, including software ecosystems.
• Proven success in a high-growth startup environment

Salary

The salary range for this role is $185,000 - $215,000, plus a competitive equity grant and comprehensive benefits package. Final compensation will be determined based on skills, qualifications, experience, and geographic location as assessed during the interview process. 

Role

We are looking for a Staff Software Development Engineer - DevSecOps to join our team in a hybrid capacity in San Jose, CA, reporting to the Director, Software Development Engineering. Our Engineering team built the world’s largest cloud security platform from the ground up, and we keep building. You will support internal product teams in managing CI/CD pipelines, strengthening security practices, and maintaining shared engineering systems to enable organizations worldwide to harness speed and agility with a cloud-first strategy.

What you’ll do (Role Expectations)

• Build and manage CI/CD systems to deploy critical applications across hybrid cloud environments including AWS, GCP, and proprietary clouds

• Support internal product teams with CI/CD pipelines, automations, and tools like GitLab, GitHub, Jenkins, ArgoCD, and security scanning solutions

• Secure code, applications, and infrastructure using security scanning tools such as SonarQube, Snyk, Coverity, and CheckMarx

• Administer and optimize critical DevSecOps applications while monitoring build metrics with tools like Grafana, Prometheus, and CloudWatch

• Communicate progress to stakeholders through Jira, technical documentation, and clear status updates

Who You Are (Success Profile)

• You thrive in ambiguity. You're comfortable building the path as you walk it. You thrive in a dynamic environment, seeing ambiguity not as a hindrance, but as the raw material to build something meaningful.

• You act like an owner. Your passion for the mission fuels your bias for action. You operate with integrity because you genuinely care about the outcome. True ownership involves leveraging dynamic range: the ability to navigate seamlessly between high-level strategy and hands-on execution.

• You are a problem-solver. You love running towards the challenges because you are laser-focused on finding the solution, knowing that solving the hard problems delivers the biggest impact.

• You are a high-trust collaborator. You are ambitious for the team, not just yourself. You embrace our challenge culture by giving and receiving ongoing feedback—knowing that candor delivered with clarity and respect is the truest form of teamwork and the fastest way to earn trust.

• You are a learner. You have a true growth mindset and are obsessed with your own development, actively seeking feedback to become a better partner and a stronger teammate. You love what you do and you do it with purpose.

What We’re Looking for (Minimum Qualifications)

• 5+ years of professional experience including hands-on experience managing cloud environments such as AWS, GCP, or private clouds

• Proficiency in application development or automation using OOP languages like C/C++, Java, Python, or Go, plus exposure to container orchestration and automation tools

• Familiarity with application security testing methodologies and experience using tools like SonarQube, Snyk, Coverity, or CheckMarx

• Experience designing and managing GitOps-based pipelines using GitLab, GitHub, and CI/CD automation tools like Jenkins or GitHub Actions

• Bachelor’s degree in Computer Science or a related field, or equivalent practical experience

What Will Make You Stand Out (Preferred Qualifications)

• Experience with AI and ML tools in day to day DevSecOps activities

• Experience writing and developing yaml based CI/CD Pipelines and knowledge of build tools like makefiles, gradle, npm, or maven

• Experience with Networking, Load Balancers, Firewalls, and Web Security

#LI-Hybrid #LI-KM9

We are looking for a Staff Escalation Engineer to join our Shared Platform Services team. This is a hybrid role based out of either our San Jose, CA office (3 days a week), reporting to the Sr. Manager, Software Engineering QA. You will be instrumental in taking the Zscaler Client Connector Cloud service to the next level in terms of reliability, availability, and scalability. As part of the team that built the world’s largest cloud security platform, you will bring your vision and passion to enable organizations worldwide to harness speed and agility with a cloud-first strategy.

What you’ll do (Role Expectations)

• Own and resolve escalated cloud incidents end-to-end, including impact analysis, debugging, implementing solutions, and communicating with stakeholders

• Collaborate with development, security, and operations to design and implement code/configuration fixes for complex system issues

• Monitor system health, performance, and security via PagerDuty and enhance alerting to meet SLOs

• Build diagnostic tools, dashboards, and documentation to enable faster, more effective incident resolution across the team

• Lead production service ownership and supportability by deploying critical fixes, making key deployment decisions, and responding to high-pressure off-hours events

Who You Are (Success Profile)

• You thrive in ambiguity. You're comfortable building the path as you walk it. You thrive in a dynamic environment, seeing ambiguity not as a hindrance, but as the raw material to build something meaningful.

• You act like an owner. Your passion for the mission fuels your bias for action. You operate with integrity because you genuinely care about the outcome. True ownership involves leveraging dynamic range: the ability to navigate seamlessly between high-level strategy and hands-on execution.

• You are a problem-solver. You love running towards the challenges because you are laser-focused on finding the solution, knowing that solving the hard problems delivers the biggest impact.

• You are a high-trust collaborator. You are ambitious for the team, not just yourself. You embrace our challenge culture by giving and receiving ongoing feedback—knowing that candor delivered with clarity and respect is the truest form of teamwork and the fastest way to earn trust.

• You are a learner. You have a true growth mindset and are obsessed with your own development, actively seeking feedback to become a better partner and a stronger teammate. You love what you do and you do it with purpose.

What We’re Looking for (Minimum Qualifications)

• 5+ years of experience along with expert troubleshooting, debugging, and root-cause analysis for complex, high-priority incidents, with experience using CPU/memory profilers to diagnose resource exhaustion

• Strong hands-on skills in Python, Bash, and Java; cloud platforms (GCP, AWS, Azure); and IaC/configuration tools (Terraform, Ansible)

• Ability to write complex MySQL queries and generate business reports

• Experience with authentication protocols such as SAML and OAuth

• Solid networking fundamentals (TCP/IP, UDP, ICMP) and debugging with Postman and packet captures, along with proficiency in monitoring tools like Grafana

What Will Make You Stand Out (Preferred Qualifications)

• Experience developing applications with Java, REST APIs, MySQL, and jQuery

• Bachelor’s degree in Computer Science or Computer Engineering (or related field); MS in CS/CE preferred

#LI-JM1 #LI-Hybrid

We are looking for a Staff Engineer to join our Shared Platform Services team. This is a hybrid role based in San Jose, CA, reporting to the Sr. Manager, Software Engineering QA. As a Staff Engineer, you will be instrumental in leading functional, system, and automation testing for Zscaler features while expanding automation infrastructure to enhance quality and efficiency.

What you’ll do (Role Expectations)

• Collaborate across Development, Product Management, and Federal Cloud Operations teams to ensure timely delivery of high-quality products through design, testing, and release

• Lead functional, system, and automation testing efforts, expanding automation coverage and ensuring efficiency and robust quality assurance

• Manage Federal cloud processes, including deployment procedures, monitoring, and resolving escalations in collaboration with Federal operations and support teams

• Investigate and resolve complex production issues by identifying root causes, verifying fixes, and developing comprehensive test plans

• Contribute to team growth by hiring and training new talent, fostering a culture of inclusivity, and staying updated on evolving technologies

Who You Are (Success Profile)

• You thrive in ambiguity. You're comfortable building the path as you walk it. You thrive in a dynamic environment, seeing ambiguity not as a hindrance, but as the raw material to build something meaningful.

• You act like an owner. Your passion for the mission fuels your bias for action. You operate with integrity because you genuinely care about the outcome. True ownership involves leveraging dynamic range: the ability to navigate seamlessly between high-level strategy and hands-on execution.

• You are a problem-solver. You love running towards the challenges because you are laser-focused on finding the solution, knowing that solving the hard problems delivers the biggest impact.

• You are a high-trust collaborator. You are ambitious for the team, not just yourself. You embrace our challenge culture by giving and receiving ongoing feedback—knowing that candor delivered with clarity and respect is the truest form of teamwork and the fastest way to earn trust.

• You are a learner. You have a true growth mindset and are obsessed with your own development, actively seeking feedback to become a better partner and a stronger teammate. You love what you do and you do it with purpose.

What We’re Looking for (Minimum Qualifications)

• US Citizenship Required with 5+ years of Software Development or Quality Assurance experience, specifically within networking and security environments

• Strong expertise in cloud-hosted applications, database operations, API testing, microservices architecture, and automation scripting using Python

• Proficiency in L4-L7 Internet and Security networking protocols including TCP/IP, SSL/TLS, and HTTP/HTTPS

• Experience with deployment and monitoring tools such as Jenkins, GitLab, and Ansible

• Bachelor’s degree in Computer Science Engineering or a related field with a proven ability to troubleshoot complex cloud issues

What Will Make You Stand Out (Preferred Qualifications)

• Experience with AI in testing and automation, leading quality teams, and familiarity with FedRAMP qualification

• Deep knowledge of Linux system administration, traffic generation tools like Ixia or Spirent, and relevant cloud or networking certifications

• Understanding of authentication systems such as LDAP and SAML, encryption solutions, and debugging Linux systems

#LI-JM1 #LI-Hybrid

Summer Internship  

Our Summer Internship is designed for students leading into their final year of university, who want to gain real life work experience in a fast past, exciting and professional environment.   

As a Summer Intern, you will participate in onboarding with the UR team that will set you up for success in your role. You will also benefit from professional development sessions, networking, and social events provided by the Internship Program.   

The program takes place from June – August 2026 (12 week program)  

Software Engineering Intern - Platform, Security & AI 

What We're Looking For 

• Passion & Drive: Strong willingness to learn, innovate, and contribute to the intersection of Cyber Security, Data Resilience, and AI. 

• Technical Foundation: High level of comfort in a major programming language (Python, Go, or Java preferred). You should understand core data structures, algorithms, and how to independently debug your own code. 

• Security & AI Knowledge: Familiarity with Cyber & Data Security practices, alongside a foundational understanding of AI Agents, LLMs, and Agent Evaluations. 

• Infrastructure & Tooling: Experience with Kubernetes and containerization. 

• Collaboration: Basic knowledge of Git and GitHub for collaborative software development. 

Nice To Have 

• Cloud & Infrastructure: Working knowledge of Kubernetes/Helm and an understanding of the basics of CI/CD pipelines. 

• Architecture: Exposure to event-driven systems (e.g., Redis Pub/Sub, NATS) and experience with workflow orchestration systems like Temporal. 

• GenAI Expertise: Understanding or prior experience with GenAI concepts like RAG, Vector Databases, and Embeddings. 

• AI Frameworks & Pipelines: Usage of AI frameworks (e.g., LangChain, LangGraph) and an understanding of how to develop, tune, and deploy AI/ML frameworks and Data Model pipelines. 

What You Could Be Working On 

• Backend & Infrastructure: Write backend code and automation in Go within a large, production-grade codebase. You will learn established patterns for scalable infrastructure under the guidance of senior engineers, deploying and managing containerized applications across Kubernetes clusters and AWS infrastructure (EKS, ECR, IAM). 

• AI & Agent Development: Build long-running agents that unleash the full power of the Securiti AI + Veeam platforms for CISOs and security analysts. This includes unlocking automated breachimpact analysis, compliance reporting, and data access auditing across hybrid multicloud environments. 

• Agent Evaluation & Knowledge Pipelines: Develop Agent Evaluation Pipelines to measurably assess reliability and task completion rates. You will also build knowledge discovery pipelines that surface institutional knowledge (policy research, compliance frameworks) into agent-consumable layers for sharper decision-making. 

• Security & Vulnerability Management: Analyze Kubernetes deployment configurations to identify and fix security gaps. You will help manage the CVE lifecycle by identifying and patching vulnerabilities in container images to harden the platform. 

• Tooling & Reliability: Develop internal tooling, testing harnesses, and security utilities to improve team productivity. You will also execute and validate API and cross-service integration tests to ensure system reliability as the platform evolves. 

Targeted Field of Study Currently pursuing a Bachelors or Master’s degree in: 

• Computer Science 

• Software Development / Software Engineering 

• Systems Engineering 

• Cybersecurity 

• Or other closely related fields. 

Requirements:

• This role requires you to be in office 2-3 days a week at the San Jose, California location

Applicants must be authorized to work in the U.S. We are unable to sponsor or take over sponsorship of an employment Visa now or in the future. 

Benefits

As a paid intern at Veeam, you’ll receive:

• Paid Company Holidays during your internship
• Tech Stipend to help set up your workspace
• 8 Hours of Paid Volunteer Time through our Veeam Cares Program
• Personal and Professional Development through our Internship Program

We’re committed to providing a supportive and rewarding internship experience.

What You’ll Do

• Develop and maintain models for electric motors, inverters, thermal management systems, gearboxes, and power distribution systems.
• Create integrated multi-physics models coupling electrical, thermal, mechanical, and controls domains.
• Use analysis to inform design decisions and optimize overall propulsion system performance. Lead trade studies evaluating design alternatives to determine optimal thermal solutions.
• Design creative high performance thermal systems, then build engineering prototypes to confirm performance. 
• Design and build thermal test setups to measure system critical temperatures, flowrates, and pressures and confirm performance. 
• Plan and oversee execution of thermal test campaigns validating your thermal models, including FAA certification testing related to the thermal system. 
• Collaborate with other engineers to develop propulsion system thermal boundary requirements (external cooling flows, temperatures) and ensure propulsion system thermal design is optimized for vehicle level performance.  
• Collaborate with mechanical design teams to package your thermal designs within the volume and mass constraints of the aircraft.
• Collaborate with Software and Controls teams to develop and implement embedded thermal models, observers, and overheat prevention. 
• Clearly document and communicate thermal design rationale, analysis methodologies, and test results. 
• Review measured thermal data from propulsion systems on Archer aircraft, confirm thermal systems are meeting performance requirements on aircraft

What You’ll Need

• BS / MS / PhD in Mechanical Engineering, or Aerospace Engineering
• 4+ years experience in thermal design and simulation, preferably within the aerospace or automotive sectors.
• Strong fundamentals and demonstrated understanding of heat transfer and flow physics, including, conduction, convection and radiation
• Experience with power electronics, electric motor, heat exchanger, and gearbox thermal design. 
• Strong Experience in MATLAB/Simulink and Python (including object-oriented programming and version control via Git).
• Experience with industry-standard tools such as StarCCM+, Ansys Fluent, Ansys ICEpak and Thermal analysis packages, 
• A systematic approach to problem-solving and the ability to communicate complex technical rationale to multidisciplinary stakeholders.
• Experience with lumped parameter thermal networks modeling, reduced-order modeling, kalman filters, control theory and application, and advanced signal processing.
• Experience with thermal testing and test-data correlation
• Self-motivated with ability to work independently and drive technical initiatives
• Strong written and verbal communication skills, experience writing technical reports. 

Bonus Qualifications

• Prior experience with eVTOL aircraft
• Familiarity with FAA certification basis (Part 23/25 or 27/29)
• Experience with CAD modeling systems (e.g . NX, CATIA, Solidworks)
• Experience with embedded microcontroller software development in C
• Experience utilizing high-performance computing (HPC) to parallelize workflows
• Knowledge of simulation model validation, model calibration, and uncertainty quantification methods

Physical Requirements:

• Ability to work in laboratory and test environments
• May require occasional travel to test facilities

At Archer, we aim to attract, retain, and motivate talent with the skills and leadership needed to grow our business. We drive a pay-for-performance culture and reward performance that support the Company's strategy. For this position, we are targeting a base pay range of $172,000 - $225,000. Actual compensation offered will be determined by job-related knowledge, skills, and experience.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

Samsung Semiconductor Foundry team is hiring for Director of Sales Systems & Enablement which will be responsible for the strategic direction, implementation, and ongoing support of the sales technology stack, with a central focus on Salesforce. This role will drive sales productivity by ensuring the sales team has the tools, data, and training necessary to maximize their effectiveness

Location: Daily onsite presence at our San Jose, CA headquarters in alignment with our Flexible Work policy

Req: 42861

What You’ll Do

• Salesforce Administration & Integration: Oversee the administration, configuration, and integration of Salesforce with other key sales and marketing systems.
• Sales Technology Evaluation: Research, evaluate, and recommend new sales technologies to improve sales processes and performance.
• Automation & Workflow Development: Design and implement automated workflows within Salesforce and other sales tools to streamline sales activities.
• Data Management & Reporting: Ensure data accuracy and consistency across all sales systems. Develop and maintain robust reporting dashboards.
• Sales Enablement Program Development: Create and deliver sales enablement programs focused on product knowledge, sales skills, and tool proficiency.
• User Support & Training: Provide ongoing support and training to the sales team on all sales systems and tools.
• Collaboration with IT: Work closely with the IT department to ensure the stability and security of the sales technology infrastructure.
• Troubleshoot and resolve database issues and bugs

What You Bring

• Bachelor’s degree in Engineering, Information Technology, or Business or equivalent practical experience with 20+ years or a Master’s with 18+ years.
• 7+ years of experience in Sales Operations or a comparable role with a strong technical focus.
• Extensive experience with administering and customizing Salesforce.
• Proven track record integrating Salesforce with other sales and marketing tools.
• Strong understanding of sales processes and best practices.
• Excellent communication and training skills.
• Salesforce certifications preferred, such as Administrator or Developer.
• Experience with data science tools, (e.g. Python, R)
• Experience with on-premise database management and warehousing.
• Korean language is a plus.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-KS1

The Technology Enabling Development Lab (TED) Our core development focus is the host interface firmware layer that sits in the intersection of system software and flash management firmware. This key host interface firmware technology drives Samsung’s breakthrough V-NAND technology and enables our customers to power performance-oriented, demanding, enterprise-class applications ranging from hyper-scale data centers, to big data processing, to software defined virtualized storage arrays and infrastructures.

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Design and development of high performance firmware and software for cutting-edge enterprise SSD products.
• Debug, optimize, and validate SSD firmware on complex embedded multi-core architectures.
• Support customer qualification and adoption of SSD products.
• Participate in ground-breaking advanced SSD storage development and research projects.

What You Bring

• BS in Computer/Electrical Engineering or Computer Science with 3+ years of working experiences in silicon development or MS in Computer/Electrical Engineering or Computer Science with 1+ years of relevant working experience or PhD and 0+ years of relevant experience in storage firmware development is required.
• Strong programming experience and demonstrated proficiency in C/C++ for embedded systems, including development of algorithms, manipulation of complex data structures, and implementing highly optimized code, is required.
• Relevant hands on experience in embedded software or firmware development, including storage devices or other embedded platforms is required.
• Experience with one or more of the following storage related technologies: NVM Express, PCI Express, SAS, SCSI, NAND Flash/FTL, Fibre Channel, SATA, eMMC, or UFS is beneficial.
• Experience with ARM or equivalent embedded multi-core microprocessor architectures is required.
• Hands on experience with JTAG/ICE debuggers and protocol analyzers is required.
• Some scripting experience in one of Python/Perl/Javascript is desired.
• Familiarity and experience with modern agile software development methodologies and practices is preferred. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change

#LI-SF1

Job Title: Principal engineer, AI Serving Framework Architect (Software)

What You’ll Do    

The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung’s world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Principal AI System Architect who will play a key role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung’s long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42853

• As a Tech Lead, leading research teams in Korea and proposing technical direction
• Research on dynamic scheduling methodologies for maximizing AI inference performance in multi-rack scale memory-centric systems, comprised of heterogeneous compute-capable memory and hierarchical memory
• Investigating methods to accelerate search operations in RAG’s vector DB and AI Agent’s knowledge-graph by leveraging compute-capable memory
• Studying strategies for optimally placing KVCache and a vector DB in hierarchical memory to minimize frequent SSD accesses and reduce IO stalls
• Proposing SW design for implementing the derived optimization algorithms on open-source platforms such as vLLM

What You Bring

• PhD in Computer Science or a related field with 10+ years of experience in AI Serving Framework for large-scale computing, with focusing on the AI workloads. 
• Led a project to build and optimize a Large Language Model (LLM) Inference Software Stack on a multi-rack scale system to deliver AI Inference services to over 100,000 users. 
• Extensive experience in designing AI Inference Software Stacks for heterogeneous devices.In-depth understanding of the internal architecture and operation mechanisms of inference engines such as vLLM. 
• Proficiency in AI Inference System Profiling and optimization. 
• Knowledge and practical experience with future AI workloads, including reasoning models, multi-modal solutions, AI agents, and world models. 
• Strong understanding of compute, memory, and networking bottlenecks in AI systems. 
• Required skillsets: PyTorch, Python, and C++ 
• A collaborative mindset, curiosity, and resilience in solving complex challenges. 
• Excellent verbal, presentation, and written communication skills. 
• (Nice to have) Native or fluent Korean speakers are preferred. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build. Understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change 

#LI-SF1

Job Title: Principal Engineer, AI System Architect (Hardware)

 What You’ll Do
The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung’s world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung’s long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42852

• • Technically Lead the architecture team with strong  direction, shaping system‑architecture strategy and advancing key innovations
  • Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems.
• Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale. 
• Analyze representative and emerging AI workloads (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power.  
• Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections. 
• Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices. 
• Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities.  
• Communicate architectural insights and recommendations through clear technical presentations and documentation.   
• Occasional domestic and international travel (<10%).

 What You Bring

• Ph.D. in Computer Science, Electrical Engineering, or a related field preferred,  with 15+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads 
• Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation. 
• Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects.
• Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems.
• Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions.
• Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation. 
• Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams.
• A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Job Title: Principal Engineer, AI System Architect (Hardware)

The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung’s world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung’s long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42852

What You’ll Do

• Technically Lead the architecture team with strong  direction, shaping system‑architecture strategy and advancing key innovations
• Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems.
• Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale. 
• Analyze representative and emerging system-level architectural research (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power.  
• Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections. 
• Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices. 
• Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities.  
• Communicate architectural insights and recommendations through clear technical presentations and documentation.   
• Occasional domestic and international travel (<10%).

 What You Bring

• Ph.D. in Computer Science, Electrical Engineering, or a related field preferred,  with 15+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads 
• Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation. 
• Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects.
• Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems.
• Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions.
• Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation. 
• Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams.
• A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Principal, CPU Architecture & Performance Research Engineer

What You’ll Do

Architecture Research Lab is seeking Principal CPU Architecture & Performance Engineer to lead the definition, analysis, and optimization of next-generation CPU microarchitectures (RISC-V core). This role is focused on end-to-end performance: from architectural trade-offs and workload characterization to micro-architectural modeling, simulation, and silicon bring-up correlation.

You will work closely with architecture, design, compiler, and system teams to drive performance and efficiency across a broad set of real-world workloads

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42918

• Define and evaluate CPU micro-architectural features for future cores (frontend, execution engine, memory hierarchy, interconnect).
• Lead performance analysis using simulators, RTL.
• Help develop and validate performance models (cycle-accurate, trace-driven, statistical).
• Characterize workloads (SPEC, server, client, AI/ML, cloud, internal traces) and translate findings into architectural requirements.
• Identify performance bottlenecks and propose data-driven optimizations.
• Drive architecture-to-implementation alignment with design team.
• Collaborate with compiler, OS, and system architects on cross-stack performance issues.
• Mentor senior and staff engineers; provide technical leadership across projects.
• Work leading to patents and publication

What You Bring

• Master’s with 18+ years of experience in Computer Engineering, Computer Science, or related field.
•  or PhD with 15+ years of experience preferred.
• 10+ years of experience in CPU microarchitecture and/or performance engineering.
• Experience with RISC-V, ARM or X86 architectures.
• Strong understanding of:
• Out-of-order execution, branch prediction, pipelines, and speculation
• Cache coherence, memory systems, prefetching, and NUMA effects
• Hands-on experience with architectural simulators (like gem5).
• Strong programming skills in C/C++ and Python.
• Familiarity with compiler optimizations and hardware/software co-design.
• Familiarity with SIMD / Vectors / VME for AI inference workloads.
• Experience analyzing large performance datasets and traces.
• Proven ability (Tapeout / Patents /Publications) to influence architecture / micro architectural decisions through quantitative analysis.

Preferred Qualifications

• Background in power/performance/area (PPA) trade-off analysis.
• Experience with SIMD/Vectors.
• Experience with compiler optimizations and hardware/software co-design.
• Prior technical leadership at Senior Staff or Principal level. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Samsung Semiconductor is hiring now for a Senior CIS Application Engineer.  You will join a dynamic team focused on developing and validating cutting-edge CMOS Image Sensor (CIS) technologies and the complete imaging pipeline they power. Your expanded role will involve not just sensor characterization, but also establishing objective and subjective image quality standards. You’ll collaborate across design, process and product engineering to ensure that CIS devices meet stringent technical specifications and exceed end-user visual expectations across the entire system. This position offers opportunities to define holistic test methodologies and drive product innovation in advanced imaging systems.

What You'll Do

• Establish objective evaluation criteria and subjective perceptual measurement methodologies for the full imaging system (CIS devices, PKG, modules, and ISP output) under dark and light conditions.
• Conduct detailed characterization and performance analysis.
• Analyze test results to identify trends, anomalies, and potential root causes of image performance issues, spanning hardware defects to ISP.
• Work closely with design and process team to provide feedback and propose improvements for image sensor and overall system performance.
• Develop and automate test flows for consistent and efficient evaluation using standard programming languages and specialized IQV software tools (e.g., Imatest).
• Ensure compliance with relevant industry image quality standards.
• Communicate results effectively to cross-functional teams and management stakeholders.
• Act as the primary technical contact person for customers, addressing their technical questions and concerns.
• Serve as a bridge between the customer and internal engineering/product development teams, conveying customer feedback and advocating for necessary fixes or improvements.
• Diagnose and resolve complex technical issues promptly, often involving embedded hardware and software debugging in camera systems.

Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work Policy.

Job ID: 42887

 What You Bring

• Bachelor’s degree in Electrical Engineering, Physics, Optics, or related field with 5+ years of relevant industry experience, or Master’s with 3+ years or PhD with 0+ years of experience.
• Strong understanding of CIS operation principles, including pixel, readout chain, ADC behavior, and the full imaging pipeline (Optics, Sensor, ISP).
• Hands-on experience with image sensor characterization, test system operation, and standardized image quality lab environments (light booths, test charts).
• Knowledge of optical measurement techniques and evaluation under both dark and illuminated conditions.
• Proficiency in data analysis tools such as Python, MATLAB, or similar platforms, ideally paired with experience using professional IQV software like Imatest.
• Familiarity with industry standards for objective image quality measurement.
• Excellent analytical, problem-solving, and communication skills.
• A proactive mindset and strong attention to detail when working in cross-functional environments.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-MD1

Senior, CPU Architecture & Performance Research Engineer

What You’ll Do

Architecture Research Lab is  seeking Senior CPU Architecture & Performance Engineer to contribute to performance analysis and microarchitectural optimization of current and next-generation CPU (RISC-V) cores. This role emphasizes hands-on analysis, modeling, and close collaboration with architects and design teams to improve performance across real-world workloads.

You will focus on executing well-defined performance studies, identifying bottlenecks, and helping translate architectural ideas into measurable performance gains

 Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42851

• Perform performance analysis for CPU microarchitectural features under guidance from Staff and Principal engineers.
• Run architectural simulations and analyze results (IPC, CPI stacks, latency and throughput metrics).
• Identify performance bottlenecks in frontend, execution engine, or memory subsystems.
• Assist in evaluating design trade-offs using trace-driven or cycle-accurate models.
• Characterize workloads and benchmarks (SPEC, server, client, internal traces).
• Develop scripts and tools to automate performance analysis.
• Work leading to patents and publication.

What You Bring

• Master’s, or PhD in Computer Engineering, Computer Science, or related field.
• 2+ years of experience in CPU microarchitecture and/or performance engineering.
• Strong understanding of:
• Out-of-order execution, branch prediction, pipelines, and speculation
• Cache coherence, memory systems, prefetching, and NUMA effects
• Hands-on experience with architectural simulators (like gem5).
• Strong programming skills in C/C++ and Python.
• Experience analyzing large performance datasets and traces.
• Familiarity with compiler optimizations and hardware/software co-design.

Preferred Qualifications

• Experience with RISC-V, ARM or X86 architectures.
• Background in power/performance/area (PPA) trade-off analysis.
• Familiarity with SIMD / Vectors / VME for AI inference workloads.
• Prior tapeout / patent / publication experience. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

What You’ll Do

Lead cutting‑edge research on next‑generation AI system architectures. The role is responsible for end‑to‑end co‑design of AI workloads, system‑level modeling, hardware platforms, and high‑performance processors that leverage Samsung’s advanced memory technologies to eliminate capacity, bandwidth, and large‑scale communication bottlenecks.

Location: Daily onsite presence at our San Jose Headquarters in alignment with our Flexible Work policy

AI System Architecture Leadership

• Define system‑level architectures that solve memory‑capacity, bandwidth, and interconnect challenges for large AI workloads (e.g., large language models, recommendation systems).
• Build and maintain analytical and event‑driven simulation frameworks for compute‑memory‑network performance at rack scale.
• Conduct design‑space exploration and quantitative trade‑off studies (performance, power, cost) to guide architecture decisions.
• Partner with SAIT HQ teams to align modeling insights with real‑world AI system implementations.

RISC‑V CPU Architecture Leadership

• Architect high‑performance, out‑of‑order RISC‑V CPU cores that serve as host processors for AI computing systems.
• Drive IPC‑focused feature path‑finding; lead micro‑architecture research through performance‑model simulation and workload analysis.
• Produce detailed micro‑architecture specifications and guide cache/memory hierarchy design for optimal AI workload execution.

Research & Innovation Management

• Lead a multidisciplinary research team, set technical roadmaps, and ensure delivery of high‑impact publications.
• Present architectural insights and strategic recommendations to senior leadership and external partners.

What You Bring

• Education: Ph.D. in Computer Science, Electrical Engineering, or a related field.
• Experience: 10 + years in system‑level architecture research or large‑scale computing platform design, with a strong focus on AI workloads.
• Technical Expertise:
  • Performance modeling, event‑driven simulation, and quantitative analysis of compute‑memory‑interconnect systems.
  • Deep knowledge of modern CPU/accelerator architectures (RISC‑V, ARM, x86) and heterogeneous integration.
  • Proven ability to design rack‑scale AI system architectures that address memory, bandwidth, and interconnect constraints.
  • Proficiency with transaction‑level modeling (TLM) and event‑driven simulation for compute‑memory‑network co‑design.
  • Experience in large‑scale design‑space exploration and PPA (performance, power, area/cost) trade‑off analysis.
  • Expertise in architecture and micro‑architecture design of out‑of‑order CPUs.
  • Hands‑on experience with simulation tools and programming languages such as Python and C++.
• Communication Skills: Excellent written and verbal communication; proven ability to deliver technical presentations to senior stakeholders. 

Preferred Experience

• Proven track record of publishing high‑impact research papers.
• Experience influencing product roadmaps through architectural recommendations.
• Strong collaborative history with cross‑functional teams (hardware, software, memory technology). 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change

#LI-SF1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design.

Our team works hands-on with cutting-edge accelerator hardware, experimental memory systems, and emerging domain-specific languages (DSLs). We build and optimize a Triton-based software stack that pushes the limits of performance, efficiency, and scalability for modern LLM workloads.

We are looking for a Senior AI Systems Engineer with deep experience in high performance Triton kernel development on modern accelerators. In this role, you will design, analyze, and optimize performance-critical kernels used in large scale LLM inference and training pipelines. You will work closely with hardware architects, compiler engineers, and ML researchers to identify performance bottlenecks, interpret profiling data, and co-design solutions that span software and hardware boundaries.

This role is ideal for engineers who enjoy working close to the hardware stack while still reasoning deeply about model level abstractions.

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Design, implement, and optimize high-performance Triton kernels for LLM workloads on existing accelerators.
• Analyze kernel performance using profiling tools; interpret metrics such as latency, throughput, occupancy, memory bandwidth, and compute utilization.
• Identify performance bottlenecks in kernel design (e.g., memory access patterns, synchronization, tiling strategies) and propose concrete optimizations.
• Work across the stack; from model architecture to kernel implementation—to ensure end-to-end performance efficiency.
• Collaborate with hardware and compiler teams on hardware–software co-design, providing feedback that influences future accelerator and DSL designs.
• Prototype and evaluate kernel optimizations using upcoming DSLs and experimental compiler flows.
• Contribute to the evolution of a Triton-based software stack used for cutting-edge research and production-grade experimentation.
• Document design decisions, performance trade-offs, and optimization strategies clearly for internal and external stakeholders.

What You Bring

• Bachelor’s with 5+ years, or Master’s with 3+ years, or PhD's with 0+ years of industry experience.
• Strong experience writing high-performance Triton kernels for GPUs or other accelerators.
• Solid understanding of LLM fundamentals, including attention mechanisms, transformer architectures, and inference/training workflows.
• Deep knowledge of accelerator hardware architecture, including:  Memory hierarchies (HBM, SRAM, caches).
• Proven ability to read and interpret profiling data and performance counters.
• Experience diagnosing and resolving performance bottlenecks in kernel-level code.
• Strong systems programming skills in Python and low-level performance-oriented programming paradigms.
• Experience with hardware–software co-design or compiler-assisted optimization.
• Familiarity with FlashAttention, fused kernels, MoE kernels, and different attention mechanisms.
• Experience working with emerging or experimental domain-specific languages (DSLs) for accelerator programming.
• Background in ML systems, compilers, or performance engineering.
• Prior experience working with different accelerator backends (including but not limited to CUDA).
• Opportunity to work on cutting-edge accelerator hardware and experimental software stacks.
• Direct impact on the performance and design of next-generation AI systems.
• A highly collaborative environment spanning hardware, systems, and ML research.
• Flexibility to publish, prototype, and influence future hardware and software directions.
• Ability to work effectively in cross-functional, research-oriented environments.
• Strong analytical and problem-solving skills.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-VL1

The Samsung Semiconductor Inc., Wireless Connectivity Software Engineering team is seeking highly motivated and enthusiastic Software Engineers to join our team in developing software infrastructure, framework, and protocol stack for 802.11 based WLAN chipsets. We are looking for engineers with expertise in MAC Layer concepts and firmware development. As a member of the WLAN Software team, you will be responsible for developing software modules for the data path and control path in MAC and physical layer of various WLAN chipsets.

Location: Daily onsite presence at our San Jose, CA headquarters in alignment with our Flexible Work policy

Req: 42831

What You’ll Do

• Work with 802.11 WLAN chipsets, devices and protocols, including other networking devices
• Collaborate with wider teams to for end to end feature deliverables build and maintain production quality Firmware
• Design and develop modules in embedded firmware for Samsung’s Wireless Connectivity solutions
• Major focus will be implementing, unit testing and fixing issues various features of 802.11 MAC

What You Bring 

• Bachelor’s Degree in Engineering or Computer Science Discipline with 5+ years of relevant industry experience, or Master’s with 3+ years or PhD with 0+ years in field of wireless communication technologies.
• Excellent coding skills in C in embedded space for firmware development is critical.
• Ability to debug issues with low-level embedded software, custom/proprietary code and enhancements.
• WLAN standards, domain knowledge of Wi-Fi (IEEE 802.11) MAC protocols, WFA protocols and coexistence with other wireless technologies such as BT, UWB and cellular.
• Knowledge of OFDM, OFDMA principals, beam forming and RF concepts will be additional advantage.
• Understanding of QoS concepts and data path optimization algorithms.
• Understanding of the Linux Operating System, kernel and device driver development.
• Ability to use various debugging tools such as wireshark, testing tools such as WFA test beds, version control tools such as git.
• Knowledge of Python will be additional advantage
• Familiarity with other wireless technologies such as BT, Ultra Wide band and Cellular 4G/5G not required but preferred.
• Excellent coding skills in C programming languages.
• Strong understanding of MAC Layer concepts & physical layer (e.g., modulation analysis (OFDM, OFDMA)) Concepts.
• Experience in developing firmware for wireless communication protocols (WLAN).
• Fluency in using lab equipment such as network analyzers, WFA test beds, signal generators, power meters etc.
• Familiarity with WLAN standards & domain knowledge of Wi-Fi MAC/PHY Specifications.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-MD1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Develop the verification infrastructure and automation environment involved in build, simulation, regression and triages.
• Lead the verification for IP blocks of an AI accelerator by working with architects and RTL engineers.
• Create direct or random testbench, define verification scope and test plans for both functional and performance validation, close the verification quality metrics.
• Provide comprehensive documentation of verification strategy and ensure test environment is easy to use.
• Mentor junior engineers when necessary
• Work cross-functionally in debugging failures with design, compiler and simulation engineers

What You Bring

• Bachelor’s with 15+ years, or Master’s with 13+ years, or PhD's with 10+ years of industry experience.
• Strong background in SoC or IP verification and test bench development using UVM, System Verilog, C/C++ and scripting languages such as Perl/Python.
• Experience verifying at multiple levels of logic from scratch, starting from complex IP blocks to dies to SoCs to full system testing
• Understanding RTL and strong overall debugging skills
• Prior experience with computational logic, interconnect networks and/or memory system is desirable
• Strong background in microarchitecture and computer architecture preferably in the area of AI accelerators
• Knowledge of FPGA and emulation platforms preferred
• Strong analytical and problem-solving skills
• Excellent communication and interpersonal skills
• Ability to work independently and as part of a team
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.

#LI-VL1

The SoC Architect will serve as a key technical leader, translating client requirements into an optimal SoC blueprint that achieves aggressive PPA (Power, Performance, Area) targets and driving its successful implementation.  This role will be a critical leader who provides the technical blueprint that ultimately realizes our clients' business objectives and should have a deep understanding of the complexities of custom SoC development and the ability to leverage broad system knowledge to create innovative solutions.

Location:  Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work Policy with an average of 20% travel per month.

Reports to: Team leader/Head of Custom SoC Solutions Team

What You’ll Do

Customer Requirement Definition and Architecture Design:

• Analyze and define the functional, performance, and power requirements based on the client's end product and application (e.g., mobile, edge device, data center or physical AI).
• Conceive and specify the Top-Level SoC Architecture and Microarchitecture, including CPU/GPU/NPU cores, memory subsystem, Interconnect (Coherent/Non-Coherent Fabric), and high-speed I/O interfaces (e.g., PCIe, UALink or ESUN).

Architecture Exploration and Validation:

• Evaluate various architectural trade-offs and validate architectural decisions using performance and power modeling (C/C++, SystemC).
• Provide technical guidance on IP selection, integration, and system optimization, and define the Design for Debug/Test/Excellence (DFx) strategy.

Technical Collaboration and Leadership:

• Collaborate closely with cross-functional teams (HW Design, Verification, Physical Design, Software) to ensure architectural specifications are accurately translated into the design and implementation phases.
• Identify and resolve technical risks throughout the project lifecycle, and lead technical communication with clients and

 What You Bring

• Bachelor’s Degree in Electrical Engineering, Computer Science, or related discipline and 10+ years of experience, or Master’s and 8+ years of experience. 
• 5+ years experience in SoC Architecture or System Engineering (experience in custom ASIC/SoC projects is a plus)
• Deep understanding of Computer Architecture and SoC Design (including CPU, GPU, Accelerators, Caches, and Memory Systems).
• Expert knowledge and design experience with on-chip interconnects (e.g., AMBA AXI/CHI) and High-Speed Interface protocols.
• In-depth knowledge of Power Management and low-power design techniques.
• Experience with SoC-level Clock, Reset, and Power Domain architecture.
• Comprehensive understanding of the overall RTL design and SoC design flow (Implementation & Verification).
• Excellent problem-solving skills to independently identify, analyze, and resolve complex technical issues.
• Ability to communicate and negotiate effectively with diverse stakeholders, including hardware and software engineering teams, managements, and clients.
• Proficiency in scripting languages such as Python/Perl
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-VL1

What You’ll Do

Samsung Display’s America R&D Lab is hiring for a Senior Systems Engineer, for a knowledgeable, self-driven individual contributor in field of display metrology and standardization. Our lab works closely with Samsung Display Co. (SDC), which supplies premium displays for smartphones, laptops, monitors, and TVs using industry leading technology. SDC is the first company in the world to mass produce flexible OLEDs, foldables and QD displays, creating the best displays that connect technology and people in a more valuable way.

This role is part of a dedicated team within a large global organization, advancing display metrology, product certifications, and standardization through collaboration with diverse stakeholders to deliver outcomes that directly impact company products.

This is an unique opportunity for a grounded, adaptable professional who is comfortable filling the gap, bringing patience and expertise to shape display eco-system over time.

We believe that innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

Location:  Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy with 10-20% of domestic and international travel.

Reports to: Principal Engineer

• Develop industry-leading test methodology and solutions
• Develop display-related standards, ensure alignment with organizations, e.g: VESA, ICDM, SMPTE
• Compare and analyze display performance to standardization targets, and recommend actions.
• Develop display metrology test patterns and test protocols; propose to IEC and ICDM as appropriate.
• Publish in peer-reviewed papers, conferences, and industry magazines that advances the display ecosystems.
• Communicate complex technical concepts clearly and effectively to diverse audience..
• Complete other responsibilities as assigned.

What You Bring

• Minimum of Master’s of Science degree in Physics, Electrical, Optics, or Materials Engineering or related field OR PhD is preferred.
• 3-5 years of relevant industry experience.
• Required expertise with display metrology and related instruments (ie. Spectrometer, colorimeter)
• Experience in Python, Matlab (Octave), or C++
• Conversant with industry forums and standardization procedures is a strong plus.
• Travel internationally several times a year, such as conference presentation, internal standard meetings.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-MD1

What You’ll Do

Samsung Semiconductor is seeking a Senior Systems Engineer to lead the design, modeling, simulation, and experimental validation of high-performance optical products and precision lenses.

You will apply strong fundamentals in physics, optics, and mathematics, alongside hands-on experience in electro-optical prototyping and hardware integration. Your role involves advanced ray-tracing simulations for complex LiDAR systems to generate 3D point cloud data and ensure system-level performance.

Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy with an average of 15% travel per month

Reports to: Director

• Lead the design, modeling, and experimental validation of LiDAR sensors and precision optics.
• Optimize optical architectures using sequential and non-sequential ray-tracing tools (e.g., Zemax, LightTools, or Speos).
• Design high-precision lenses and validate the seamless integration of optical components.
• Develop detailed ray-tracing models for sophisticated LiDAR scanners (multi-beam, scanning mechanisms, and detectors) while assembling and aligning electro-optical setups.
• Simulate environmental interactions to produce accurate 3D point cloud data for algorithm verification and system validation.
• Script custom simulation tools in Python or other languages for error budgeting and performance analysis.
• Execute experimental measurements and data acquisition to drive iterative design improvements and technical reporting.
• Complete other responsibilities as assigned.

What You Bring

• Master’s degree with 3+ years experience or PhD in Physics, Optical Engineering, Electrical Engineering, or a related field.
• 3 + years in automotive semiconductor or sensor industries, focused on optical system design and manufacturing.
• Solid background in physics, optics, and applied mathematics.
• Proven expertise in optical design, modeling, and experimental validation.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-MD1

Staff, CPU Architecture & Performance Research Engineer

What You’ll Do

Architecture Research Lab  is looking for  Staff CPU Architecture & Performance Engineer to drive detailed performance analysis and architectural optimization for current and next-generation CPU (RISC-V) cores. This role focuses on deep ownership of performance-critical micro-architectural domains, workload analysis, and data-driven recommendations that influence core architecture decisions.

You will work closely with architects, design, compiler, and system teams to evaluate trade-offs, identify bottlenecks, and improve performance across real-world workloads

 Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42850

• Own performance analysis for one or more CPU microarchitectural domains (e.g., frontend, execution engine, memory subsystem).
• Build, extend, and validate architectural performance models and simulators.
• Perform CPI/IPC breakdowns and root-cause performance bottlenecks.
• Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models.
• Characterize workloads and benchmarks (SPEC, server, client, AI/ML, internal traces).
• Translate performance data into clear architectural recommendations.
• Work leading to patents and publication.

What You Bring

• Master’s in Computer Engineering, Computer Science or related filed with 8+ years of experience or PhD in Computer Engineering, Computer Science, or related field with 5+ years of experience.
• 5+ years of experience in CPU microarchitecture and/or performance engineering.
• Experience with RISC-V, ARM or X86 architectures.
• Strong understanding of:
• Out-of-order execution, branch prediction, pipelines, and speculation
• Cache coherence, memory systems, prefetching, and NUMA effects
• Hands-on experience with architectural simulators (like gem5).
• Strong programming skills in C/C++ and Python.
• Experience analyzing large performance datasets and traces.
• Familiarity with compiler optimizations and hardware/software co-design..
• Proven ability - prior tapeout experience.

Preferred Qualifications

• Background in power/performance/area (PPA) trade-off analysis.
• Experience / Familiarity with SIMD / Vectors / VME for AI inference workloads..
• Prior  leadership guiding junior engineers.
• Prior patent / publication experience. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Job Title: Staff Engineer, AI System Architect (Hardware)

What You’ll Do
The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung’s world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Senior Staff AI System Architect who will play a key role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung’s long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42917

• Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems.
  • Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale.
  • Analyze representative and emerging AI workloads (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power.
  • Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections.
  • Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices.
  • Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities.
  • Communicate architectural insights and recommendations through clear technical presentations and documentation.
  • Occasional domestic and international travel (<10%).

 What You Bring

• Ph.D. in Computer Science, Electrical Engineering, or a related field, with 5+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads.
  • Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation.
  • Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects.
  • Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems.
  • Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions.
  • Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation.
  • Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams.
  • A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges.  
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build.
• Understanding. You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 

#LI-SF1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Develop the verification infrastructure and automation environment involved in build, simulation, regression and triages.
• Lead the verification for IP blocks of an AI accelerator by working with architects and RTL engineers.
• Create direct or random testbench, define verification scope and test plans for both functional and performance validation, close the verification quality metrics.
• Provide comprehensive documentation of verification strategy and ensure test environment is easy to use.
• Mentor junior engineers when necessary
• Work cross-functionally in debugging failures with design, compiler and simulation engineers

What You Bring

• Bachelor’s with 10+ years, or Master’s with 8+ years, or PhD's with 5+ years of industry experience.
• Strong background in SoC or IP verification and test bench development using UVM, System Verilog, C/C++ and scripting languages such as Perl/Python.
• Experience verifying at multiple levels of logic from scratch, starting from complex IP blocks to dies to SoCs to full system testing
• Understanding RTL and strong overall debugging skills
• Prior experience with computational logic, interconnect networks and/or memory system is desirable
• Strong background in microarchitecture and computer architecture preferably in the area of AI accelerators
• Knowledge of FPGA and emulation platforms preferred
• Strong analytical and problem-solving skills
• Excellent communication and interpersonal skills
• Ability to work independently and as part of a team
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.

#LI-VL1

Memory IO Lab is part of Samsung’s Memory Business Unit, the industry's all-time DRAM and NAND Flash leader both in technology as well as in volume. Memory IO’s vision is to provide memory interface technology solutions which can be adopted in DDR, LPDDR, GDDR, and more. We are an integral part of Samsung’s paramount R&D innovation engine. We work closely with cross-disciplinary development teams to bring feature innovation to product roadmaps.

Come and join the team that is providing the next generation IO tech solutions to support emerging machine learning applications, data analytics, and edge computing.

Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy

What You'll Do

• Hands on in analog circuit design, which includes circuit design, running simulations to confirm functionality and performance, and work with verification team to verify design. The mixed-signal designs will include but are not limited to the following: high-speed data converters, PLL, and SERDES.
• Guide layout floor-planning block and top level to optimize the overall performance; supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary.
• Ownership of circuit and system specifications.
• Simulate designs with state-of-the-art CAD tools.
• Document designs and simulation results.

What You Bring

• BS 10+ years experience, MS 8+years of experience, PhD 5+ years experience in Electrical Engineering, Computer Science preferred. 
• 5+ years of experience working with system on chip architecture, high-speed serial interfaces, analog and mixed-signal circuit designs using advanced CMOS technology nodes.
• Prior experience in design of any one of the standard high speed interfaces like DDR, LPDDR, , GDDR, HBM I/O interface.
• Needs to be an expert in providing and understanding layout requirements of high speed circuits.
• Knowledge of all facets of high speed I/O design but specifically should include DLL / PLL / FFE / CTLE / DFE, output drivers , ODT, Duty cycle correction (DCC), Training/calibration to improve timing, high speed power design and low power design.
• Experience working closely with device/process team to define transistor specs
• The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment.
• Ability to troubleshoot and analyze complex problems.
• Excellent communication (written and verbal) and interpersonal skills
• Experience in high frequency clock distribution design, implementation, and analysis.
• Deep understanding of PPA (performance, power, and area) trade-offs.
• Ability to handle EDA tools well, such as Cadence, MATLAB (Simulink), and EM tools
• Experience on silicon bring-up and automatic measurement using script
• Strong scripting and automation skills using Tcl/Perl. Knowledge of Python is a plus.
• Self-motivated problem-solver with an ability to work well in a team.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Join Samsung Semiconductor to guide the development and design evaluation of next‑generation semiconductor packages and memory devices. In this role as a Staff Engineer for Mechanical Simulation, you will partner with cross‑functional, multicultural teams to advance innovative packaging solutions, automate simulation workflows, and bridge the gap between numerical predictions and experimental validation.

Location:  Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy with 10-20% of domestic and international travel.

Reports to: Principal Engineer

What You’ll Do

• Perform advanced numerical modeling and simulation to evaluate and improve the performance and reliability of cutting‑edge semiconductor packages and memory devices.
• Provide mechanical and thermal design support throughout package‑ and system‑development stages—from concept and detailed modeling to qualification and reliability testing.
• Apply hands‑on expertise in mechanical and thermal modeling of micro‑electronic components, including interconnects, solder joints, BGAs, and advanced‑packaging architectures.
• Develop and maintain scripts for process automation (Python, MATLAB, or ANSYS APDL) to streamline pre‑processing, simulation, and post‑processing workflows for parametric and sensitivity studies.
• Leverage a solid understanding of semiconductor manufacturing, advanced‑packaging technologies, material properties, and associated design and reliability constraints.
• Design, execute, and interpret validation experiments that correlate and calibrate simulation models with empirical data.
• Contribute effectively both independently and as a member of cross‑functional, cross‑cultural, and globally distributed teams.

What You Bring

• Ph.D. in Mechanical Engineering, Materials Science, Physics, or a related field. (Equivalent combination of a Master’s degree and extensive professional experience also welcomed).
• 10+ years of hands‑on modeling and simulation experience in the high‑tech or semiconductor industry.
• Proven expertise with leading simulation tools such as ANSYS, Abaqus, HyperMesh, and their associated pre‑/post‑processing software.
• Proficiency in thermal‑analysis platforms Flotherm and Icepak, together with related utilities.
• Extensive experience in static and dynamic simulations, covering linear and nonlinear analyses that involve geometric and material non‑
• Deep knowledge of thermal analysis and cooling‑design strategies for advanced packaging solutions.
• In‑depth understanding of advanced semiconductor packaging, interconnect structures, and reliability‑modeling techniques.
• Strong technical‑writing skills, capable of producing clear, comprehensive documentation and communicating complex concepts to both technical and non‑technical audiences.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-MD1

What You’ll Do

We are looking for a passionate and experienced Staff Engineer, SRAM Circuit Design  to lead the development of next-generation SRAM solutions. In this position, you will drive end-to-end design of high-performance, low-power memory circuits used in cutting-edge semiconductor products. Your work will directly influence the power, performance, and area (PPA) efficiency of future computing, mobile, and AI platforms.

This role combines deep technical expertise with strategic team leadership, offering the opportunity to innovate at the forefront of semiconductor design.

• Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders and control circuits for advanced process nodes (e.g., 2nm, 3nm and 5nm).
• Optimize SRAM designs for performance, power and area (PPA) and yield.
• Develop custom layouts and perform physical design verifications (e.g., DRC, LVS).
• Evaluate trade-offs between speed, power, and area to meet design targets.
• Develop and improve SRAM design methodologies, including automation scripts for design, simulation, and verification.
• Work with product and test engineers to develop test plans and support silicon bring-up.
• Mentor Junior engineers, providing guidance on SRAM design techniques and best practices.
• Perform extensive circuit simulations using tools like HSPICE, finesim or cadence Spectre to validate SRAM functionality and performance.
• Contribute to patents, technical papers, or industry conferences to advance SRAM technology.

What You Bring

• Bachelor's degree in electrical engineering with 10+ years of industry experience or master's degree in electrical engineering with 8+ years of experience strongly preferred. 
•  Prior experience in SRAM or memory circuit design, with a proven track record of delivering SRAM designs in advanced process nodes.
• Strong understanding of semiconductor devices physics and process technology (FinFET, GAA, SOI, etc.).
• Expertise in SRAM architecture, including bitcells, sense amplifiers, write drivers, and read/write control paths.
• Familiarity with timing analysis, power analysis, and design for manufacturability (DFM).
• Proficiency in circuit simulation, variation analysis, and design tools such as Spectre, HSPICE, Cadence Virtuoso, etc.
• Knowledge of scripting languages (e.g., Python, Perl, TCL) for automation of design tasks.
• Strong cross-functional collaboration and communication skills for working with design, layout, verification, and technology development teams.
• Experience with advanced technology nodes (e.g., 5nm, 3nm, or beyond).
• Knowledge of SRAM compiler development and experience with low-power SRAM design techniques (e.g., power gating, voltage scaling).
• Background in silicon debug and root-cause analysis.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change. 

#LI-SF1

Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. 

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

At the Technology Enabling Development Lab (TED), our core development focus is the host interface firmware layer that sits in the intersection of system software and flash management firmware. This key host interface firmware technology drives Samsung’s breakthrough V-NAND technology and enables our customers to power performance-oriented, demanding, enterprise-class applications ranging from hyper-scale data centers, to big data processing, to software defined virtualized storage arrays and infrastructures.

We are looking for a dynamic, self-motivated, experienced engineer to architect and lead functional test coverage and test methodologies for NVMe SSDs.

Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Manage Enterprise server infrastructure, execute Customer Qual tests and debug failures
• Execution of enterprise SSD qualifications in customer systems.
• Communicate with team lead to understand qualification processes and test plans. Report status of qualifications and manage customer expectations.
• Coordinate  with internal team and customer test engineers to execute qual plans as per schedule. Teams will be both local and remote.
• Triage test failures and do a first level FA. Design and execute experiments to root cause defects and verify fixes in coordination with development teams.
• Provide feedback to functional test teams on issues seen in customer quals to better functional test coverage.
• Contribute in Triaging customer field issues and provide support for timely resolution of customer issues.
• Identify automation opportunities and help Automation team to continue to improve and add to the existing framework.

What You Bring

• BS in Computer Science or related technical field with 10+ years of system level testing or development of enterprise servers and enterprise storage systems experience or MS with 8+ years preferred.
• Experience with at least storage protocol like NVMe/PCIe, SAS, SATA, Fibre Channel
• Familiar with one of protocol analyzers like LeCroy, SerialTek, or Xgig System or device level performance analysis
• Proficiency in server operating systems especially system debug tools such as system logs.
• Knowledge of enterprise storage/server system technologies.
• Expertise in storage test tools such as performance benchmarks, IO stress tools, protocol certifications, Test execution and bug management tools.
• Scripting experience such as in Perl, Shell or Python
• Experience with SSD or HDD testing
• NetApp/HPE/Dell/IBM System Experience
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-VL1

The Technology Enabling Development Lab (TED) Our core development focus is the host interface firmware layer that sits in the intersection of system software and flash management firmware. This key host interface firmware technology drives Samsung’s breakthrough V-NAND technology and enables our customers to power performance-oriented, demanding, enterprise-class applications ranging from hyper-scale data centers, to big data processing, to software defined virtualized storage arrays and infrastructures.

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Develop black-box functional test coverage and test methodologies for NVMe SSD's.
• Debug, triage failures and work with FW Team to reproduce problems, design and run experiments.
• Analyze customer field issues and improve Functional test coverage where gaps are identified.
• Provide guidance to the Automation team and assist with test coverage integration into the existing framework.
• Must be able to work with local US and international customers and OEMs.

What You Bring

• Bachelors and 10+ yrs, Masters and 8+ yrs’ with focus in Computer Science, Computer Engineering, Electrical Engineering or equivalent.
• Strong programming experience, demonstrated proficiency in scripting languages such as Python, Bash, Linux shell scripts etc.
• Excellent verbal and written communication skills.
• Ability to work individually and in teams.
• Prior NVMe, PCIe knowledge or experience with one or more of the following storage-related technologies: NVM Express, PCI Express, NAND Flash/FTL .
• Knowledge of Enterprise storage/server systems, and proficiency in Linux.
• Expertise in storage test tools such as performance benchmarks, IO stress tools, protocol certifications, test execution and bug management tools.
• Relevant hands-on experience in embedded software or firmware development/testing, including storage devices or other embedded platforms.
• Familiarity and experience with agile development methodologies and practices, particularly in AI/ML-focused environments, is preferred.
• Hands-on experience with PCI protocol analyzers.
• Demonstrated ability to work as a team player, as part of a local and globally distributed team.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-VL1

Intermediate Drupal Developer

***Note that this position is a contract role, with an option to go full-time***

Position Summary

This individual will play a hands-on role in architecting, developing, and maintaining Drupal-based interactive web projects. Detail-oriented, highly organized, and analytical, you are responsible for building scalable Drupal solutions, implementing custom modules, managing CMS configurations, and supporting ongoing enhancements across active client properties.

You must have a strong understanding of the software development lifecycle and be able to communicate project status, issues, and resolutions clearly and effectively.

We work in an agency environment with multiple clients, so communication skills, breadth of experience, multi-tasking across several projects, and passion for modern web technologies are paramount qualities in our ideal candidate. You will collaborate closely with account, creative, UX, and project management teams while also partnering with client IT teams and external vendors when needed.

Core Skills

• Strong experience with Drupal 9/10 (site building and custom development)
• Experience building and maintaining custom Drupal modules
• Proficiency in PHP and Drupal API
• Experience with Drupal theming (Twig, custom themes, component-based development)
• Strong knowledge of HTML5, CSS3, and modern JavaScript
• Experience working with RESTful APIs and third-party integrations
• Experience with Composer and Drupal dependency management
• Experience with Git-based source control workflows
• Familiarity with MySQL and relational database concepts
• Experience with Drupal configuration management and deployment workflows
• Understanding of web accessibility (WCAG) and SEO best practices
• Experience troubleshooting and debugging Drupal applications
• Ability to configure and deploy Drupal web applications
• Working knowledge of Apache and/or Nginx environments

Additional Skills Considered

• Experience with decoupled/headless Drupal architecture
• Familiarity with React, Vue, or other modern JS frameworks
• Experience with AWS (EC2, S3, CloudFront, IAM)
• Experience with CI/CD pipelines and automated deployments
• Experience with Docker-based local development environments
• Knowledge of Acquia, Pantheon, or other Drupal hosting platforms
• Experience with multi-site Drupal environments
• Familiarity with performance optimization and caching strategies (Varnish, Redis)
• Experience working in regulated industries (healthcare, life sciences, etc.)

Competency

• Highly collaborative with strong problem-solving and troubleshooting skills
• Leads by example in concise communication and quality-driven development
• Active participant in code reviews and QA workflows
• Ability to multi-task across multiple client projects simultaneously
• Comfortable interacting with client IT teams during technical discovery
• Ability to investigate and recommend technical solutions for varied project needs
• Strong attention to detail and commitment to clean, maintainable code
• Familiarity with Agile, Scrum, and/or Waterfall methodologies

Essential Functions

• Develop custom Drupal modules and themes
• Configure and maintain Drupal CMS features and content structures
• Translate business requirements and creative designs into functional Drupal solutions
• Implement third-party integrations (APIs, marketing tools, CRM systems, etc.)
• Maintain and update legacy Drupal codebases
• Participate in architecture discussions and technical planning
• Perform code reviews and contribute to best practice standards
• Support deployment processes and troubleshoot production issues
• Optimize Drupal performance and caching configurations
• Code, test, and support database-driven web applications
• Provide technical assistance to creative and UX teams as needed
• Assist in producing accurate tasks and project estimates
• Recommend solutions based on best practices and independent judgment
• Stay current on Drupal core updates, contributed modules, and security releases
• Contribute to documentation and internal knowledge sharing

General Requirements

• This job description should be treated as a guide to the duties that the post holder is expected to perform.
• The description may be amended to meet the changing requirements of the agency.
• All employees are required to be aware of their responsibilities toward Health and Safety and adhere to company policies.

Bonus/nice-to-have Skills

• AWS Lambda
• React JS
• PHP Object-oriented Development (think CodeIgniter MVC frameworks)
• Bootstrap Boilerplate
• SQL
• WordPress Core & Plugins Development
• Tailwind CSS
• Python
• Linux (preferably RHEL)
• SAML Experience

Minimum Required Qualifications

• Education: Bachelor’s degree in computer science, MIS, related field, or equivalent experience
• Work Experience: 3–5 years of professional Drupal development experience

Regularly Interacts With

Account, Creative, UX, Creative Services, Planning, Project Management, and Client IT teams.

As an Astera Labs Physical Design Engineer (Place & Route) to play a crucial role in the planning, coordination, and execution supporting the design of Astera Labs' portfolio of connectivity ASICs used in the world's leading cloud service providers, server and network OEMs. This is a generalist physical design role requiring broad expertise across floorplanning, place-and-route, timing closure, and physical sign-off. You will work closely with designers, verification engineering, and engineering operations to drive blocks from RTL to GDSII. This role is fully on-site and in-person.

Basic Qualifications:

• Strong academic and technical background in electrical engineering. A Bachelor's degree in EE / Computer Engineering is required, and a Master's degree is preferred.
• 3+ years of experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.
• Professional attitude with the ability to prioritize a dynamic list of multiple tasks, plan and prepare for customer meetings in advance, and work with minimal guidance and supervision.
• Entrepreneurial, open-minded behavior and can-do attitude. Think and act fast with the customer in mind!

Required Experience:

• Hands-on and thorough knowledge of synthesis, place and route, timing, extraction, EM-IR, formal verification (equivalence) and other backend tools and methodologies for technologies 7nm or less.
• Block level ownership from architecture to GDSII, driving multiple complex designs to production.
• Experience with Cadence and/or Synopsys physical design tools/flows.
• Familiarity and working knowledge of SystemVerilog/Verilog.
• Proven expertise in developing/maintaining timing constraints, timing signoff methodology, timing closure at the block or full-chip level.
• Experience in working with IP vendors for both RTL and hard-macro blocks.
• Good scripting skills in Tcl, Python, or Perl.

Nice to Have Experience Includes:

• Knowledge of design for test (DFT).
• Familiarity with ECO methodologies and tools.
• Knowledge of LVS/DRC closures.
• Experience with high-speed SERDES or Ethernet PHY design integration.
• Experience with clock tree synthesis optimization.
• Familiarity with PCIe, CXL, or Ethernet connectivity protocols.

As an Astera Labs Physical Design Engineer (Place & Route) to play a crucial role in the planning, coordination, and execution supporting the design of Astera Labs' portfolio of connectivity ASICs used in the world's leading cloud service providers, server and network OEMs. This is a generalist physical design role requiring broad expertise across floorplanning, place-and-route, timing closure, and physical sign-off. You will work closely with designers, verification engineering, and engineering operations to drive blocks from RTL to GDSII. This role is fully on-site and in-person.

Basic Qualifications:

• Strong academic and technical background in electrical engineering. A Bachelor's degree in EE / Computer Engineering is required, and a Master's degree is preferred.
• 8+ years of experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.
• Professional attitude with the ability to prioritize a dynamic list of multiple tasks, plan and prepare for customer meetings in advance, and work with minimal guidance and supervision.
• Entrepreneurial, open-minded behavior and can-do attitude. Think and act fast with the customer in mind!

Required Experience:

• Hands-on and thorough knowledge of synthesis, place and route, timing, extraction, EM-IR, formal verification (equivalence) and other backend tools and methodologies for technologies 7nm or less.
• Block level ownership from architecture to GDSII, driving multiple complex designs to production.
• Experience with Cadence and/or Synopsys physical design tools/flows.
• Familiarity and working knowledge of SystemVerilog/Verilog.
• Proven expertise in developing/maintaining timing constraints, timing signoff methodology, timing closure at the block or full-chip level.
• Experience in working with IP vendors for both RTL and hard-macro blocks.
• Good scripting skills in Tcl, Python, or Perl.

Nice to Have Experience Includes:

• Knowledge of design for test (DFT).
• Familiarity with ECO methodologies and tools.
• Knowledge of LVS/DRC closures.
• Experience with high-speed SERDES or Ethernet PHY design integration.
• Experience with clock tree synthesis optimization.
• Familiarity with PCIe, CXL, or Ethernet connectivity protocols.

We are looking for a top-tier Enterprise Cloud Security Engineer to design and secure the cloud infrastructure supporting the next phase of sustainable air mobility. You are a collaborative, hands-on professional with excellent communication skills and the ability to see the big picture. In this role, you will be responsible for securing our cloud-native environments (AWS/Azure) and ensuring that our telemetry, flight operations, and enterprise systems are protected against advanced persistent threats. You will connect DevOps and Security by incorporating "secure-by-design" principles into our Infrastructure as Code (IaC) and CI/CD pipelines, while ensuring compliance with aviation and federal standards (NIST CSF, 800-53, FedRAMP, DO-326A).

Key Responsibilities

• Cloud Architecture & Hardening: Design, implement, and maintain secure cloud architectures across AWS and Azure. Enforce zero-trust principles and least-privilege access using advanced IAM policies and roles.
• Infrastructure as Code (IaC) Security: Lead the security review and automated scanning of IaC templates (Terraform, CloudFormation, Helm). Prevent misconfigurations before they reach production.
• DevSecOps & Automation: Integrate security tooling (CSPM, CWPP, Secret Scanning) directly into CI/CD pipelines (Jenkins, GitLab, GitHub Actions) to enable rapid, secure deployment.
• Kubernetes & Container Security: Secure containerized workloads and orchestration platforms (EKS/AKS), ensuring runtime protection, image scanning, and network segmentation.
• Compliance & Governance: Map cloud security controls to industry frameworks, including NIST SP 800-53, ISO 27001, and aviation-specific standards like DO-326A—Automate evidence collection for audits.
• Threat Detection & Incident Response: Build high-fidelity detection rules for cloud threats using SIEM/SOAR platforms. Lead investigations into cloud security incidents and perform forensics on ephemeral workloads.
• Telemetry & Data Protection: safeguard critical flight telemetry and sensitive data pipelines through robust encryption, key management (KMS/HSM), and data loss prevention (DLP) strategies.

Required Qualifications

• Experience: 5+ years of experience in Cloud Security, DevSecOps, or Infrastructure Engineering, with at least 3 years focused on public cloud (AWS, Azure, and GCP).
• Technical Mastery: Deep hands-on expertise with Terraform, Kubernetes, and Linux environments.
• Coding/Scripting: Proficiency in Python, Go, or Bash for automating security tasks and building custom tooling.
• Security Tooling: Experience implementing and tuning CSPM/CNAPP tools (e.g., Wiz, Prisma Cloud, Orca, Sysdig) and SIEM platforms (Tenex, Splunk, Datadog Security).
• Frameworks: Working knowledge of NIST CSF, NIST 800-53, or FedRAMP requirements.

Preferred Qualifications

• Aerospace/Defense Experience: Familiarity with DO-326A (Airworthiness Security), ITAR regulations, or safety-critical systems.
• Certifications: AWS Certified Security – Specialty, Azure Security Engineer (AZ-500), CKA (Certified Kubernetes Administrator), and CISSP, CISM.
• Architecture: Experience designing "Zero Trust" networks and implementing Service Mesh (e.g., Istio, Linkerd) security.
• Offensive Security: Experience conducting cloud penetration tests or "Purple Team" exercises to validate defenses.

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $155,000.00 - $185,00.00. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is proud to be an Equal Opportunity employer committed to diversity and inclusivity in the workplace. All aspects of employment are decided on the basis of merit, qualifications, and business needs. We do not discriminate based upon race, color, religion, sex, sexual orientation, age, national origin, disability status, protected veteran status, gender identity or any other characteristic protected by federal, state or local laws.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

We’re looking for an experienced People Analytics Manager to join our People Analytics and Systems team as an insights partner across all areas of the broader People Team. You will build and refine the metrics used by the business to make people decisions. Reporting to the Director of People Analytics and Systems, you will be responsible for:

What You’ll Do:

• Support a global strategy team to deliver business intelligence across the People Team (Human Resources) functions, partners, and business customers.
• Help further advance the People Team as data-driven and insight-led.
• Help those inside and outside of the People Team to make high-quality decisions about the workforce's future and company growth.
• Apply expertise in quantitative analysis and presentation of data to develop visually compelling and informative reports and dashboards
• Promote data quality from People systems through the reporting pipeline, both within the People Team and in partner teams such as Finance and People Operations
• Support other People related programs or ad hoc requests as needed

What You Need:

• 7-10 years of experience in People Analytics or a similar field
• Experience translating data analysis into actionable recommendations for People leaders
• Strong organizational skills, and attention to detail, and integrity in handling confidential and sensitive information

Bonus Qualifications:

• Experience in related HR disciplines (compensation, recruiting, benefits, or compliance)
• Proficient with Workday, Greenhouse, and various People Systems
• Proficient with advanced statistical analysis
• Proficient in SQL, R or Python
• Interest in guiding the integration of AI into HR

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications.

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $150,500 - $180,000. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

What we do  

You’ll join a software engineering team building internal AI solutions that support teams across The Trade Desk. We leverage large language models, retrieval‑augmented generation (RAG), agentic systems, and enterprise platforms like Microsoft Copilot and Anthropic Claude to improve productivity, streamline workflows, and reduce operational friction.

Our team also plays a key role in AI enablement across the company—supporting teams as they adopt Copilot, Claude and similar tools, designing and deploying custom AI agents, and guiding partners through their AI journey from idea to impact.

As a Senior AI Engineer on this team, you’ll be an end-to-end owner—collaborating closely with stakeholders, identifying opportunities, and delivering tools that make a real impact. We’re a nimble, fast-paced, and highly collaborative group that thrives on transforming the way teams operate and driving greater value across The Trade Desk.

What you’ll do: 

Some of the work that you will be doing to help us deliver on our mission is:

• Design and deploy intelligent agentic systems that integrate large language models (LLMs) with enterprise data, tools, and workflows using frameworks like LangChain, LlamaIndex, and Semantic Kernel.
• Develop Retrieval-Augmented Generation (RAG) applications using tools like Azure AI Search, vector databases, and secure enterprise connectors to deliver contextual insights.
• Build and deploy agents using Microsoft Copilot, Copilot Studio, Anthropic Claude, and similar platforms to help teams operationalize solutions within enterprise guardrails.
• Build and iterate on conversational agents that solve real-world problems, meet stakeholder needs, and deliver measurable business value.
• Deliver high-impact features by collaborating across teams, leading through ambiguity, and aligning technical solutions with business goals.
• Drive quality and performance through automated testing, monitoring, and data-driven evaluation of success criteria, user adoption, and operational efficiency.
• Mentor teammates and contribute to a culture of innovation, technical excellence, and continuous learning.

Who you are: 

• You have a Bachelor’s/Master’s level degree in computer science or relevant engineering-related field or equivalent experience.
• You have 8-10+ years of software engineering experience, including 1-2+ years working on AI-powered systems or products.
• You are proficient in Python and comfortable with additional languages such as C#, SQL, or TypeScript/React.
• You’re excited about AI enablement, including helping teams adopt platforms like Microsoft Copilot, Anthropic Claude and Copilot Studio, building agents, and guiding others through their AI journey.
• You have a good foundational knowledge of or hands-on experience with LLM orchestration frameworks (e.g., LangChain, LlamaIndex, Semantic Kernel) and prompt engineering using LLM APIs.
• You have experience productionizing applications and implementing CI/CD pipelines to ensure reliable, scalable deployments.
• You are skilled in data ingestion and transformation using APIs, ETL pipelines, and connectors, and familiar with vector databases and retrieval strategies.
• You communicate clearly across technical and non-technical audiences and thrive in a collaborative, cross-functional environment.
• You are a fast learner who adapts quickly to new technologies and solves complex problems with creativity and pragmatism.

#LI-TP1

A variety of technical opportunities is one of the best things about working at The Trade Desk as a software engineer, which is why we do not expect you to know every technology we use when you start. What we care about is that you can learn quickly and find solutions to complex problems using the optimum tools for the job. What you know is less important than how well you learn and innovate. We are not seeking engineers who know all the answers; we need engineers who can invent answers no one has thought of yet and find answers to the questions yet to be asked. 

The Trade Desk does not accept unsolicited resumes from search firm recruiters. Fees will not be paid in the event a candidate submitted by a recruiter without an agreement in place is hired; such resumes will be deemed the sole property of The Trade Desk. The Trade Desk is an equal opportunity employer. All aspects of employment will be based on merit, competence, performance, and business needs. We do not discriminate on the basis of race, color, religion, marital status, age, national origin, ancestry, physical or mental disability, medical condition, pregnancy, genetic information, gender, sexual orientation, gender identity or expression, veteran status, or any other status protected under federal, state, or local law.

[LA JOBS ONLY] The Trade Desk will consider qualified applicants with criminal histories for employment in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring, Ordinance No. 184652.

[SF JOBS ONLY] Pursuant to the San Francisco Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

#LI-TP1

What we do  

You’ll join a business engineering team building internal AI solutions that support teams across The Trade Desk. We leverage large language models, retrieval‑augmented generation (RAG), agentic systems, and enterprise platforms like Microsoft Copilot and Anthropic Claude to improve productivity, streamline workflows, and reduce operational friction.

Our team also plays a key role in AI enablement across the company—supporting teams as they adopt Copilot, Claude and similar tools, designing and deploying custom AI agents, and guiding partners through their AI journey from idea to impact.

As a Sr AI Enterprise Engineer on this team, you’ll be an end-to-end owner—collaborating closely with stakeholders, identifying opportunities, and delivering tools that make a real impact. We’re a nimble, fast-paced, and highly collaborative group that thrives on transforming the way teams operate and driving greater value across The Trade Desk.

What you’ll do: 

Some of the work that you will be doing to help us deliver on our mission is:

• Design and deploy intelligent agentic systems that integrate large language models (LLMs) with enterprise data, tools, and workflows using frameworks like LangChain, LlamaIndex, and Semantic Kernel.
• Contributring to Retrieval-Augmented Generation (RAG) applications using tools like Azure AI Search, vector databases, and secure enterprise connectors to deliver contextual insights.
• Build and deploy agents using Microsoft Copilot, Copilot Studio, Anthropic Claude, and similar platforms to help teams operationalize solutions within enterprise guardrails.
• Build and iterate on conversational agents that solve real-world problems, meet stakeholder needs, and deliver measurable business value.
• Deliver high-impact features by collaborating across teams, leading through ambiguity, and aligning technical solutions with business goals.
• Drive quality and performance through automated testing, monitoring, and data-driven evaluation of success criteria, user adoption, and operational efficiency.
• Mentor teammates and contribute to a culture of innovation, technical excellence, and continuous learning.

Who you are: 

• You have a Bachelor’s/Master’s level degree in computer science or relevant engineering-related field or equivalent experience.
• You have 8-10+ years of software engineering experience, including 1-2+ years working on AI-powered systems or products.
• You have knowledge of Python and comfortable with additional languages such as C#, SQL, or TypeScript/React.
• You’re excited about AI enablement, including helping teams adopt platforms like Microsoft Copilot, Anthropic Claude and Copilot Studio, building agents, and guiding others through their AI journey.
• You are skilled in data ingestion and transformation using APIs, ETL pipelines, and connectors, and familiar with vector databases and retrieval strategies.
• You communicate clearly across technical and non-technical audiences and thrive in a collaborative, cross-functional environment.
• You are a fast learner who adapts quickly to new technologies and solves complex problems with creativity and pragmatism.

#LI-TP1

A variety of technical opportunities is one of the best things about working at The Trade Desk as a software engineer, which is why we do not expect you to know every technology we use when you start. What we care about is that you can learn quickly and find solutions to complex problems using the optimum tools for the job. What you know is less important than how well you learn and innovate. We are not seeking engineers who know all the answers; we need engineers who can invent answers no one has thought of yet and find answers to the questions yet to be asked. 

The Trade Desk does not accept unsolicited resumes from search firm recruiters. Fees will not be paid in the event a candidate submitted by a recruiter without an agreement in place is hired; such resumes will be deemed the sole property of The Trade Desk. The Trade Desk is an equal opportunity employer. All aspects of employment will be based on merit, competence, performance, and business needs. We do not discriminate on the basis of race, color, religion, marital status, age, national origin, ancestry, physical or mental disability, medical condition, pregnancy, genetic information, gender, sexual orientation, gender identity or expression, veteran status, or any other status protected under federal, state, or local law.

[LA JOBS ONLY] The Trade Desk will consider qualified applicants with criminal histories for employment in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring, Ordinance No. 184652.

[SF JOBS ONLY] Pursuant to the San Francisco Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

#LI-TP1

What we do  

You’ll join a business engineering team building internal AI solutions that support teams across The Trade Desk. We leverage large language models, retrieval‑augmented generation (RAG), agentic systems, and enterprise platforms like Microsoft Copilot and Anthropic Claude to improve productivity, streamline workflows, and reduce operational friction.

Our team also plays a key role in AI enablement across the company—supporting teams as they adopt Copilot, Claude and similar tools, designing and deploying custom AI agents, and guiding partners through their AI journey from idea to impact.

As a Sr AI Enablement Engineer on this team, you’ll be an end-to-end owner—collaborating closely with stakeholders, identifying opportunities, and delivering tools that make a real impact. We’re a nimble, fast-paced, and highly collaborative group that thrives on transforming the way teams operate and driving greater value across The Trade Desk.

What you’ll do: 

Some of the work that you will be doing to help us deliver on our mission is:

• Design and deploy intelligent agentic systems that integrate large language models (LLMs) with enterprise data, tools, and workflows using frameworks like LangChain, LlamaIndex, and Semantic Kernel.
• Contributring to Retrieval-Augmented Generation (RAG) applications using tools like Azure AI Search, vector databases, and secure enterprise connectors to deliver contextual insights.
• Build and deploy agents using Microsoft Copilot, Copilot Studio, Anthropic Claude, and similar platforms to help teams operationalize solutions within enterprise guardrails.
• Build and iterate on conversational agents that solve real-world problems, meet stakeholder needs, and deliver measurable business value.
• Deliver high-impact features by collaborating across teams, leading through ambiguity, and aligning technical solutions with business goals.
• Drive quality and performance through automated testing, monitoring, and data-driven evaluation of success criteria, user adoption, and operational efficiency.
• Mentor teammates and contribute to a culture of innovation, technical excellence, and continuous learning.

Who you are: 

• You have a Bachelor’s/Master’s level degree in computer science or relevant engineering-related field or equivalent experience.
• You have 8-10+ years of software engineering experience, including 1-2+ years working on AI-powered systems or products.
• You have knowledge of Python and comfortable with additional languages such as C#, SQL, or TypeScript/React.
• You’re excited about AI enablement, including helping teams adopt platforms like Microsoft Copilot, Anthropic Claude and Copilot Studio, building agents, and guiding others through their AI journey.
• You are skilled in data ingestion and transformation using APIs, ETL pipelines, and connectors, and familiar with vector databases and retrieval strategies.
• You communicate clearly across technical and non-technical audiences and thrive in a collaborative, cross-functional environment.
• You are a fast learner who adapts quickly to new technologies and solves complex problems with creativity and pragmatism.

#LI-TP1

A variety of technical opportunities is one of the best things about working at The Trade Desk as a software engineer, which is why we do not expect you to know every technology we use when you start. What we care about is that you can learn quickly and find solutions to complex problems using the optimum tools for the job. What you know is less important than how well you learn and innovate. We are not seeking engineers who know all the answers; we need engineers who can invent answers no one has thought of yet and find answers to the questions yet to be asked. 

The Trade Desk does not accept unsolicited resumes from search firm recruiters. Fees will not be paid in the event a candidate submitted by a recruiter without an agreement in place is hired; such resumes will be deemed the sole property of The Trade Desk. The Trade Desk is an equal opportunity employer. All aspects of employment will be based on merit, competence, performance, and business needs. We do not discriminate on the basis of race, color, religion, marital status, age, national origin, ancestry, physical or mental disability, medical condition, pregnancy, genetic information, gender, sexual orientation, gender identity or expression, veteran status, or any other status protected under federal, state, or local law.

[LA JOBS ONLY] The Trade Desk will consider qualified applicants with criminal histories for employment in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring, Ordinance No. 184652.

[SF JOBS ONLY] Pursuant to the San Francisco Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

#LI-TP1

What we do  

You’ll join a business engineering team building internal AI solutions that support teams across The Trade Desk. We leverage large language models, retrieval‑augmented generation (RAG), agentic systems, and enterprise platforms like Microsoft Copilot and Anthropic Claude to improve productivity, streamline workflows, and reduce operational friction.

Our team also plays a key role in AI enablement across the company—supporting teams as they adopt Copilot, Claude and similar tools, designing and deploying custom AI agents, and guiding partners through their AI journey from idea to impact.

As a Sr AI Solutions Architect on this team, you’ll be an end-to-end owner—collaborating closely with stakeholders, identifying opportunities, and delivering tools that make a real impact. We’re a nimble, fast-paced, and highly collaborative group that thrives on transforming the way teams operate and driving greater value across The Trade Desk.

What you’ll do: 

Some of the work that you will be doing to help us deliver on our mission is:

• Design and deploy intelligent agentic systems that integrate large language models (LLMs) with enterprise data, tools, and workflows using frameworks like LangChain, LlamaIndex, and Semantic Kernel.
• Contributring to Retrieval-Augmented Generation (RAG) applications using tools like Azure AI Search, vector databases, and secure enterprise connectors to deliver contextual insights.
• Build and deploy agents using Microsoft Copilot, Copilot Studio, Anthropic Claude, and similar platforms to help teams operationalize solutions within enterprise guardrails.
• Build and iterate on conversational agents that solve real-world problems, meet stakeholder needs, and deliver measurable business value.
• Deliver high-impact features by collaborating across teams, leading through ambiguity, and aligning technical solutions with business goals.
• Drive quality and performance through automated testing, monitoring, and data-driven evaluation of success criteria, user adoption, and operational efficiency.
• Mentor teammates and contribute to a culture of innovation, technical excellence, and continuous learning.

Who you are: 

• You have a Bachelor’s/Master’s level degree in computer science or relevant engineering-related field or equivalent experience.
• You have 8-10+ years of software engineering experience, including 1-2+ years working on AI-powered systems or products.
• You have knowledge of Python and comfortable with additional languages such as C#, SQL, or TypeScript/React.
• You’re excited about AI enablement, including helping teams adopt platforms like Microsoft Copilot, Anthropic Claude and Copilot Studio, building agents, and guiding others through their AI journey.
• You are skilled in data ingestion and transformation using APIs, ETL pipelines, and connectors, and familiar with vector databases and retrieval strategies.
• You communicate clearly across technical and non-technical audiences and thrive in a collaborative, cross-functional environment.
• You are a fast learner who adapts quickly to new technologies and solves complex problems with creativity and pragmatism.

#LI-TP1

A variety of technical opportunities is one of the best things about working at The Trade Desk as a software engineer, which is why we do not expect you to know every technology we use when you start. What we care about is that you can learn quickly and find solutions to complex problems using the optimum tools for the job. What you know is less important than how well you learn and innovate. We are not seeking engineers who know all the answers; we need engineers who can invent answers no one has thought of yet and find answers to the questions yet to be asked. 

The Trade Desk does not accept unsolicited resumes from search firm recruiters. Fees will not be paid in the event a candidate submitted by a recruiter without an agreement in place is hired; such resumes will be deemed the sole property of The Trade Desk. The Trade Desk is an equal opportunity employer. All aspects of employment will be based on merit, competence, performance, and business needs. We do not discriminate on the basis of race, color, religion, marital status, age, national origin, ancestry, physical or mental disability, medical condition, pregnancy, genetic information, gender, sexual orientation, gender identity or expression, veteran status, or any other status protected under federal, state, or local law.

[LA JOBS ONLY] The Trade Desk will consider qualified applicants with criminal histories for employment in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring, Ordinance No. 184652.

[SF JOBS ONLY] Pursuant to the San Francisco Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

#LI-TP1

What We Are Looking For:

We are looking for an experienced leader to join the Flight Software Team at Archer to lead the integration of Archer's safety critical software systems including avionics, batteries, engines, and actuators. You will build and lead a high-performing team while establishing the strategic vision and operational excellence required to deliver safe, certifiable aircraft software systems.

What You'll Do:

• Lead and grow a multi-disciplinary team responsible for software integration, testing, process, and overall operations
• Define and execute the strategic roadmap for software integration and operations across the aircraft development lifecycle
• Partner with aircraft systems, verification, flight test, and integration leadership to align priorities and drive program success
• Establish testing strategies and infrastructure across multiple environments, including simulators, software labs, systems labs, and aircraft prototypes
• Drive root cause analysis and resolution of complex, system-level integration issues by leveraging requirements, architecture diagrams, Simulink models, C source code, and supplier documentation
• Build and manage processes for problem report disposition, coordinating with software development teams to implement corrective actions and preventive measures
• Provide technical leadership and oversight for aircraft production, ground testing, and flight testing operations
• Develop, implement, and continuously improve processes, tools, and guidelines to increase safety, quality, and team efficiency
• Lead program planning, including resource allocation, scheduling, risk management, and cross-functional coordination
• Mentor and develop engineers, fostering technical excellence and career growth within the team
• Interface with executive leadership, regulatory agencies, and external partners on technical matters and program status

What You Need:

• Proven leadership experience managing technical teams in a complex, fast-paced environment
• Excellent communication and stakeholder management skills with ability to influence at all organizational levels
• Strategic thinking with strong organizational and program management capabilities
• Demonstrated ability to build teams, processes, and organizational capabilities from the ground up
• 12+ years of experience working with critical, complex, real-time embedded systems, with at least 5+ years in a leadership role
• Bachelor of Science in Systems Engineering, Controls Engineering, Electrical Engineering, Computer Engineering, Computer Science, or related degree (Master's preferred)
• Deep technical expertise in flight controls, avionics, powertrain, or related aerospace systems
• Extensive experience with systems verification and validation methodologies
• Strong technical foundation in hardware and software integration in laboratory and flight test environments
• Expert knowledge of communication standards and protocols (RS-422/485, CAN, ARINC-429, AFDX, Ethernet, TCP/IP, etc.)
• Experience with debuggers and lab instruments such as oscilloscopes and bus analyzers
• Technical proficiency with C language, MATLAB/Simulink, and scripting languages (bash, Python)
• Must be on-site at Archer San Jose, CA office with ability to travel to Salinas, CA and other locations as needed

Bonus Qualifications:

• Advanced degree (M.S. or Ph.D.) in relevant engineering discipline
• Experience leading software development and integration programs in aerospace or automotive industries
• Direct experience with DO-178C and ARP4754 certification processes to DAL A/B levels
• Knowledge of Real Time Operating Systems (RTOS), multi-threading, and safety-critical software architectures
• Experience with FPGAs and VHDL or Verilog languagesTrack record of building and scaling technical organizationsExperience with tools development, CI/CD pipelines, and test automation infrastructure

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications. At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company's business strategy. For this position we are targeting a base pay between $250,000 - $330,000. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience. Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodations for any part of the application or hiring process should provide their name and contact information to Archer's People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

About the Role

As a Principal Product Applications Engineer on the Leo team, you will sit at the intersection of firmware engineering and customer-facing technical engagement. You will be a key technical resource for enabling Leo CXL Smart Memory Controllers at hyperscale customers and OEM partners — owning firmware bring-up, validation, and customer issue resolution from early silicon through production ramp.

Firmware is considered equally important to hardware at Astera Labs, and this role reflects that. You will work directly with customers to ensure their needs are fully understood and translated into firmware solutions, while collaborating closely with the internal firmware, hardware, and systems engineering teams.

This position is required onsite in San Jose, CA.

Key Responsibilities

• Lead firmware-focused customer engagements for Leo CXL Smart Memory Controllers, including bring-up support, feature enablement, and issue triage on customer platforms
• Develop, validate, and debug firmware using C and Python across Leo's PCIe/CXL and DDR memory subsystems
• Spearhead internal and external discussions on design requirements of DDR4/DDR5 DRAM interfaces, including initialization, training, RAS (Reliability, Availability, Serviceability) features, and performance tuning 
• Serve as the primary firmware technical point of contact for key customer accounts (hyperscalers, OEMs), driving issue resolution and feature demonstrations
• Interpret and implement requirements from CXL, PCIe, and JEDEC DDR specifications into robust firmware solutions
• Collaborate with cross-functional teams (FW engineering, HW, systems, product management) to deliver firmware releases and customer collateral on schedule
• Develop and maintain Python-based test scripts, automation frameworks, and diagnostic tools to support validation and customer debug workflows
• Contribute to technical documentation including application notes, release notes, design guides, and customer-facing collateral
• Represent the Leo team in customer technical reviews, design-in engagements, and industry forums

Basic Qualifications

• Bachelor's degree in Electrical Engineering, Computer Science, or a related technical field; Master's degree preferred
• 8+ years of experience in firmware development, product applications engineering, or a related technical role supporting complex SoC/silicon products for Server, Storage, and/or Networking applications
• Professional attitude with the ability to prioritize a dynamic list of tasks and work with minimal guidance
• Entrepreneurial, open-minded behavior and can-do attitude — think and act fast with the customer in mind!
• Authorized to work in the US and available to start immediately

Required Experience

• High proficiency in C for embedded firmware development in RTOS environments
• Working knowledge of CXL (Compute Express Link) — CXL 1.1/2.0/3.0 — including memory expansion, pooling, and sharing concepts
• Proficiency in Python for scripting, test automation, and diagnostic tooling
• Deep hands-on knowledge of high-speed memory interfaces — DDR4 and/or DDR5 DRAM — including initialization sequences, training algorithms, timing margins, and ECC/RAS features
• Experience with firmware bring-up, debug, and validation of memory or I/O subsystems on server platforms
• Strong debugging skills with the ability to triage and root-cause issues in complex embedded systems
• Familiarity with SoC interfaces including DDR controllers, PCIe controllers, and on-chip memory subsystems
• Experience working with developer workflows: SCM (preferably Git), code reviews, CI/CD pipelines

Preferred Experience

• Experience with PCIe endpoint firmware at the PHY, Link, and Transaction layers; familiarity with PCIe enumeration, MSI/MSI-X, SR-IOV, and error handling
• Hands-on experience with PCIe/CXL protocol analyzers, BERT, and other lab debug equipment
• Familiarity with BIOS/BMC/OS interactions with PCIe/CXL devices and MMIO/RAS concepts
• Experience with server memory performance tuning — latency and bandwidth optimization
• Prior customer-facing or field applications experience in a semiconductor or systems company is a strong plus

Compensation

The base salary range for this role is $175,000 – $230,000 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

Astera Labs is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

What You’ll Do:

We are looking for an experienced Data Engineer to specialize in aviation data and analytics, focusing on two critical areas: scalable and efficient processing of flight test data for rapid design iteration and near-real-time analysis of aircraft health data for predictive maintenance. This role is vital for accelerating our aircraft design and improvement processes through efficient, scalable data processing and for ensuring operational reliability and safety through advanced predictive analytics.

In this role, you will be tasked with various aspects of data engineering. In addition to the above, your responsibilities will include but not limited to the following.

• Architect, build, and optimize our data processing systems to ensure reliability, efficiency, and scalability
• Develop and optimize ETL processes, data models, and data architectures for data transformation, structures, metadata, and workload management
• Develop and maintain data models that support analytics, reporting, and custom app development
• Create robust data quality observability, monitoring, testing, and validation frameworks
• Engage actively with analytics teams and business stakeholders to understand their data needs, ensuring the data architecture supports decision-making processes effectively
• Support the integration of data systems with aircraft telemetry, flight testing, and operational systems

What You Need:

• Bachelor’s or Master’s degree in Computer Science, Aerospace Engineering, Data Analytics, or a related field
• At least 3 years  experience in data or software engineering with background implementing best practices for SQL and programming languages (e.g. Python, Go, Rust)
• Experience designing and managing data warehouse /  lakehouse architectures for high performance and low latency
• Led development of real-time data pipelines using Kafka or related technologies
• Expertise with one or more cloud data platforms (e.g., AWS, GCP, Azure) 
• Deep understanding of data security and quality governance
• Deployed and scaled data workloads using Docker and Kubernetes, with the ability to manage compute resources for high-volume processing 
• Familiarity with ERP systems and how to extract data to build custom tools & applications
• Knowledge of integrating Gen AI into production data workflows 
• Exceptional analytical skills, attention to detail, and the ability to collaborate effectively across multidisciplinary teams
• Clear communication skills that are essential for working across diverse stakeholders

Bonus Qualifications:

• Solid foundation in machine learning and other data science fundamentals
• Familiarity with time series data applications and related technologies
• Experience with Infrastructure as Code (Terraform, CloudFormation)
• Advanced skills in predictive analytics and machine learning models for maintenance and anomaly detection
• Experience in aerospace or a related field, particularly with flight test data analysis and aircraft health monitoring
  
  

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is proud to be an Equal Opportunity employer committed to diversity and inclusivity in the workplace. All aspects of employment are decided on the basis of merit, qualifications, and business needs. We do not discriminate based upon race, color, religion, sex, sexual orientation, age, national origin, disability status, protected veteran status, gender identity or any other characteristic protected by federal, state or local laws.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

Custom Application Question:

In order to comply with U.S. export control laws and regulations, applicants for this position who are non-U.S. nationals (i.e. individuals who are not U.S. Citizens, Permanent Residents, Asylees, Refugees or members of a similar designation) may need to obtain an export-control license to access certain restricted data and/or information. To the best of your knowledge, is there a possibility that you may need to acquire an export-control license? 

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

The Trade Desk is a global technology company with a mission to create a better, more open internet for everyone through principled, intelligent advertising. Handling over 1 trillion queries per day, our platform operates at an unprecedented scale. We have also built something even stronger and more valuable: an award-winning culture based on trust, ownership, empathy, and collaboration. We value the unique experiences and perspectives that each person brings to The Trade Desk, and we are committed to fostering inclusive spaces where everyone can bring their authentic selves to work every day.

Do you have a passion for solving hard problems at scale? Are you eager to join a dynamic, globally- connected team where your contributions will make a meaningful difference in building a better media ecosystem? Come and see why Fortune magazine consistently ranks The Trade Desk among the best small- to medium-sized workplaces globally.

The Team: Marketplace Quality Engineering:

Every second, our bidder evaluates millions of ad opportunities across thousands of publishers and supply paths. Not all of that supply is created equal — some of it is duplicated, some is structurally inaccessible, and some degrades advertiser outcomes. The Marketplace Quality Engineering team exists to make sure our platform is buying the right impressions, not just more impressions.

We own the systems that assess, measure, and optimize supply quality across the programmatic ecosystem. Our work spans deduplication, supply path analysis, quality modeling, and the tooling that turns those signals into decisions at bid time. The problems are technically deep — think identity resolution across fragmented supply chains, statistical modeling to separate signal from noise, and real-time decisioning at platform scale — and they have direct, measurable impact on both advertiser outcomes and platform economics.

This is not theoretical work. When we ship a model update, spend distribution across the platform shifts. Our engineering decisions translate directly into tens of millions of dollars of measurable business impact. If you want to build systems where what you ship visibly matters, this is the team.

You will work with C# / .NET as a core strength, alongside Python and SQL where data and automation need it, and partner closely with product, data, and platform teams across time zones.

Who you are:

Our culture runs deeper than having fun together (though we do that well, too). We take pride in our engineers being trust-builders, generous givers, scrappy problem solvers, and gritty pursuers of excellence. You do not need to meet every requirement below, but people who meet most of them tend to thrive in this role:

- You are comfortable working on an agile, distributed team across time zones and continents.

- You communicate effectively with both technical and non-technical audiences.

- You have a solid grasp of computer science and engineering fundamentals.

- You have strong experience with distributed systems and data-heavy backend work (services, pipelines, or both).

- You are proficient in C# / .NET.

- You are productive with modern development tools: Visual Studio, Visual Studio Code, Rider, and Git.

- You bring 7+ years of software development or engineering experience.

Nice to have (not required): GraphQL or REST API design, large-scale data processing frameworks (e.g. Apache Spark), workflow orchestration tools (e.g. Apache Airflow), schema-based data serialization, Kubernetes, Kafka, database engines (Microsoft SQL Server, PostgreSQL, Aerospike, Vertica, Redis), microservices, Python for data work or automation, and experience working across large codebases with multiple teams.

A wide range of technical opportunities is one of the best parts of engineering at The Trade Desk, which is why we do not expect you to know every technology we use on day one. What matters is that you learn quickly and solve complex problems with the right tools. What you know today matters less than how well you learn, adapt, and innovate. We are not looking for people who already have all the answers — we want engineers who can invent answers no one has thought of yet and frame the questions we have not yet asked.

We are looking for a highly motivated and versatile Senior Platform Engineer to join our platform engineering team. This unique role is central to accelerating our product development lifecycle and operational efficiency. You will be instrumental in bridging the gap between development, infrastructure, and our burgeoning AI/ML initiatives, focusing on automation, self-service infrastructure, and workflow optimization. This position is ideal for an experienced engineer who thrives on creating leverage for others and tackling complex, interdisciplinary challenges.

Key Responsibilities:

CI/CD and Automation

• Design, implement, and maintain scalable and reliable CI/CD pipelines (e.g., using GitLab CI, GitHub Actions, Jenkins, Spinnaker) to ensure rapid and safe deployments across multiple environments.
• Drive the adoption of best practices for build management, testing automation, and deployment strategies (Canary, Blue/Green, etc.).
• Minimize deployment friction and cycle time for all engineering teams.

Self-Service Infrastructure & Provisioning

• Develop and champion self-service tooling and internal platforms (leveraging tools like Terraform, Ansible, Kubernetes, or equivalent cloud provider APIs) that empower development teams to provision and manage their own infrastructure resources securely and efficiently.
• Establish guardrails and policy-as-code to ensure compliance, cost efficiency, and security across all provisioned infrastructure.

AI Infrastructure Enhancement & Support

• Collaborate closely with AI/ML Engineers to improve the underlying platform used for model training, experimentation, and serving.
• Focus on the operationalization of MLOps pipelines, including data lineage tracking, feature store integration, and production model deployment automation.
• Assist in optimizing resource allocation (e.g., GPU usage, specialized hardware) for AI workloads.

Workflow Automation & Internal Tooling

• Architect and build automated workflows and bots, primarily within communication tools like Slack or Zoom, to streamline common engineering tasks (e.g., on-call handoffs, incident response, environment status checks, approval processes).
• Develop internal APIs and services that connect disparate engineering systems to enhance communication and cross-functional transparency.

Required Qualifications

• 5+ years of professional experience in Platform Engineering, DevOps, Site Reliability Engineering (SRE), or a related discipline.
• Deep expertise in cloud platforms (AWS, GCP, or Azure) and infrastructure-as-code tools (Terraform strongly preferred).
• Expertise in containerization and orchestration technologies (Docker and Kubernetes).
• Proficiency in scripting and general-purpose programming languages (e.g., Python, Go, Bash).
• Extensive experience designing and managing CI/CD systems at scale.
• Proven track record of building internal developer platforms or self-service tools.

Preferred Qualifications

• Experience with AI/ML infrastructure, MLOps tooling, or data pipeline technologies (e.g., Airflow, Kubeflow, Vertex AI, SageMaker).
• Prior experience building conversational interfaces, bots, or workflow automation tools for platforms like Slack or Teams.
• Familiarity with distributed tracing, logging, and monitoring systems (e.g., Prometheus, Grafana, ELK stack, Datadog).
• Experience with security best practices in a cloud environment (IAM, network security, secrets management).

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $144,000 - $175,000. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is proud to be an Equal Opportunity employer committed to diversity and inclusivity in the workplace. All aspects of employment are decided on the basis of merit, qualifications, and business needs. We do not discriminate based upon race, color, religion, sex, sexual orientation, age, national origin, disability status, protected veteran status, gender identity or any other characteristic protected by federal, state or local laws.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

What you’ll do:

• Vehicle Performance & Modeling: Build and refine vehicle performance models, perform vehicle-level trade study analyses, and define and validate vehicle performance requirements.
• Handling & Maneuvering: Evaluate flying and handling qualities requirements and determine maneuvering overhead to ensure optimal aircraft responsiveness and safety.
• Dynamics & Aeromechanics: Perform system identification and linearization of complex vehicle dynamics, and analyze aeromechanics and aeroelasticity to ensure vehicle stability.
• Flight Controls Support: Support flight control design for aircraft, including the development and implementation of notch filters, envelope definition etc
• Simulation & Hazard Analysis: Characterize the performance and capabilities of the aircraft. Conduct simulations to support Functional Hazard Analyses (FHAs) at a vehicle level.
• Data Analysis & Model Validation: Analyze flight test data, identify sources of model error, and update vehicle physics models accordingly.
• Systems Integration: Work with internal and external suppliers to integrate their systems into our comprehensive vehicle simulations, including vehicle dynamics, powertrain, actuation, sensors, and environmental modeling.

What you need:

• Education: BS in an Engineering discipline required. MS or PhD in an Engineering discipline highly desirable.
• Experience: 5+ years of aerospace vehicle performance and simulation experience at a full-vehicle level.
• Aerodynamics Expertise: Deep understanding of aerodynamics, specifically pertaining to helicopter rotors, electric VTOL and/or fixed-wing aircraft.
• Simulation Skills: Strong experience with multi-body dynamics simulations. High level of expertise with developing vehicle analysis tools and simulations in Python and MATLAB.
• Modeling Techniques: Expert in modeling and numerical optimization techniques with an understanding of these in the context of aerodynamic vehicles.
• Core Competencies: Strong technical, written, and verbal communication skills with the ability to thrive in a fast-paced design environment.

Bonus Qualifications:

• Experience modeling and analyzing eVTOL aircraft and a deep understanding of the role of various aircraft subsystems, including an electric powertrain.
• Rotorcraft experience
• Pilot’s license.

At Archer, we aim to attract, retain, and motivate talent with the skills and leadership needed to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s strategy. For this position, we are targeting a base pay range of $152,100 - $202,100. Actual compensation offered will be determined by job-related knowledge, skills, and experience.        
        
Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.

About The Role

At Archer’s Product Realization Lab, we build the high-power electromechanical infrastructure that makes flight possible. From megawatt-scale dynamometers to complex electrical test stands, we own the full stack: integration, software, and controls.

We are seeking a Senior Electrical (Test) Systems Engineer to serve as the ultimate authority on system health. This isn't a "follow the manual" role. You’ll be operating at the volatile intersection of high-voltage power and sensitive low-voltage instrumentation—a boundary where noise, grounding issues, and transients create real-world consequences. We need a battle-tested expert who has seen these systems fail in industry and knows exactly how to build them to last.

What You’ll Do

• Diagnose and resolve electrical faults in medium- to high-power test systems including voltage/current ripple, transient noise, EMI, and grounding failures, with full ownership of root-cause findings and mitigation recommendations
• Lead grounding architecture reviews and remediation across the lab, with specific focus on how high-voltage ground faults cascade into low-voltage instrumentation systems
• Set up and operate oscilloscopes, signal conditioning hardware, and bench instrumentation to characterize and isolate electrical anomalies in complex, integrated test environments
• Own ongoing support of delivered test systems including software updates, bug fixes, new feature integration, and in-field troubleshooting to ensure systems remain reliable as configurations evolve
• Build and maintain real-time test and control applications using NI VeriStand and LabVIEW, and interface with subsystems via CAN bus, Modbus, and related industrial communication protocols
• Support system bring-up, integration verification, and validation across hardware, controls, and software layers

What You Need

• Degree in Electrical Engineering (BS, MS, or PhD) or equivalent hands-on industry experience
• Proven experience personally diagnosing and resolving faults in high-power or high-voltage electrical systems with root cause ownership, not just oversight
• Deep hands-on expertise with grounding architecture in mixed high/low voltage environments, including experience solving real grounding failures that impacted low-voltage instrumentation
• Expert-level proficiency with oscilloscopes, signal conditioning hardware, and bench instrumentation as everyday diagnostic tools
• Working knowledge of CAN bus and Modbus in deployed, real-world systems and not coursework or theoretical familiarity
• Experience with NI VeriStand and/or LabVIEW for real-time test and control applications, with the ability to troubleshoot across hardware, controls, and software layers
• Demonstrated ability to support and evolve test systems post-delivery, comfortable owning sustaining engineering, software updates, and fielded system troubleshooting alongside greenfield work

Bonus Qualifications

• Experience in aerospace, EV powertrain, motor drive, or power electronics test environments
• Familiarity with additional fieldbus or industrial protocols (EtherCAT, Ethernet/IP, LIN, RS-232/485)
• Python or MATLAB scripting for data analysis or automation
• Background in HIL (Hardware-in-the-Loop) or real-time validation systems
• Familiarity with electrical CAD tools (EPLAN, AutoCAD Electrical)

Please note that this job description is intended to provide a general overview of the position and does not include an exhaustive list of responsibilities and qualifications.

At Archer we aim to attract, retain, and motivate talent that possess the skills and leadership necessary to grow our business. We drive a pay-for-performance culture and reward performance that supports the Company’s business strategy. For this position we are targeting a base pay between $126,700 - $158,400. Actual compensation offered will be determined by factors such as job-related knowledge, skills, and experience.

Archer is committed to provide a safe workplace and a safe aircraft. This is a safety sensitive designated role. Employment in safety sensitive positions is contingent on successful passage of a background check and is subject to pre-employment and random drug screening.

Role

We are looking for a Senior Staff Software Development Engineer (Build Engineering) to join our team. This is a hybrid role based in San Jose, CA (3 days a week onsite), reporting to the Director, Software Development Engineering in the ZIA Core Engineering department. 

We are seeking a proactive Senior Staff Software Development Engineer (Build Engineering) to accelerate ZIA's transformation into a modernized, automated CI/CD environment. By taking ownership of critical self-service and automation initiatives, you will help scale a lean infrastructure team to meet high demands and directly elevate the daily productivity and developer experience for several hundred engineers.

What you’ll do (Role Expectations)

• Serve as the Tech Lead to drive all Build pipeline optimizations
• Implement innovative automations to improve developer productivity
• Build a solid framework for CI/CD promotional pipelines

Who You Are (Success Profile)

• You act like an owner. Your passion for the mission fuels your bias for action. You operate with integrity because you genuinely care about the outcome. You adapt to what’s needed, navigating seamlessly between high-level strategy and hands-on execution.
• You are a problem-solver. You seek out challenges because you are energized by finding solutions, knowing that solving the hard problems delivers the biggest impact.
• You are a high-trust collaborator. You are ambitious for the team, not just yourself. You embrace our challenge culture by giving and receiving ongoing feedback—knowing that candor delivered with clarity and respect is the truest form of teamwork and the fastest way to earn trust.
• You are a learner. You have a true growth mindset and never stop developing yourself, actively seeking feedback to become a better partner and a stronger teammate. You love what you do and you do it with purpose.
• You are customer-obsessed. You build deep empathy for the customer—both internal and external—and anchor your decisions in solving their real-world problems. You champion their needs from start to finish, knowing their success is our success.

What We’re Looking for (Minimum Qualifications)

• 8+ years of experience designing and deploying large-scale infrastructure in public clouds (e.g., AWS, GCP) with expert-level proficiency in IaC tools (e.g., Terraform, CloudFormation)
• Expert understanding of the end-to-end SDLC, Linux systems, kernel-level concepts, and complex software compilation and packaging processes
• Proven ability to programmatically build and scale CI/CD pipelines, utilizing strong programming expertise in Go and/or Python, along with tooling like Jenkins, GitLab, or Temporal
• Deep foundational knowledge required to onboard rapidly, understand complex ecosystems, and drive immediate, autonomous contributions

What Will Make You Stand Out (Preferred Qualifications)

• Familiarity with, or a strong desire to learn, the Bazel build system, as well as comfortability using AI-assisted coding tools (e.g., Windsurf, Claude) to accelerate delivery
• Strong hands-on experience on the FreeBSD platform
• Good experience in Hypervisor Platforms like Proxmox, ESXi
• Extensive hands-on experience with microservices architecture

#LI-Hybrid #LI-KM9

As a Staff Condition Monitoring Engineer on our Electric Propulsion System team, you'll be at the forefront of solving complex challenges that directly impact the performance, safety, and evolution of Archer's cutting-edge electric aviation technology. This role combines expertise in vibration and health monitoring, predictive diagnostics, and powertrain design with strategic problem-solving to ensure our electric propulsion systems meet the highest standards of reliability and performance.

What You'll Do:

Data Analysis and Monitoring

• Review and analyze flight test data (vibration, thermal, structural) to support ongoing flight test campaigns
• Build and maintain robust analysis tools for processing flight and dynamometer test data
• Develop insights from complex datasets to inform design improvements and operational decisions

Algorithm Development and Implementation

• Own the development and implementation of onboard vibration and engine health monitoring algorithms
• Design predictive maintenance algorithms to optimize system reliability and performance
• Validate and refine monitoring systems throughout the design/development cycle

Leadership and Collaboration

• Lead by example, actively developing solutions alongside the team while providing technical oversight
• Collaborate with cross-functional team members to develop health monitoring metrics and analytical tools
• Work with systems, safety, and reliability teams to inform DFMEA and ensure requirements are properly validated and understood
• Mentor and/or oversee junior engineers

Testing and Validation

• Design and oversee validation and certification testing of vibration monitoring and other health monitoring functions
• Establish test protocols and acceptance criteria for health monitoring systems
• Support certification activities with regulatory authorities

External Partnership Management

• Manage relationships with outside flight instrumentation contractors and consultants
• Coordinate technical requirements and deliverables with external partners

What You Need:

Education and Experience

• Bachelor's degree in Mechanical Engineering, Aerospace Engineering, Electrical Engineering, or related field
• 8+ years of professional engineering experience in vibration analysis, structural or rotating equipment health monitoring, or related fields
• Experience with gearbox, turbine, or electric motor design, testing, or analysis for an automotive, aerospace, or defense application. 

Technical Skills

• Proficiency with data analysis tools and programming languages (Python, MATLAB, or similar)
• Ability to build and maintain data analysis software tools while employing software development and version control (Git, Bitbucket, etc.) best practices. 
• Expert understanding of vibration analysis and signal processing tools
• Experience with health monitoring algorithms and predictive maintenance techniques
• Knowledge of sensors, data acquisition systems, and instrumentation such as accelerometers, load cells, strain gauges, and oil debris sensors. 
• Familiarity with gearbox systems and failure modes. 

Communication and Organization

• Proven ability to organize and lead cross-functional technical initiatives
• Excellent presentation and communication skills to influence decision-making
• Capacity to translate complex technical concepts to clear, testable requirements 

Additional Requirements

• Availability for domestic travel as needed
• Demonstrated commitment to safety and quality in engineering practices

Bonus Qualifications:

• Aerospace development and certification experience
• Strong grasp of electric and/or hybrid powertrains
• Experience with requirements writing and management using tools such as DOORS, Polarion, or similar requirements management software
• Experience as a technical team lead or team manager
• Familiarity with FAA or EASA certification processes
• Experience with machine learning or AI applications in predictive maintenance

At Archer, we aim to attract, retain, and motivate talent with the skills and leadership needed to grow our business. We drive a pay-for-performance culture and reward performance that support the Company's strategy. For this position, we are targeting a base pay range of $152,000 - $200,000. Actual compensation offered will be determined by job-related knowledge, skills, and experience.

Archer is committed to working with and providing reasonable accommodations to job applicants with physical or mental disabilities, and those with sincerely held religious beliefs. Applicants who may require reasonable accommodation for any part of the application or hiring process should provide their name and contact information to Archer’s People Team at people@archer.com. Reasonable accommodations will be determined on a case-by-case basis.