ABOUT THE TEAM

The Battlespace Awareness (BA) team develops state-of-the-art radar systems, deployed to tackle the most significant security challenges of America and its allies. Working across hardware, software, and firmware; in both the RF and digital domains; the team delivers radar architectures that enable advanced surveillance, reconnaissance, and targeting in the contemporary and future battlespace. The Radar team is responsible for all aspects of radar system development; from concepts and architectures through to fielding and sustainment. In this role, you will work closely with an interdisciplinary technical team to define radar architectures, design solutions, build prototypes, perform testing, and mature the prototypes into products.
 

ABOUT THE JOB

We are looking for a Senior FPGA Engineer to join our rapidly growing team in Costa Mesa, CA. In this role, you will be the technical lead for FPGA development supporting our airborne radar products, establishing the foundation for FPGA design processes and best practices. You will be responsible for translating algorithmic requirements into FPGA implementations, leading signal processing design efforts, and collaborating with our Fort Collins team to ensure seamless integration across projects. This will require expertise in FPGA design, signal processing, RTL development (SystemVerilog/VHDL), and Xilinx toolchains. If you are a self-directed technical leader who thrives on establishing new capabilities and can take an algorithm document and independently drive it through to hardware implementation, then this role is for you.
 

WHAT YOU'LL DO

• Lead FPGA architecture, design, and verification efforts for airborne radar systems from concept through production
• Translate signal processing algorithms into efficient, high-performance FPGA implementations on Xilinx SOC/FPGA platforms
• Establish and drive robust FPGA design processes, coding standards, and verification methodologies for the airborne products team
• Collaborate with the Battlespace Awareness engineering team to ensure design consistency and knowledge transfer across sites
• Design and implement digital signal processing chains for radar systems, including data acquisition, filtering, and real-time processing
• Perform timing analysis, resource optimization, and debugging of complex FPGA designs
• Develop and maintain design documentation, including architecture specifications, design reviews, and verification plans
• Mentor and guide other engineers as the team scales FPGA capabilities 

REQUIRED QUALIFICATIONS

• Bachelors degree in electrical engineering, electronics engineering, computer engineering or related field.
• 12+ years of professional experience in FPGA design and development
• Strong expertise in RTL design using SystemVerilog and/or VHDL
• Demonstrated experience with Xilinx FPGA devices and development tools (Vivado, Quartus, etc.)
• Proven experience in digital signal processing implementation on FPGAs
• Self-directed technical leadership with ability to independently drive projects from requirements to implementation
• Experience with FPGA verification methodologies and simulation tools
• Strong understanding of timing closure, resource optimization, and FPGA design constraints
• Eligible to obtain and maintain an active U.S. Secret security clearance 

PREFERRED QUALIFICATIONS

• Experience with radar systems or software-defined radio development
• Familiarity with high-speed interfaces (PCIe, Ethernet, JESD204B, etc.)
• Experience with Xilinx Zynq UltraScale+, Altera AgileX, or RFSoC platforms
• Knowledge of embedded software development for FPGA SoC platforms
• Experience with MATLAB and algorithm-to-hardware workflows
• Understanding of RF systems and digital front-end design
• Familiarity with DO-254 or similar hardware design standards for airborne systems
• Experience with version control (Git) and continuous integration workflows
• Background in aerospace or defense systems development

Senior Hardware Engineer

Aliso Viejo, CA

Sony Interactive Entertainment’s Cloud Gaming Engineering and Infrastructure (CGEI) division is leading the Cloud Gaming revolution, putting console-quality video games on any device, from TVs to consoles to mobile devices and beyond.

Our Hardware & Systems Engineering team is looking for a Senior Hardware Engineer to join an innovative team of hardware engineers specialized in custom scale-out computing development. The ideal candidate complements this team and brings technical leadership to team members and partners.

Responsibilities

• Work with local and remote partners to create custom computing hardware by owning the design cycles for scale-out gaming hardware
• Work with external partners and suppliers to design and execute to hardware specifications
• Work with developers in partner software and firmware departments to create system-level solutions that integrate with existing and novel rack-, datacenter, and global-level system architectures.
• End-to-end PCBA design, including schematic- and VHDL-based design and layout oversight
• Hands-on laboratory work, including new hardware bringup and laboratory management

Qualifications

• BSEE required, MSEE or PhD preferred
• 5+ years of proven hardware design and technical leadership
• Experience with Jira and Confluence in both waterfall and Agile environments
• Excellent written and verbal communication skills
• Ability to articulate technical information in a clear and concise manner at all levels, from executive staff to engineers
• Strong cross-team collaboration and interpersonal skills with a variety of roles including engineering, product management, and support
• Strong understanding of digital electrical design
• Deep knowledge of high-speed protocols, including PCIe link and transport, DDR5/6, Ethernet, USB4
• Proven experience with broadly-used electrical design tools
• Experience building, debugging, and troubleshooting novel high-performance hardware systems

 Skills & Knowledge

• Experience with FPGA/CPLD design, including commensurate knowledge of standard and vendor-specific tooling
• Working experience in Perl, TCL, Python, Linux environments and/or C/C++
• Understanding of computer architecture, interconnects, FPGAs and storage technology
• Experience developing test code (firmware, software test code) for prototypes and early validation platforms and commensurate knowledge of integrated development environments (IDEs)
• Experience leading technical work in small workgroups

ABOUT THE TEAM 

Anduril AIRS provides high-performance cooled infrared imaging solutions, encompassing IDCAs, modules, and cameras. We achieve this through state-of-the-art technologies, advanced designs, and vertically integrated manufacturing processes. Our core strength lies in delivering customized, mission-critical imaging capabilities to system integrators and instrumentation manufacturers facing unique, challenging, and complex thermal imaging needs.

ABOUT THE JOB

The AIRS team is seeking a Senior Firmware Engineer to design a new product lines. In this role, you will work closely with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products.

WHAT YOU’LL DO

• Lead FPGA architecture, standards, development and review processes
• FPGA Development: Designing, architecting, simulating, and integrating VHDL designs into FPGAs or Systems on Chip (SoC) for optimized performance, resource utilization, and power efficiency.
• Hardware/Software Integration: Collaborating with multidisciplinary teams (electrical engineers, software engineers, systems engineers) to ensure seamless integration of the firmware with the overall system, including processor bring-up and board support packages.
• Testing and Validation: Developing robust test benches in VHDL/Verilog and utilizing lab tools such as oscilloscopes and logic analyzers for rigorous testing and validation of designs against functional specifications and performance requirements.
• Optimization: Optimizing the algorithms for hardware acceleration, including MIPS optimization and efficient use of on-chip bus protocols like AXI or AXI-Stream. 

REQUIRED QUALIFICATIONS

• Education: A Bachelor's in Electrical Engineering, Computer Engineering, or a related technical field is typically required.
• Experience: 10+ years of experience developing HDL firmware for FPGA devices 
• Hardware Description Languages: Expertise in VHDL and/or Verilog/SystemVerilog is essential for RTL (Register Transfer Level) design.
• FPGA Tools: Experience with industry-standard FPGA design tools such as Xilinx Vivado or Intel Quartus.
• Debugging Skills: Strong hardware/software debugging skills using standard lab equipment.
• Version Control: Proficiency with version control systems (e.g., Git) for collaborative development.
• Eligible to obtain and maintain an active U.S. Secret security clearance

PREFERRED QUALIFICATIONS 

• Demonstrated experience designing with multi-gigabit SERDES, DDR memory busses, Ethernet MAC and PHY interfaces, FPGAs, and common communication busses like SPI and I2C
• Embedded software development experience with the use of timers, interrupts, hardware peripherals such as SPI controllers and ADCs
• Knowledge of embedded Linux development, including device trees, hardware drivers, bootloaders, and basic Unix/Linux tools
• Familiar with common programming languages like Python and MATLAB
• Familiarity with infrared image sensor technology

About Epirus

Epirus is a high-growth technology company dedicated to overcoming the asymmetric challenges inherent to the future of national security. Epirus' flagship product, Leonidas, is a software-defined system built using intelligent power management techniques that allow power-hungry systems to do more with less.  

Job Summary: This is an exciting role in an innovative company. The ideal candidate for the position is someone who has experience developing high-performance real-time, autonomous software systems to rapidly develop next-generation products.  Employ your expertise by developing software systems that support functions such as autonomous target tracking, agile electronic beam-forming, and real-time hardware control.

Responsibilities: 

• Design and implement software of embedded devices and systems from requirements to production and deployment 
• Design, develop, code, test, and debug system software 
• Build real-time control software for a variety of projects 
• Analyze and enhance the efficiency, stability and scalability of system resources 
• Direct software QA and optimize I/O performance 
• Interface with hardware design and development 
• Assess third-party and open-source software 
• Lead teams to create minimum viable products from an idea 
• Derive software frameworks and architectures to accelerate development 
• Mentor peers to advance team velocity

Basic Qualifications:

• 5+ years of development in C and C++ 
• 3+ years working with embedded systems 
• Additional experience with one or more modern systems language(s): Python, Java, VHDL, Verilog, Go, Rust, etc. 
• Versed in multithreaded design (concurrency primitives, resource management, etc.) 
• Competent in computer science concepts (algorithms, data structures, object-oriented programming, etc.) 
• Strong foundations in mathematics and linear algebra 
• Adequate knowledge of reading schematics and data sheets for components 
• Bachelor’s degree in computer science or a similar discipline, Master’s degree preferred
• This is an on-site position; availability to work in our HQ in Torrance is required

Preferred Skills and Experience:

• 2+ years of experience with Xilinx FPGA and Embedded Cortex CPU architectures 
• Experience building software for real-time operating environments with specific latency requirements 
• Experience with Embedded Linux and/or software integration with FPGA firmware 
• Knowledge or experience with digital signal processing (DSP) or radio frequency (RF) technologies 
• User experience with DevOps Pipeline tools 
• Experience with Docker or Helm  
• Scrum Master Certification 
• Desire to mentor new hires 
• Exposure or interest in sensor fusion, machine learning, or AI

ITAR REQUIREMENTS: 

• To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.  

At Epirus, you’ll work with technical peers and great people—and get first crack at some of the defining technology challenges of our time. Here, “impossible” is just a challenge. We're a diverse, fast-growing team of change-makers fueling the future of energy with revolutionary solutions. Join us and rewrite the rules. 

ABOUT THE TEAM

Anduril's Space team is dedicated to expanding our AI-powered capabilities into the final frontier, enhancing Space Domain Awareness, Space Control, and Command and Control for U.S. military and allied partners. We're developing fully integrated hardware and software systems, including Lattice for Space Missions and modular payloads, to address growing threats in space and ensure our Guardians maintain a decisive advantage in this contested warfighting domain.

ABOUT THE JOB

We are looking for a Sr. FPGA/SoC Engineer to join our rapidly growing team in Costa Mesa, CA. In this role, you will be responsible for developing FPGA/SoC firmware and overseeing 3rd party development. You will work with internal and external design teams to develop products for use in orbit. This will require architecture, RTL generation and debug.

WHAT YOU’LL DO

• Rapidly develop, test, and implement FPGA designs using Xilinx SoC/FPGA.
• Integrate third-party vendors IP, as necessary.
• Work with third-party developers to ensure timely product success
• Perform digital circuit design, VHDL/Verilog coding, synthesis, place and route, timing closure, simulation, and verification. 
• Participate in entire design life cycle: from requirements and concept, through design and hand on testing/board bring up.
• Implement a variety of signal types such as high speed comms (ethernet, serial), signal processing (analog, digital).
• Ensure designs meet all relevant safety and performance standards, with traceability back to top-level system requirements, as necessary.
• Investigate and resolve bugs found during hand on testing (at HDL level and system level).

REQUIRED QUALIFICATIONS

• 5 years of experience preferred in FPGA/HDL hardware design. Experience with Xilinx SoC (Versal) is highly preferred.
• Familiarity with design software like Vivado (preferred), ModelSim, or Quartus.
• Proficient in VHDL and/or Verilog.
• Ability to work in a fast-paced, challenging environment.
• Excellent problem-solving and organizational skills.
• Strong communication and teamwork skills.
• Experience in SoC hardware bring-up, preferably on ARM-based systems.
• Eligible to obtain and maintain an active U.S. Secret security clearance. 

PREFERRED QUALIFICATIONS

• Working knowledge of designing for safety-critical functions.
• FPGA interfaces and high speed busses.
• Experience with systems on a Chip (SoC).
• Low-level firmware (C/C++) development for bring-up and test.
• Experience writing HDL for Space applications.

WHAT IS AIS?

Anduril Intelligence Systems (AIS) is focused on positioning Anduril as a lead provider of specialized engineering and products for Intelligence Community (IC) customers. We work within the IC to understand their requirements, shape their concepts of operation, and deliver exquisite capability across their problem set. We aim to develop and deploy critically needed capabilities that address our customers’ most pressing national security requirements.

ABOUT THE JOB

We are looking for a Staff FPGA Engineer to join our rapidly growing team in Reston, Virginia. You will be responsible for rapidly developing, testing, and implementing FPGA designs on Xilinx SoC/FPGA platforms. This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation. 

WHAT YOU’LL DO

• Integrate third-party vendors IP, as necessary.
• Participate in entire design life cycle: from requirements and concept, through design and hand on testing/board bring up.
• Implement a variety of signal types such as high speed comms (ethernet, serial), signal processing (analog, digital).
• Ensure designs meet all relevant safety and performance standards, with traceability back to top-level system requirements, as necessary.
• Investigate and resolve bugs found during hand on testing (at HDL level and system level).

REQUIRED QUALIFICATIONS

• Bachelors degree in electrical engineering, electronics engineering, computer engineering or related field
• 8+ years of professional experience in FPGA design and development. Experience with Xilinx SoC is highly preferred
• Familiarity with design software like Vivado (preferred), ModelSim, or Quartus
• Proficient in VHDL and/or Verilog
• Ability to work in a fast-paced, challenging environment
• Excellent problem-solving and organizational skills
• Strong communication and teamwork skills
• Experience in SoC hardware bring-up, preferably on ARM-based systems
• Currently possesses and is able to maintain an active U.S. Secret security clearance

PREFERRED QUALIFICATIONS

• Working knowledge of designing for safety-critical functions.
• FPGA interfaces and high speed busses.
• Experience with systems on a Chip (SoC).
• Low-level firmware (C/C++) development for bring-up and test.

WHAT IS AIS?

Anduril Intelligence Systems (AIS) is focused on positioning Anduril as a lead provider of specialized engineering and products for Intelligence Community (IC) customers. We work within the IC to understand their requirements, shape their concepts of operation, and deliver exquisite capability across their problem set. We aim to develop and deploy critically needed capabilities that address our customers’ most pressing national security requirements.

ABOUT THE JOB

We are looking for a Staff FPGA Engineer to join our rapidly growing team in Reston, Virginia. You will be responsible for rapidly developing, testing, and implementing FPGA designs on Xilinx SoC/FPGA platforms. This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation. 

WHAT YOU’LL DO

• Integrate third-party vendors IP, as necessary.
• Participate in entire design life cycle: from requirements and concept, through design and hand on testing/board bring up.
• Implement a variety of signal types such as high speed comms (ethernet, serial), signal processing (analog, digital).
• Ensure designs meet all relevant safety and performance standards, with traceability back to top-level system requirements, as necessary.
• Investigate and resolve bugs found during hand on testing (at HDL level and system level).

REQUIRED QUALIFICATIONS

• Bachelors degree in Electrical Engineering, Electronics Engineering, Computer Engineering or related field
• 12+ years of professional experience in FPGA design and development. Experience with Xilinx SoC is highly preferred
• Familiarity with design software like Vivado (preferred), ModelSim, or Quartus
• Proficient in VHDL and/or Verilog
• Experience in SoC hardware bring-up, preferably on ARM-based systems
• Ability to work in a fast-paced, challenging environment
• Excellent problem-solving and organizational skills
• Strong communication and teamwork skills
• Currently possesses and is able to maintain an active U.S. Secret security clearance

PREFERRED QUALIFICATIONS

• Working knowledge of designing for safety-critical functions
• FPGA interfaces and high speed busses
• Experience with systems on a Chip (SoC)
• Low-level firmware (C/C++) development for bring-up and test

PsiQuantum’s mission is to build the first useful quantum computers—machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems. 

Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries. 

Our architecture and approach is based on silicon photonics. By leveraging the advanced semiconductor manufacturing industry—including partners like GlobalFoundries—we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photons don’t feel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure. 

In 2024, PsiQuantum announced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining—and that now is the time to scale. 

PsiQuantum also develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies—including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical—to prepare quantum solutions for real-world impact. 

Quantum computing is not an extension of classical computing. It represents a fundamental shift—and a path to mastering challenges that cannot be solved any other way. The potential is enormous, and we have a clear path to make it real. 

Come join us. 

Job Summary:

The mission of PsiQuantum's Principal Hardware Design Engineer role is to support the Electronics team by owning hardware designs integral to the underlying system of the quantum computer. This engineer will collaborate in cross-functional teams of thermal, mechanical, firmware, optical engineers. The designs will meet the requirements of the overall system architecture and physical framework of the quantum computer.

Responsibilities:

• Define, Design and deliver production ready high-speed embedded hardware systems.
• Design, create schematics, and oversee PCB layout of analog and digital circuitry consisting of but not limited to high-speed transceivers, 10+ Gbps electrical and optical data links, FPGA's, microcontrollers, clock distribution, and power distribution.
• Ensure signal integrity and EMI suppression is accounted for in all designs.
• Design and create test set-ups for testing of electro-optic modules.
• Characterize, optimize, and debug analog, digital, and electro-optic circuitry using equipment such as mixed signal & sampling oscilloscopes, vector network analyzers, signal generators, multimeters, DC power supplies.
• Develop software to drive measurements.
• Analyze data and extract key performance parameters.
• Maintain detailed documentation of hardware designs, test results, and design changes.
• Software tools:
  • Orcad Schematic Capture and Allegro PCB Layout
  • C++, Python, RTL (VHDL or Verilog)
  • Keysight PathWave ADS
  • Microsoft Office

Experience/Qualifications:

• 7 years of experience with a Master Degree.
• 9-12 years of experience with a B.S. Degree.
• Results oriented.
• Delivers on commitments.
• Attention to detail.
• Data-driven in decision-making.
• Strong problem-solving skills.
• Proven team player with an ability to work effectively across departments, sites, time zones in direct and matrix team environments.
• Excellent verbal and written communication skills with an ability to communicate effectively to a variety of audiences ranging from senior leadership and technical experts to entry-level staff.

PsiQuantum provides equal employment opportunity for all applicants and employees. PsiQuantum does not unlawfully discriminate on the basis of race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, gender expression, national origin, ancestry, citizenship, age, physical or mental disability, military or veteran status, marital status, domestic partner status, sexual orientation, genetic information, or any other basis protected by applicable laws.

Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to recruiting@psiquantum.com.

We are not accepting unsolicited resumes from employment agencies.

PsiQuantum’s mission is to build the first useful quantum computers—machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems. 

Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries. 

Our architecture and approach is based on silicon photonics. By leveraging the advanced semiconductor manufacturing industry—including partners like GlobalFoundries—we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photons don’t feel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure. 

In 2024, PsiQuantum announced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining—and that now is the time to scale. 

PsiQuantum also develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies—including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical—to prepare quantum solutions for real-world impact. 

Quantum computing is not an extension of classical computing. It represents a fundamental shift—and a path to mastering challenges that cannot be solved any other way. The potential is enormous, and we have a clear path to make it real. 

Come join us. 

Job Summary:

We are looking for a digital-hardware system-designer to join our System-Architecture team. You will work in a multi-technology environment and will contribute to shaping and defining the digital-logic systems which drive our photonic quantum computer.

Responsibilities:

• Gather and translate high-level abstract requirements into concrete hardware requirements.
• Devise and implement low-latency algorithms and methods to solve various time-critical tasks that take place in the data-plane of an optical quantum computer.
• Work with other digital-design experts to integrate algorithms into FPGAs.
• Collaborate closely with physicists and digital designers to arbitrate design choices and optimize designs to meet algorithmic performance while matching latency, throughput and footprint constraints.
• Write requirements and documentation.
• Implement cycle-accurate Python models to be integrated in discrete-time-event simulations.
• Implement SystemVerilog implementations matching Python models.
• Write behavioral tests for implementations in Python.

Experience/Qualifications:

• Bachelor's or master's degree in Electrical or Computer Engineering or related discipline.
• 5+ years of relevant work in digital design.
• Knowledge of SystemVerilog (or VHDL) for design and simulation.
• Experience working with FPGAs (Xilinx preferred) and associated tooling.
• Strong critical thinking skills to devise creative and analytical approaches to solving novel, loosely-defined complex problems.
• Team player with an ability to work effectively across departments and time-zones.
• Excellent verbal and written communication skills, with the ability to engage a variety of audiences.
• Experienced Python programmer who strives to write clear code in the context of a small team of contributors.
• Pro-active with the ability to work independently with limited direction, in a fast-moving start-up environment nice-to-have:
• Distributed system experience: involving event correlation from multiple sources, under real-time constraints.
• Experience with High Level Synthesis tools (e.g. Xilinx Vitis).
• Experience with Python for verification (Cocotb).
• Knowledge of photonics and linear optics is a plus.

Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to recruiting@psiquantum.com.

We are not accepting unsolicited resumes from employment agencies.

Job Summary

We are seeking a talented Signal Processing Engineer to design, develop, and optimize advanced digital signal processing (DSP) algorithms for on-chip and embedded implementation. In this role, you will create efficient, hardware-friendly algorithms that run directly on custom SoCs, enabling real-time processing with constraints on power, latency, area, and throughput. You will collaborate closely with the SoC, Firmware, and Machine Learning teams to translate high-level signal processing needs into production-ready solutions.

Key Responsibilities

• Design and develop signal processing algorithms for sensing neural activity in the cortex (e.g. spike detection), monitoring cortical electrode health, and more.
• Design and develop numerical algorithms, such as custom data compression to increase radio throughput.
• Develop fixed-point or quantized versions of algorithms optimized for constrained hardware.
• Implement and verify algorithms in high-level languages and transition them to hardware-friendly representations.
• Perform algorithm-to-architecture mapping: analyze trade-offs between accuracy, latency, power, and resource utilization on the SoCs.
• Collaborate with the digital design team to define micro-architectures for custom on-chip processing pipelines, including dataflow, pipelining, and parallelization.

Required Qualifications

• Education: BS, MS or PhD in Electrical Engineering, Computer Engineering, Signal Processing, or a related field.
• Experience: 3+ years in digital signal processing algorithm development or real-world products, with a focus on embedded or hardware-constrained implementations.
• Fluent in signal processing fundamentals (both analog and digital) and strong numerical capabilities.
• Familiarity with fixed-point arithmetic, quantization effects, and numerical precision trade-offs.
• Proficiency in Python and C for algorithm prototyping and simulation.

Preferred Qualifications

• Hands-on experience with Verilog/VHDL, or transitioning algorithms to RTL.
• Experience with dedicated DSP cores or accelerators.
• Track record of optimizing for power/area/latency in resource-constrained environments.

Base Salary Range:

 $121,000 - $230,500

ABOUT THE TEAM

Anduril’s Electronic Warfare (EW) team is seeking experienced generalist embedded software engineers to build out the software ecosystem supporting a next-generation electronic warfare platform. As an Embedded software engineer, you’ll develop high-performance implementations of numerical algorithms, collaborate with digital systems engineers to enable maximum-performance interfaces between next-gen RF hardware and software, work with DSP and RFML engineers to rapidly deploy bleeding-edge capabilities to our customers, and collaborate with the wider software organization to deliver seamless integration of electronic warfare products with the Anduril Lattice system-of-systems suite. You will apply state-of-the-art software construction techniques to ensure the timely delivery of correct mission-critical code.

WHAT YOU'LL DO

• Work with digital systems engineers and systems programmers to develop high-performance hardware/software interfaces.
• Develop and maintain infrastructure and tools that enable DSP and RFML engineers to rapidly deploy algorithms and models to our assets.
• Develop high-performance implementations of numerical algorithms for generating, manipulating, and visualizing RF data.
• Develop correct, high-reliability software for controlling our electronic warfare assets, seamlessly integrated with the Anduril Lattice ecosystem.
• Utilize infrastructure providing deterministic builds and configuration management for deployment, guaranteeing software traceability and minimizing the maintenance burden of our products.

REQUIRED QUALIFICATIONS

• 7+ years professional experience in software engineering
• Experience (professional or in the setting of an open source community) working with typed functional programming languages (Haskell or Rust)
• Experience with software-defined digital radio systems
• Eligible to obtain and maintain an active U.S. Top Secret SCI security clearance

PREFERRED QUALIFICATIONS

• Experience with MATLAB, especially C code generation.
• Experience with Linux kernel module development
• Experience with FPGA development (Verilog, VHDL, etc.), especially Xilinx devices and tools.
• Experience with graphics programming (OpenGL, DirectX, Vulkan, etc.)
• Experience with Nix/NixOS

WHAT YOU’LL DO

• Technical lead for electrical engineering team, creating embedded compute solutions for vehicle management, DSP, and networking.
• Own the full PCB development cycle of host boards for FPGAs / SoCs / SoMs (Developing requirements, schematic capture, board layout, bring-up, test, and integration).
• Develop and improve workflows throughout the FPGA / HDL design cycle (Architecture, functional block definition, simulation, system testing, HDL library standardization).
• Collaborate with internal stakeholders to develop a strategy for developing and rolling out your compute solutions across Anduril in a scalable manner.
• Create, maintain and communicate product development schedules with sufficient detail to ensure that all assigned personnel are aware of their tasks and deadlines.

REQUIRED QUALIFICATIONS

• Bachelor’s Degree in Electrical Engineering or equivalent
• 15+ years of experience designing, testing and troubleshooting complex board designs in military, automotive or similar hardware.
• Experience with leading an Electrical Engineering team focused on Digital Design
• Proficiency in an HDL language (VHDL, Verilog)
• Familiarity with common MCU, CPU, FPGA devices and technologies.
• Familiarity with standard interfaces such as Ethernet, CAN, I2C, SPI, PCIe, USB, etc.
• Experience in design for signal integrity / power integrity.
• Knowledge of modern analog and digital electronics and electronic circuits.
• Competence with test equipment such as oscilloscopes, logic analyzers, thermal chambers, current-probes, and automation of tests.
• Proficient with Altium Designer or equivalent electronic design automation design tool
• Eligible to obtain and maintain an active U.S. Top Secret security clearance

PREFERRED QUALIFICATIONS

• Understanding and familiarity with DO-254, DO-178C, DO-160, DO-311A
• Understanding and familiarity with MIL-STD-810, MIL-STD-704, MIL-STD-461
• Expertise in computer networking
• Experience with implementing enhanced security measures

ABOUT THE TEAM

Anduril’s Electronic Warfare (EW) team is seeking experienced generalist embedded software engineers to build out the software ecosystem supporting a next-generation electronic warfare platform. As an Embedded software engineer, you’ll develop high-performance implementations of numerical algorithms, collaborate with digital systems engineers to enable maximum-performance interfaces between next-gen RF hardware and software, work with DSP and RFML engineers to rapidly deploy bleeding-edge capabilities to our customers, and collaborate with the wider software organization to deliver seamless integration of electronic warfare products with the Anduril Lattice system-of-systems suite. You will apply state-of-the-art software construction techniques to ensure the timely delivery of correct mission-critical code.

WHAT YOU'LL DO

• Work with digital systems engineers and systems programmers to develop high-performance hardware/software interfaces.
• Develop and maintain infrastructure and tools that enable DSP and RFML engineers to rapidly deploy algorithms and models to our assets.
• Develop high-performance implementations of numerical algorithms for generating, manipulating, and visualizing RF data.
• Develop correct, high-reliability software for controlling our electronic warfare assets, seamlessly integrated with the Anduril Lattice ecosystem.
• Utilize infrastructure providing deterministic builds and configuration management for deployment, guaranteeing software traceability and minimizing the maintenance burden of our products.

REQUIRED QUALIFICATIONS

• 7+ years professional experience in software engineering
• Experience (professional or in the setting of an open source community) working with typed functional programming languages (Haskell or Rust)
• Experience with software-defined digital radio systems
• Willingness to travel up 30%
• Eligible to obtain and maintain an active U.S. Top Secret SCI security clearance

PREFERRED QUALIFICATIONS

• Experience with MATLAB, especially C code generation.
• Experience with Linux kernel module development
• Experience with FPGA development (Verilog, VHDL, etc.), especially Xilinx devices and tools.
• Experience with graphics programming (OpenGL, DirectX, Vulkan, etc.)
• Experience with Nix/NixOS

ABOUT THE TEAM

The Electronic Warfare (EW) team is responsible for developing high-reliability radios, embedded processing, and power systems for software defined radio platforms. Working across hardware, software, and mission autonomy, the team delivers EW-critical electronics, PCB assemblies, and FPGA-based processing architectures that enable Anduril's next-generation autonomous electronic warfare platforms to operate in complex and contested environments. EW Electrical Engineers drive end-to-end development, from system architecture and circuit design to verification, integration, and test, ensuring scalable, mission-ready solutions that meet the performance, reliability, and survivability demands of the U.S. Military and modern EW warfare.

ABOUT THE JOB

We are looking for a Senior FPGA Engineer to join our rapidly growing team in Costa Mesa, CA. In this role, you will be responsible for the end-to-end design and verification of projects on the Xilinx SOC/FPGA platforms and helping to establish robust design processes. This will require expertise in SystemVerilog, FPGA, and Xilinx. If you are someone who has supported rapid software defined radio development, then this role is for you.

WHAT YOU'LL DO

• Work with software, and electrical, engineers to bring up state of the art boards for software defined radios.
• Integrate, and test, VHDL DSP Modules into larger system.
• Design custom, and optimized, HDL for software defined radios.
• Develop drivers for custom RF component boards (PLLs, mixed signal front ends, etc)

REQUIRED QUALIFICATIONS

• Strong experience with DSP implementation for embedded devices and/or software defined radios.
• Experience leading a team of FPGA engineers in the development of new custom PCB's and custom FPGA modules
• Experience with bring-up of high speed digital interfaces (PCIE,JESD,etc).
• HDL design experience using VHDL or Verilog.
• Experience with Linux development environment and tools (e.g. Git, gcc, etc)
• Eligible to obtain and maintain an active U.S. Secret security clearance

PREFERRED QUALIFICATIONS

• Experience with embedded Linux driver development.
• Experience with Linux development environment and tools (e.g. Git, gcc, etc)
• Exposure to Wireless comms or Radar systems
• Experience with RF test equipment (Spec An, Sig Gens, Oscilloscope, etc)
• Experience with Xilinx AI Engines or NVDIA CUDA

WHAT YOU’LL DO

• Lead an electrical engineering team in creating embedded compute solutions for vehicle management, DSP, and networking
• Own the full PCB development cycle of host boards for FPGAs / SoCs / SoMs (Developing requirements, schematic capture, board layout, bring-up, test, and integration)
• Develop and improve workflows throughout the FPGA / HDL design cycle (Architecture, functional block definition, simulation, system testing, HDL library standardization)
• Collaborate with internal stakeholders to develop a strategy for developing and rolling out your compute solutions across Anduril in a scalable manner
• Create, maintain and communicate product development schedules with sufficient detail to ensure that all assigned personnel are aware of their tasks and deadlines.

REQUIRED QUALIFICATIONS

• Bachelor’s Degree in Electrical Engineering or equivalent
• 7+ years of experience designing, testing and troubleshooting complex board designs in military, automotive or similar hardware.
• Experience with leading an Electrical Engineering team focused on Digital Design
• Proficiency in an HDL language (VHDL, Verilog)
• Familiarity with common MCU, CPU, FPGA devices and technologies.
• Familiarity with standard interfaces such as Ethernet, CAN, I2C, SPI, PCIe, USB, etc.
• Experience in design for signal integrity / power integrity.
• Knowledge of modern analog and digital electronics and electronic circuits.
• Competence with test equipment such as oscilloscopes, logic analyzers, thermal chambers, current-probes, and automation of tests.
• Proficient with Altium Designer or equivalent electronic design automation design tool
• Eligible to obtain and maintain an active U.S. Top Secret security clearance

PREFERRED QUALIFICATIONS

• Understanding and familiarity with DO-254, DO-178C, DO-160, DO-311A
• Understanding and familiarity with MIL-STD-810, MIL-STD-704, MIL-STD-461
• Expertise in computer networking
• Experience with implementing enhanced security measures

ABOUT THE TEAM

Anduril’s Electronic Warfare (EW) team is seeking experienced generalist embedded software engineers to build out the software ecosystem supporting a next-generation electronic warfare platform. As an Embedded software engineer, you’ll develop high-performance implementations of numerical algorithms, collaborate with digital systems engineers to enable maximum-performance interfaces between next-gen RF hardware and software, work with DSP and RFML engineers to rapidly deploy bleeding-edge capabilities to our customers, and collaborate with the wider software organization to deliver seamless integration of electronic warfare products with the Anduril Lattice system-of-systems suite. You will apply state-of-the-art software construction techniques to ensure the timely delivery of correct mission-critical code.

WHAT YOU'LL DO

• Work with digital systems engineers and systems programmers to develop high-performance hardware/software interfaces.
• Develop and maintain infrastructure and tools that enable DSP and RFML engineers to rapidly deploy algorithms and models to our assets.
• Develop high-performance implementations of numerical algorithms for generating, manipulating, and visualizing RF data.
• Develop correct, high-reliability software for controlling our electronic warfare assets, seamlessly integrated with the Anduril Lattice ecosystem.
• Utilize infrastructure providing deterministic builds and configuration management for deployment, guaranteeing software traceability and minimizing the maintenance burden of our products.

REQUIRED QUALIFICATIONS

• 2+ years professional experience in software engineering
• Experience with software-defined digital radio systems
• Eligible to obtain and maintain an active U.S. Top Secret SCI security clearance

PREFERRED QUALIFICATIONS

• Experience (professional or in the setting of an open source community) working with typed functional programming languages (Haskell, Scala, F#, OCaml, Rust, etc.)
• Experience with MATLAB, especially C code generation.
• Experience with Linux kernel module development
• Experience with FPGA development (Verilog, VHDL, etc.), especially Xilinx devices and tools.
• Experience with graphics programming (OpenGL, DirectX, Vulkan, etc.)
• Experience with Nix/NixOS

ABOUT THE TEAM 

The Anduril Imaging team develops state-of-the-art imaging systems across both hardware and software, deployed to tackle the most significant security challenges of America and its allies.  The team is heavily involved in utilizing computer vision, perception, electro-optical, infrared, and sensor data to give our war fighters and allies an advantage.   

ABOUT THE JOB 

The Imaging team is seeking a Firmware Engineer to help design a new product lines. In this role, you will work closely with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products. 

WHAT YOU’LL DO 

• FPGA architecture, standards, development and review processes 
• FPGA Development: Designing, architecting, simulating, and integrating VHDL designs into FPGAs or Systems on Chip (SoC) for optimized performance, resource utilization, and power efficiency. 
• Hardware/Software Integration: Collaborating with multidisciplinary teams (electrical engineers, software engineers, systems engineers) to ensure seamless integration of the firmware with the overall system, including processor bring-up and board support packages. 
• Testing and Validation: Developing robust test benches in VHDL/Verilog and utilizing lab tools such as oscilloscopes and logic analyzers for rigorous testing and validation of designs against functional specifications and performance requirements. 
• Optimization: Optimizing the algorithms for hardware acceleration, including MIPS optimization and efficient use of on-chip bus protocols like AXI or AXI-Stream.  

REQUIRED QUALIFICATIONS 

• Education: A Bachelor's in Electrical Engineering, Computer Engineering, or a related technical field is typically required. 
• Experience: 2+ years of experience developing HDL firmware for FPGA devices  
• Hardware Description Languages: Expertise in VHDL and/or Verilog/SystemVerilog is essential for RTL (Register Transfer Level) design. 
• FPGA Tools: Experience with industry-standard FPGA design tools such as Xilinx Vivado or Intel Quartus. 
• Debugging Skills: Strong hardware/software debugging skills using standard lab equipment. 
• Version Control: Proficiency with version control systems (e.g., Git) for collaborative development. 
• Eligible to obtain and maintain an active U.S. Secret security clearance 

PREFERRED QUALIFICATIONS  

• Demonstrated experience designing with multi-gigabit SERDES, DDR memory busses, Ethernet MAC and PHY interfaces, FPGAs, and common communication busses like SPI and I2C 
• Embedded software development experience with the use of timers, interrupts, hardware peripherals such as SPI controllers and ADCs 
• Knowledge of embedded Linux development, including device trees, hardware drivers, bootloaders, and basic Unix/Linux tools 
• Familiar with common programming languages like Python and MATLAB 
• Familiarity with infrared image sensor technology 

WHAT YOU’LL DO

• Lead an electrical engineering team in creating embedded compute solutions for vehicle management, DSP, and networking
• Own the full PCB development cycle of host boards for FPGAs / SoCs / SoMs (Developing requirements, schematic capture, board layout, bring-up, test, and integration)
• Develop and improve workflows throughout the FPGA / HDL design cycle (Architecture, functional block definition, simulation, system testing, HDL library standardization)
• Collaborate with internal stakeholders to develop a strategy for developing and rolling out your compute solutions across Anduril in a scalable manner
• Create, maintain and communicate product development schedules with sufficient detail to ensure that all assigned personnel are aware of their tasks and deadlines.

REQUIRED QUALIFICATIONS

• Bachelor’s Degree in Electrical Engineering or equivalent
• 7+ years of experience designing, testing and troubleshooting complex board designs in military, automotive or similar hardware.
• Experience with leading an Electrical Engineering team focused on Digital Design
• Proficiency in an HDL language (VHDL, Verilog)
• Familiarity with common MCU, CPU, FPGA devices and technologies.
• Familiarity with standard interfaces such as Ethernet, CAN, I2C, SPI, PCIe, USB, etc.
• Experience in design for signal integrity / power integrity.
• Knowledge of modern analog and digital electronics and electronic circuits.
• Competence with test equipment such as oscilloscopes, logic analyzers, thermal chambers, current-probes, and automation of tests.
• Proficient with Altium Designer or equivalent electronic design automation design tool
• Eligible to obtain and maintain an active U.S. Top Secret security clearance

PREFERRED QUALIFICATIONS

• Understanding and familiarity with DO-254, DO-178C, DO-160, DO-311A
• Understanding and familiarity with MIL-STD-810, MIL-STD-704, MIL-STD-461
• Expertise in computer networking
• Experience with implementing enhanced security measures

ABOUT THE TEAM
Anduril’s Electronic Warfare (EW) team is seeking an experienced embedded software engineer to support next-generation electronic warfare platforms in production. As a Production Embedded software engineer, you’ll develop and maintain EW product software specific to a production environment, collaborate with manufacturing and test automation engineers to improve testability, and collaborate with the wider embedded software organization to ensure a seamless new product introduction.

WHAT YOU'LL DO

• Contribute to design reviews acting as an expert in Built In Test, design for test, and fault isolation and detection.
• Define Built In Test strategy and requirements for automated testing, supporting fault detection, isolation, and reporting.
• Develop and maintain production SW builds that enable testing and troubleshooting at board-level and unit-level RF test stations.
• Develop and regression test high-reliability software for controlling our electronic warfare assets, seamlessly integrated with production test automation.
• Utilize infrastructure providing deterministic builds and configuration management for production deployment, guaranteeing software traceability and minimizing the maintenance burden of manufacturing.

REQUIRED QUALIFICATIONS

• 7+ years professional experience in software engineering
• Experience (professional or in the setting of an open source community) working with typed functional programming languages (Haskell or Rust)
• Experience with Built In Test development
• Eligible to obtain and maintain an active U.S. Secret security clearance

PREFERRED QUALIFICATIONS

• Experience with software-defined digital radio systems
• Experience with MATLAB, especially C code generation.
• Experience with FPGA development (Verilog, VHDL, etc.), especially Xilinx devices and tools.
• Experience with graphics programming (OpenGL, DirectX, Vulkan, etc.)
• Experience with Nix/NixOS
• Experience with Linux boot stages
• Basic understanding of RF test equipment, such as signal generators, spectrum analyzers 

RISC-V CPU RTL owner will play a key role in developing next-generation CPU design. This position requires a deep understanding of CPU design including Architecture, RTL, Design Verification, Physical Design Flow. The ideal candidate will drive the unit specification, RTL design, and unit verification.

This role is Remote, based out of The United States.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Key Responsibilities:

• RISC-V CPU Unit Microarchitecture Specification: Define and develop microarchitecture specifications for the assigned unit (branch predictor, rename, instruction scheduling, vector execution, load/store, vector load/store support). The specification includes not only design, but also comprehensive analysis / strategy for verification and PPA (power, performance, area) closure.
• RISC-V CPU Core Unit RTL Design: The candidate will be responsible for the quality of RTL including design verification and PPA closure. This includes writing RTL, reviewing / refining unit verification environment, applying right RTL optimization to control PPA.
• AI Assisted Design Adaption: To maximize the team’s output, the candidate actively uses AI tools to accelerate the CPU design process.
• Mentoring Junior Engineers: depending on a seniority of the engineer, the engineer may mentor junior members in the team.

Qualifications:

• Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Proven track record of designing high-performance CPU RTL for x86, Arm, POWER, SPARC, or RISC-V.
• Deep understanding of design verification strategy and trade-offs for verification methodology (simulation, formal, various checkers, etc…)
• Deep understanding of CPU microarchitecture and PPA trade-off.
• Basic understanding of RISC-V Architecture including V-extension is preferred.
• Proficiency in hardware description languages (HDLs) such as Verilog, SystemVerilog or VHDL.
• Excellent problem-solving abilities and analytical skills.
• Strong communication skills, with the ability to convey complex technical concepts to diverse audiences.
• Ability to work collaboratively in a team-oriented environment and across multiple disciplines.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent is accelerating the future of AI and high-performance compute by building industry-leading CPU and AI architectures. As an Automotive and Robotics SoC Architect, you will define scalable, top-down system architectures that unify our CPU and AI technologies for next-generation automotive applications. This senior technical role shapes the architectural direction of our automotive and robotics portfolio, ensuring our products meet the industry's highest expectations for performance, safety, reliability, and security. This position is central to how Tenstorrent delivers world-class automotive solutions and requires strong technical leadership, systems thinking, and cross-functional collaboration.

This role is remote, based out of North America.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• A systems thinker who can architect complex SoCs from concept to execution.
• A strong communicator who can articulate technical direction across engineering teams and external partners.
• Someone with deep knowledge of safety-critical systems and the unique needs of automotive environments.
• An innovator who can identify future use cases and propose next-generation architectural solutions.
• A leader who thrives in a highly technical, cross-functional, fast-moving environment.

What We Need

• Bachelor’s, Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or related field.
• Extensive experience designing complex SoCs, ideally in automotive applications.
• Proficiency in hardware description languages such as Verilog or VHDL.
• Experience with hardware/software co-design and co-verification.
• Knowledge of automotive safety standards (e.g., ISO 26262) and security principles.
• Someone comfortable with up to 25% international travel. 
• Experience with both cameras, sensors, and others is a plus.

What You Will Learn

• How cutting-edge CPU and AI architectures are adapted for automotive-grade environments.
• Best-in-class methodologies for safety-critical SoC design, verification, and system integration.
• How to translate emerging automotive use cases into scalable, future-proof SoC architectures.
• Approaches to hardware-level security, robustness, and cyber-resilience in automotive compute systems.
• Cross-functional collaboration strategies that drive innovation across architecture, software, DV, and product teams.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

We are seeking a highly motivated and passionate CPU Architect to join our processor architecture team, focusing on the CPU’s load-store unit. In this role, you will contribute to the design, analysis, and optimization of cutting-edge CPU architectures with an emphasis on a high-performance load-store unit. This is an excellent opportunity to work alongside world class architects in high-performance computing and processor design.

This role is Remote, based out of The United States.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Responsibilities:

• Drive the architecture, micro-architecture, design and optimization of the CPU load-store unit for Tenstorrent’s high-performance out-of-order RISCV CPUs
• Propose new implementations to optimize load-store PPA
• Perform simulations, modeling, and performance analysis of advanced CPU features and state-of-the-art data prefetchers
• Collaborate with hardware and software teams to optimize memory access patterns and system performance.
• Stay up to date with industry trends and emerging technologies in CPU architecture and the memory subsystem
• Support documentation and presentation of architectural decisions, trade-offs, and findings.

Experience & Qualifications:

• Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or Computer Science (or equivalent experience).
• Strong understanding of computer architecture fundamentals, including memory hierarchy, cache coherence, and data prefetching
• Familiarity with performance modeling and simulation tools (e.g., Gem5, SimpleScalar, or similar).
• Basic knowledge of hardware description languages (e.g., Verilog, VHDL) and system-level programming (C, C++).
• Problem-solving skills and ability to analyze complex system interactions.
• Excellent communication and teamwork abilities.
• Hands-on experience with performance profiling tools and benchmarking methodologies.
• Exposure to parallel processing architectures and multi-core systems.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

We are looking for a talented engineer to join our CPU design team to define and implement CPU system RTL. You’ll work to combine multiple cores, multiple clusters of cores, fabrics and subsystem components together, collaborating with DV, PD, architecture and performance teams to deliver a functional, timing, and power-converged design.

This role is hybrid, based out of Austin, TX, Fort Collins, CO or Santa Clara, CA.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• An experienced micro-architect who thrives in building CPU systems (multiple cores, multiple clusters of cores and subsystem components) from scratch.
• Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis.
• Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments.
• Background in microarchitecture definition, design specification, and performance-driven trade-off analysis.

What We Need

• 10+ years of industry experience with strong CPU systems RTL and microarchitecture background.
• Collaborate closely with DV, PD, architecture and performance engineers to meet functional, timing, and power goals.
• Use innovative techniques to optimize power, performance, and area while driving RTL experiments and evaluating results.
• Partner with validation and test teams to ensure robust pre-silicon and post-silicon execution.
• Enhance RTL design environment, tools, and methodologies to improve development efficiency.

What You Will Learn

• End-to-end exposure to CPU design from microarchitecture through timing and power convergence.
• How to design and optimize a custom RISC-V CPU system from first principles.
• Integration of open-source and industry-standard tools to improve RTL flows and results.
• Work in a deeply technical, highly collaborative team solving cutting-edge CPU design challenges.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

About Epirus

Epirus is a high-growth technology company dedicated to overcoming the asymmetric challenges inherent to the future of national security. Epirus' flagship product, Leonidas, is a software-defined system built using intelligent power management techniques that allow power-hungry systems to do more with less.  

Job Summary: This is an exciting role in an innovative company. The ideal candidate for the position is someone who has experience developing high-performance real-time, autonomous software systems to rapidly develop next-generation products.  Employ your expertise by developing software systems that support functions such as autonomous target tracking, agile electronic beam-forming, and real-time hardware control.

Responsibilities: 

• Design and implement software of embedded devices and systems from requirements to production and deployment 
• Design, develop, code, test, and debug system software 
• Build real-time control software for a variety of projects 
• Analyze and enhance the efficiency, stability and scalability of system resources 
• Direct software QA and optimize I/O performance 
• Interface with hardware design and development 
• Assess third-party and open-source software 
• Lead teams to create minimum viable products from an idea 
• Derive software frameworks and architectures to accelerate development 
• Mentor peers to advance team velocity

Basic Qualifications:

• 5+ years of development in C and C++ 
• 3+ years working with embedded systems 
• Additional experience with one or more modern systems language(s): Python, Java, VHDL, Verilog, Go, Rust, etc. 
• Versed in multithreaded design (concurrency primitives, resource management, etc.) 
• Competent in computer science concepts (algorithms, data structures, object-oriented programming, etc.) 
• Strong foundations in mathematics and linear algebra 
• Adequate knowledge of reading schematics and data sheets for components 
• Bachelor’s degree in computer science or a similar discipline, Master’s degree preferred
• This is an on-site position; availability to work in our HQ in Torrance is required

Preferred Skills and Experience:

• 2+ years of experience with Xilinx FPGA and Embedded Cortex CPU architectures 
• Experience building software for real-time operating environments with specific latency requirements 
• Experience with Embedded Linux and/or software integration with FPGA firmware 
• Knowledge or experience with digital signal processing (DSP) or radio frequency (RF) technologies 
• User experience with DevOps Pipeline tools 
• Experience with Docker or Helm  
• Scrum Master Certification 
• Desire to mentor new hires 
• Exposure or interest in sensor fusion, machine learning, or AI

ITAR REQUIREMENTS: 

• To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.  

At Epirus, you’ll work with technical peers and great people—and get first crack at some of the defining technology challenges of our time. Here, “impossible” is just a challenge. We're a diverse, fast-growing team of change-makers fueling the future of energy with revolutionary solutions. Join us and rewrite the rules. 

Austin is home to Optiver’s main research, design and manufacturing facility for our custom trading system hardware. Fully understanding the components we use and the (exchange) environments in which our systems operate is critical to our success. We’re looking to expand the team with a quantitative researcher to help in hardware R&D.

With your quantitative skills and affinity for hardware, you’ll work with the engineers in the lab devising experiments, gathering data, running analysis and ultimately building an understanding of how things actually work. Using this knowledge to help to improve our designs, systems and the strategies that run upon them.

What you’ll do

You’ll be involved in a wide variety of tasks which focus around your quantitative skills and understanding of hardware. This is just a few of the things you’ll do:

• Design, build and run experiments to characterize hardware such as switches, routers and trading systems at picosecond scales
• Work with execution researchers at all of our offices to understand real world vs lab performance of our trading systems and strategies
• Work with our software engineers in the lab to scale out and automate your research such that we can apply it at a global scale
• Be part of designing the next generation of systems and strategies which take your findings into account
• Your experience with lab measurements makes you a valuable resource for anyone looking at production data or trying to improve our production captures
• Help run the lab, make sure we have everything we need to run upcoming experiments and manage the queue of work
• Be involved with suppliers to test and understand next generation systems and measurement equipment

What you'll get

You’ll join a culture of collaboration and excellence, surrounded by curious thinkers and creative problem-solvers. Motivated by a passion for continuous improvement, you’ll thrive in a supportive, high-performing environment alongside talented colleagues, collectively tackling some of the toughest challenges in the financial markets.

In addition, you’ll receive:

• The opportunity to work alongside best-in-class professionals from over 40 different countries
• Highly competitive compensation package
•  Global profit-sharing pool and performance-based bonus structure
• 401(k) match up to 50%
• Comprehensive health, mental, dental, vision, disability, and life coverage
• 25 paid vacation days alongside market holidays
• Extensive office perks, including breakfast, lunch and snacks, regular social events, clubs, sporting leagues and more

Who you are

The ideal candidate combines a strong quantitative background with a deep understanding of hardware and can combine both of these skills to drive analysis that helps us improve our designs and strategies:

• You have a strong understanding of quantitative analysis methods and have the ability to present findings to others
• You are grounded in physical reality; you have an understanding of how hardware works and have the ability to use this knowledge to form hypothesis, conduct physical experiments and draw conclusions from that
• You are comfortable working with Python and Jupyter notebooks
• You’re not afraid to be hands on in a datacenter lab environment
• Programming experience in low level languages such as C/C++ or VHDL is a strong plus
• Experience with (low-latency) networks and related hardware is a strong plus
• An educational background in Statistics, Mathematics, Engineering, Computer Science, or similar (Masters/PhD preferred)
• A preference for working collaboratively with like-minded people
• A passion for solving problems and a drive for results

Who we are

At Optiver, our mission is to improve the market by injecting liquidity, providing accurate pricing, increasing transparency and stabilising the market no matter the conditions. With a focus on continuous improvement, we prioritise safeguarding the health and efficiency of the markets for all participants. As one of the largest market making institutions, we are a respected partner on 100+ exchanges across the globe.

Based in ‘The Domain’ neighborhood, Optiver’s Austin office serves as the firm’s innovation nucleus, with a strong focus on quantitative research, software, and hardware engineering initiatives. With tech innovation an integral part of our core business, the booming city proved an ideal backdrop for our heavy investment into systems, infrastructure, machine learning, big data and computing R&D efforts. What’s more, with world-class music, food and art scenes, as well as countless scenic outdoor activities, the quality of life for Austin Optiverians is second to none.

Our differences are our edge. Optiver does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, physical or mental disability, or other legally protected characteristics.

Optiver’s hardware research, development, and manufacturing team, based in Austin, builds some of the world’s fastest and most competitive trading systems. As we continue to grow, we’re looking for a software engineer to help develop the OS and software that powers our custom hardware.

This role spans everything from low-level hardware integration to collaborating with infrastructure teams that manage production systems and traders who configure them to fit their specific needs. While we primarily use Python and Linux, you’ll also encounter a diverse tech stack including TCL, C, C++, ASM, VHDL, and DSLs across platforms from x64 servers to embedded cores.

What you’ll do:

As Software Engineer, your key responsibilities include:

• Designing and maintaining the OS and software stack behind our trading hardware
• Building and supporting Python-based interface layers to control and monitor hardware systems
• Developing software for STM processors embedded on prototype boards
• Managing and supporting a fleet of hardware systems in a live production environment
• Collaborating closely with hardware, infrastructure, and trading teams to ensure seamless system performance
• Contributing to infrastructure automation and transitioning into embedded development and low-level hardware logic over time

What you’ll get:

• The opportunity to work alongside best-in-class professionals from over 40 different countries
• A highly competitive compensation package
• Global profit-sharing pool and performance-based bonus structure
• 401(k) match up to 50%
• Comprehensive health, mental, dental, vision, disability, and life coverage
• 25 paid vacation days alongside market holidays
• Extensive office perks, including breakfast, lunch and snacks, regular social events, clubs, sporting leagues and more

Who you are:

• Strong foundation in computer science fundamentals and hardware systems
• Proficiency in Python, including familiarity with relevant libraries and APIs
• Experience writing software in C/C++
• Creative problem-solving skills at the system level
• Ability to collaborate with developers and researchers

Nice to have:

• Experience with low-level hardware/software interactions (drivers, buses, pins, registers, etc.)
• Ability to read and interpret datasheets and electrical engineering schematics
• Familiarity with devices and drivers in Linux
• Experience with FPGA design using VHDL/Verilog and the Vivado suite of tools
• Knowledge of communication protocols, especially Ethernet
• Exposure to network equipment operating systems like Cisco IOS, Arista EOS, or Juniper MOS
• Experience working with high-performance trading network hardware (both packet- and circuit-switched)

Who we are:

At Optiver, our mission is to improve the market by injecting liquidity, providing accurate pricing, increasing transparency, and stabilising the market no matter the conditions. With a focus on continuous improvement, we prioritise safeguarding the health and efficiency of the markets for all participants. As one of the largest market making institutions, we are a respected partner on 100+ exchanges across the globe.

Our differences are our edge. Optiver does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, physical or mental disability, or other legally protected characteristics.

At Optiver we pride ourselves on being real engineers, not just coders. Our engineers work closely with traders to identify the business problems we face and determine how they should be solved. We apply a disciplined and scientific approach. We engineer simple, well-architected solutions that meet the dynamic needs of our traders. Our passion is to solve problems which really matter to the business, and we take pride in the quality of our solutions.

Hardware Engineers at Optiver build hardware-based trading systems ranging from low latency algorithms to high bandwidth computation. They are responsible for owning all aspects of the development process from ideation to implementation creating bespoke solutions to our complex trading problems. Their systems have little room for failure which add to the stability of the market, not detract from it. Working in close collaboration with software engineers and traders, hardware engineers deeply understand our trading problems and create dynamic, well-architected systems that make an impact in a matter of days and weeks rather than months and years.

What you’ll do: 

• Accelerate network infrastructure and trading system components with high-speed hardware designs.
• Research new low-latency techniques and platforms and identify opportunities for integration with our trading system.
• Work in a multidisciplinary team of traders, software developers, and infrastructure engineers.
• Leverage the best hardware available or build in-house versions to ensure our FPGAs can interface with cutting edge server hardware.
• Manage relationships with 3rd party vendors.

What you’ll get:

You’ll join a culture of collaboration and excellence, surrounded by curious thinkers and creative problem-solvers. Motivated by a passion for continuous improvement, you’ll thrive in a supportive, high-performing environment alongside talented colleagues, collectively tackling some of the toughest challenges in the financial markets.

In addition, you’ll receive:

• The opportunity to work alongside best-in-class professionals from over 40 different countries
• A highly competitive compensation package
• Global profit-sharing pool and performance-based bonus structure
• 401(k) match up to 50%
• Comprehensive health, mental, dental, vision, disability, and life coverage
• 25 paid vacation days alongside market holidays
• Extensive office perks, including breakfast, lunch and snacks, regular social events, clubs, sporting leagues and more

Who you are:

• A Bachelor’s degree in CE, EE, CS, or related technical field.
• Experience designing, coding, testing, and verifying FPGAs and/or ASICs.
• Experience coding in VHDL, Verilog, SystemVerilog as well as C or C++.
• Experience with RTL synthesis, writing timing, area, and other relevant constraints.
• Experience with digital simulators and self-checking test benches.
• Experience supporting post-silicon bring-up and debugging a plus.
• Ability to work closely with software developers to rapidly deliver integrated systems.

Who we are:

At Optiver, our mission is to improve the market by injecting liquidity, providing accurate pricing, increasing transparency, and stabilising the market no matter the conditions. With a focus on continuous improvement, we prioritise safeguarding the health and efficiency of the markets for all participants. As one of the largest market making institutions, we are a respected partner on 100+ exchanges across the globe.

Optiver Chicago’s culture parallels the energetic city we’re immersed in. Home to the Chicago Board of Trade, Chicago Board Options Exchange, and Chicago Mercantile Exchange, Chicago has established itself as the trading capital of the US. Active on leading US exchanges, Optiver’s Chicago office trades a wide range of products from listed derivatives to cash equities, ETFs, bonds and foreign exchange

Our differences are our edge. Optiver does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, physical or mental disability, or other legally protected characteristics.

Optiver is looking to add FPGA Engineers to its Automated Trading Systems (ATS) team. ATS solve a variety of problems with high degrees of difficulty: managing scarce bandwidth resources, responding to market events with extremely low latency, and automatically pricing diverse sets of financial instruments with near-zero error tolerance. We build systems with little room for failure which add to the stability of the market, not detract from it. These systems must be simple, flexible, and well-architected so they can quickly be changed to meet the dynamic needs of our traders. We already have a team of great engineers, but we need more.

Optiver Hardware Engineers:

• Accelerate network infrastructure and trading system components with high speed hardware designs.
• Research new low-latency techniques and identify opportunities for integration with our trading system.
• Work in a multidisciplinary team of traders, software developers, and infrastructure engineers.
• Leverage the best hardware available, ensuring our FPGAs can interface with cutting edge server hardware.

What you'll need:

• A Bachelor’s degree in CE, EE, CS, or related technical field
• Experience designing FPGAs in VHDL or Verilog. We use VHDL.
• Experience coding in VHDL, Verilog, SystemVerilog, C, or C++
• Experience with digital simulators and self-checking test benches a plus
• Ability to work closely with software developers to rapidly deliver integrated systems.

Who we are:

Optiver is a tech-driven trading firm and leading global market maker. As one of the oldest market making institutions, we are a trusted partner of 70+ exchanges across the globe. Our mission is to constantly improve the market by injecting liquidity, providing accurate pricing, increasing transparency and acting as a stabilising force no matter the market conditions. With a focus on continuous improvement, we participate in the safeguarding of healthy and efficient markets for everyone who participates.

Based in ‘The Domain’ neighborhood, Optiver’s Austin office serves as the firm’s innovation nucleus, with a strong focus on quantitative research, software and hardware engineering initiatives. With tech innovation an integral part of our core business, the booming city proved an ideal backdrop for our heavy investment into machine learning, research infrastructure and big data computing. What’s more, with world-class music, food and art scenes, as well as countless scenic outdoor activities, the quality of life for Austin Optiverians is second to none.

About Epirus  

Epirus is a high-growth technology company dedicated to overcoming the asymmetric challenges inherent to the future of national security. Epirus' flagship product, Leonidas, is a software-defined system built using intelligent power management techniques which allow power-hungry systems to do more with less.

Job objective: This is an exciting role an innovative, high-growth defense technology company. The ideal candidate for the position is someone who has experience designing, verifying, and integrating state-of-the-art FPGA systems and embedded processing solutions for RF applications. As a Sr. FPGA Engineer, you will work closely with a talented, multi-disciplinary engineering team in a fast-paced environment to apply emerging technologies in innovative ways to rapidly produce new products.     

Duties  

• Design and verification of RTL modules for FPGA applications
• Ownership of entire FPGA designs from initial architecture trades through implementation, verification, and hardware bringup, including FPGA sizing estimation and IO planning.
• Lead initial testing and bring-up of custom FPGA circuit cards, validating functionality of on-board peripherals including memory interfaces, Ethernet controllers, and integrated sensors.
• Automating test environment (up to and including hardware-in-the-loop testing), lab equipment, and measurement devices
• Capturing design tradeoffs, state machine flow, system address maps, and block diagrams 

Required Qualifications  

• Bachelor’s degree in Electrical Engineering or a related field.
• 5+ years of experience in FPGA design, implementation, and testing
• Extensive experience implementing FPGA designs and embedded processing designs on embedded hardware
• Experience working with latest generation state-of-the-art Xilinx/Intel Parts and associated tool sets (Vivado, Quartus)
• Understanding of common digital communication protocols (SPI, I2C, UART)
• Development Experience of Integrated Embedded Applications (ARM, GPU)
• Experience with standard bus and streaming protocols, such as AXI and AXI-Stream
• Experience with Continuous Integration and Continuous Delivery processes
• Active Secret or Top Secret clearance, or ability to obtain one desired but not required.  

Desired Qualifications   

• Experience with design automation, scripting languages (TCL, Python, Perl, Matlab)
• Knowledge of Advanced Firmware Verification Testbench Development (UVM, System Verilog)
• Skilled with Advanced High-Speed Verilog/VHDL Designs including High Speed Memory Interfaces (DDR4, HBM) and High Speed SerDes IO and Protocols (100GE, JESD204B, Interlaken)
• Experience implementing Complex DSP Algorithms on FPGAs using tools such as Matlab, Simulink, HDL Coder to implement advanced communications or other designs in FPGA
• Experience collaborating with software engineering team in an SoC environment to develop designs that incorporate HDL combined with embedded Linux
• Good written and oral communication skills
• Collaborative; capable of working across all levels of the organization
• Organized; comfortable working in a fast-paced, ever-changing environment 

About the Position

We are looking to hire an Engineer with experience in both software and hardware design to help us build our FPGA-based applications. 

We're big believers in the ability of tools to make programming faster, more pleasant, and more reliable. We apply these same principles to our FPGA Engineering work, and we’re looking for people who are interested in using programming language technology to improve the process of designing, testing, and validating hardware designs. We use Hardcaml, an OCaml library for succinctly describing hardware in RTL. Hardcaml is tightly integrated into our development environment, so you’ll also gain lots of exposure to the libraries and tools that are foundational to our internal systems. No previous knowledge of Hardcaml is required.

In this role, you’ll work on the ground-up design and implementation of new FPGA applications, and help extend and refine the high-level design and testing tools that we use internally. Your day-to-day work will predominantly involve OCaml & Hardcaml, for both RTL design and testing/integration, but you can also expect to work with some Verilog and C. While you don’t need to have worked with OCaml specifically, a good background in typed programming languages is a plus.

If you’d like to learn more, you can read about our interview process, meet some of our newest hires, or check out our OCaml All The Way Down talk and Programmable Hardware podcast episode.

About You

We don’t expect you to have a background in OCaml, finance, or any other specific field—we’re looking for smart programmers who will approach hardware design with a software engineering mindset. We’re more interested in how you think and learn than what you currently know. You should be:

• A top-notch programmer with a love for technology
• Comfortable with a software programming language
• Intellectually curious, collaborative, and eager to learn
• Humble and unafraid to ask questions and admit mistakes
• Experienced with a Hardware Description (or Construction) language (VHDL, Verilog, Chisel, Pymtl, or other), for both writing and testing hardware designs
• Experienced working with FPGA vendor tools (Vivado or Quartus)
• Experienced with building a working FPGA project through an academic, professional, or personal project
• Interested in learning how to use FPGAs in the context of networking

If you're a recruiting agency and want to partner with us, please reach out to agency-partnerships@janestreet.com.

We are deploying machine learning directly onto custom hardware – and we want you to help drive it from the ground up. This is an initiative where you'll have the rare opportunity to architect solutions from scratch, influence technical research direction, and see your work drive real impact in one of the most demanding computing environments in the world.

We build the hardware, the software, and the infrastructure, so when you hit a bottleneck, you can fix it - there's no vendor to wait on and no abstraction layer you're not allowed to touch. If you've ever wanted to push the boundaries of what's computationally possible, this role is for you. We're looking for researchers and experienced engineers from any background. Trading experience is a bonus, not a prerequisite.

Your Core Responsibilities

• Architect and co-design ML models with traders, quant researchers, and software engineers, treating hardware constraints (latency budgets, resource limits, numerical precision) as first-class design inputs
• Shape our custom hardware roadmap by translating ML model requirements into concrete architectural decisions
• Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions from proof-of-concept through production
• Track and evaluate emerging research in neural architecture search, machine learning systems and quantization methods, and determine what translates to measurable improvements in our systems

Your Skills and Experience

• Solid understanding of hardware constraints and design trade-offs (e.g., pipelining, resource utilization, fixed-point arithmetic) that shape how ML models can be efficiently mapped onto FPGAs or custom ASICs
• Experience with hardware fundamentals, whether through VHDL/SystemVerilog development, HLS tools, or ML-to-hardware frameworks like hls4ml, FINN, or Vitis AI
• Understanding of machine learning fundamentals – neural network architectures, inference optimization, quantization techniques, ML frameworks such as PyTorch/TensorFlow
• Proficiency in Python, C++, or similar languages for tooling, testing, and simulation
• Strong communication skills and ability to work collaboratively across disciplines with both technical and non-technical teams

Nice to Have

• Exposure to ML compiler infrastructure such as MLIR, TVM, XLA, or similar tools for lowering and optimizing models for hardware targets
• Background in latency-sensitive or resource-constrained systems including high-frequency trading, particle physics data acquisition, real-time signal processing, or similar domains
• Familiarity with functional verification methodologies (for example SystemVerilog, UVM, Cocotb)
• Advanced degree (MS or PhD) in EE, CS, Physics, or related field, or equivalent depth through industry or research experience

About Epirus 

Epirus is a high-growth technology company dedicated to overcoming the asymmetric challenges inherent to the future of national security. Epirus' flagship product, Leonidas, is a software-defined system built using intelligent power management techniques which allow power-hungry systems to do more with less.  

At Epirus, we’re always looking ahead—and that includes building relationships with forward-thinking engineers who want to shape the future of defense technology. While we may not have an immediate opening that matches your background, we invite you to express interest in future Software Engineering opportunities.

Whether your strengths lie in Backend Software, Frontend/UX/UI, Software Testing (HIL), or Software Infrastructure, there could be a place for you on our team as we grow.

**This posting is for resume collection in anticipation of future opportunities. A member of our Talent Acquisition team will contact you if a suitable position becomes available.**

Learn More about our Software Engineering Roles:

Software Engineering Roles (backend or embedded)

• Design and implement software of embedded devices and systems from requirements to production and deployment 
• Design, develop, code, test, and debug system software 
• Build real-time control software for a variety of projects 
• Analyze and enhance the efficiency, stability and scalability of system resources 

Frontend UX/UI Engineering Roles

• Collaborate effectively with UX/UI designers to ensure the seamless translation of design concepts into functional, user-friendly interfaces
• Collaborate effectively with our backend teams to improve API designs
• Integrate novel front-end tech into our stack
• Optimize not just performance but developer experience, CI/CD, and testing

Infrastructure Engineering Roles

• Design a cloud infrastructure that is secure, scalable, and highly available on AWS.
• Work collaboratively with software engineering to define infrastructure and deployment requirements.
• Provision, configure, and maintain AWS cloud infrastructure defined as code.
• Ensure configuration and compliance with configuration management tools.

Basic Qualifications

• 2+ years of experience in development in C and C++ 
• Bachelor’s in Computer Science, Electrical Engineering, Computer Engineering, or related field,
• Experience with one or more modern systems language(s): Python, Java, VHDL, Verilog, Go, Rust, etc. 

Preferred Qualifications

• Strong foundation in networking concepts and Linux system administration
• Experience with Xilinx FPGA and Embedded Cortex CPU architectures. Experience with
• Drone Control Software (e,g. ArduPilot, PX4)
• Professional front-end/UI development experience, JavaScript and TypeScript Expert
• Mastery in building UI applications with React
• Experience building and maintaining AWS infrastructure (VPC, EC2, Security Groups, IAM, ECS, CodeBuild, S3, RDS

ITAR REQUIREMENTS:  

To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State.   

At Epirus, you’ll work with technical peers and great people—and get first crack at some of the defining technology challenges of our time. Here, “impossible” is just a challenge. We're a diverse, fast-growing team of change-makers fueling the future of energy with revolutionary solutions. Join us and rewrite the rules. 

We are deploying machine learning directly onto custom hardware – and we want you to help drive it forward. This PhD internship is an opportunity to work on research that has direct impact on IMC's work tackling open problems at the frontier of low-latency ML inference and hardware acceleration.

You'll work alongside IMC engineers in one of the most demanding low-latency computing environments in the world. You'll own a focused research project from start to finish, present your findings to the team, and leave behind a prototype or benchmark that we can build on.

Your Core Responsibilities

• Architect and develop an ML focused research project based on a real-world trading environment
• Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions
• Track and evaluate emerging research in neural architecture search, machine learning systems and quantization methods, and determine what translates to measurable improvements in our systems
• Present your project to the team, deepening our collective understanding of an area of ML acceleration
• Gain hardware design fundamentals from skilled RTL developers and learn how they apply to our industry
• Build skills to evaluate research not only from an academic perspective, but through real-world performance constraints, engineering costs, and industry impact

Your Skills and Experience

• Currently enrolled in a PhD program in Electrical Engineering, Computer Science, Physics, or a related field
• Solid understanding of hardware constraints and design trade-offs (e.g., pipelining, resource utilization, fixed-point arithmetic) that shape how ML models can be efficiently mapped onto FPGAs or custom ASICs
• Experience with hardware fundamentals, whether through VHDL/SystemVerilog development, HLS tools, or ML-to-hardware frameworks like hls4ml, FINN, or Vitis AI
• Understanding of machine learning fundamentals – neural network architectures, inference optimization, quantization techniques, ML frameworks such as PyTorch/TensorFlow
• Proficiency in Python or similar languages for tooling, testing, and simulation
• Strong communication skills and ability to work collaboratively across disciplines with both technical and non-technical teams

You may submit one application per role each year.  We strongly encourage you to focus on applying to a single role that best matches your skills and interests.  Though you may apply to multiple roles, please note that each application will be evaluated based on the specific criteria established for that particular role. If you have already applied for this position during the current recruitment season and were not selected, you may reapply when the next recruitment season begins in 2027.

The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.

Base Salary: $225,000

CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.   

CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com. 

Role Overview:

CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.   

Responsibilities: 

• Design and implement complex FPGA designs targeting our next-generation sensor products
• Support system integration of FPGA designs with complex software systems
• Support deployed FPGA capabilities in the hands of our U.S. and international customers
• Work full-time on-site in our office in Hawthorne, California

Minimum Requirements:

• Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
• 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
• Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
• Extensive experience developing in Verilog and SystemVerilog
• Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
• Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
• Experience with Network Protocols (TCP/UDP/IP)
• Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
• Experience using Bash and Python for scripting and testing
• Experience modifying software drivers and applications when needed to validate FPGA designs
• Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
• Ability to work with minimal supervision and collaborate on small teams
• U.S. Person status is required as this position will require the ability to access U.S.-only data systems 

Preferred Requirements:

• Experience designing and implementing highly performant baseband signal processing in an FPGA
• Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
• Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
• Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
• Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
• Experience with Analog Device Transceivers
• Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
• Experience with Time Synchronization technologies (NTP / PTP)
• Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)
• Experience with VHDL
• Experience with high-speed, multi-layer, digital printed circuit board (PCB) design
• Current or previous DoD security clearance 
• Experience with GPUs and/or AI engines
• Experience with git
• Experience with Bitbucket CI, Jenkins or similar CI/CD flows
• Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc) 

Why CHAOS?

• Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
• Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
• Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
• Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
• Team Growth: 200 employees and counting across 5 global offices

The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.

#LI-onsite

CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.   

CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com. 

Role Overview:

CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.   

Responsibilities: 

• Design and implement complex FPGA designs targeting our next-generation sensor products
• Support system integration of FPGA designs with complex software systems
• Support deployed FPGA capabilities in the hands of our U.S. and international customers
• Work full-time on-site in our office in Hawthorne, California

Minimum Requirements:

• Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
• 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
• Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
• Extensive experience developing in Verilog and SystemVerilog
• Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
• Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
• Experience with Network Protocols (TCP/UDP/IP)
• Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
• Experience using Bash and Python for scripting and testing
• Experience modifying software drivers and applications when needed to validate FPGA designs
• Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
• Ability to work with minimal supervision and collaborate on small teams
• U.S. Person status is required as this position will require the ability to access U.S.-only data systems 

Preferred Requirements:

• Experience designing and implementing highly performant baseband signal processing in an FPGA
• Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
• Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
• Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
• Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
• Experience with Analog Device Transceivers
• Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
• Experience with Time Synchronization technologies (NTP / PTP)
• Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)
• Experience with VHDL
• Experience with high-speed, multi-layer, digital printed circuit board (PCB) design
• Current or previous DoD security clearance 
• Experience with GPUs and/or AI engines
• Experience with git
• Experience with Bitbucket CI, Jenkins or similar CI/CD flows
• Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc) 

Why CHAOS?

• Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
• Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
• Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
• Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
• Team Growth: 200 employees and counting across 5 global offices

The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.

#LI-onsite

CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.   

CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com. 

Role Overview:

CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.   

Responsibilities: 

• Design and implement complex FPGA designs targeting our next-generation sensor products
• Support system integration of FPGA designs with complex software systems
• Support deployed FPGA capabilities in the hands of our U.S. and international customers
• Work full-time on-site in our office in Hawthorne, California

Minimum Requirements:

• Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
• 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
• Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
• Extensive experience developing in Verilog and SystemVerilog
• Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
• Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
• Experience with Network Protocols (TCP/UDP/IP)
• Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
• Experience using Bash and Python for scripting and testing
• Experience modifying software drivers and applications when needed to validate FPGA designs
• Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
• Ability to work with minimal supervision and collaborate on small teams
• U.S. Person status is required as this position will require the ability to access U.S.-only data systems 

Preferred Requirements:

• Experience designing and implementing highly performant baseband signal processing in an FPGA
• Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
• Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
• Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
• Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
• Experience with Analog Device Transceivers
• Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
• Experience with Time Synchronization technologies (NTP / PTP)
• Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)
• Experience with VHDL
• Experience with high-speed, multi-layer, digital printed circuit board (PCB) design
• Current or previous DoD security clearance 
• Experience with GPUs and/or AI engines
• Experience with git
• Experience with Bitbucket CI, Jenkins or similar CI/CD flows
• Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc) 

Why CHAOS?

• Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
• Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
• Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
• Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
• Team Growth: 200 employees and counting across 5 global offices

The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.

#LI-onsite

CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.   

CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com. 

Role Overview:

CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.   

Responsibilities: 

• Design and implement complex FPGA designs targeting our next-generation sensor products
• Support system integration of FPGA designs with complex software systems
• Support deployed FPGA capabilities in the hands of our U.S. and international customers
• Work full-time on-site in our office in Hawthorne, California

Minimum Requirements:

• Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
• 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
• Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
• Extensive experience developing in Verilog and SystemVerilog
• Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
• Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
• Experience with Network Protocols (TCP/UDP/IP)
• Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
• Experience using Bash and Python for scripting and testing
• Experience modifying software drivers and applications when needed to validate FPGA designs
• Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
• Ability to work with minimal supervision and collaborate on small teams
• U.S. Person status is required as this position will require the ability to access U.S.-only data systems 

Preferred Requirements:

• Experience designing and implementing highly performant baseband signal processing in an FPGA
• Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
• Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
• Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
• Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
• Experience with Analog Device Transceivers
• Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
• Experience with Time Synchronization technologies (NTP / PTP)
• Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)
• Experience with VHDL
• Experience with high-speed, multi-layer, digital printed circuit board (PCB) design
• Current or previous DoD security clearance 
• Experience with GPUs and/or AI engines
• Experience with git
• Experience with Bitbucket CI, Jenkins or similar CI/CD flows
• Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc) 

Why CHAOS?

• Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
• Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
• Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
• Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
• Team Growth: 200 employees and counting across 5 global offices

The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.

#LI-onsite

CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.   

CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com. 

Role Overview:

CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.   

Responsibilities: 

• Design and implement complex FPGA designs targeting our next-generation sensor products
• Support system integration of FPGA designs with complex software systems
• Support deployed FPGA capabilities in the hands of our U.S. and international customers
• Work full-time on-site in our office in Hawthorne, California

Minimum Requirements:

• Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
• 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
• Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
• Extensive experience developing in Verilog and SystemVerilog
• Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
• Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
• Experience with Network Protocols (TCP/UDP/IP)
• Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
• Experience using Bash and Python for scripting and testing
• Experience modifying software drivers and applications when needed to validate FPGA designs
• Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
• Ability to work with minimal supervision and collaborate on small teams
• U.S. Person status is required as this position will require the ability to access U.S.-only data systems 

Preferred Requirements:

• Experience designing and implementing highly performant baseband signal processing in an FPGA
• Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
• Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
• Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
• Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
• Experience with Analog Device Transceivers
• Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
• Experience with Time Synchronization technologies (NTP / PTP)
• Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)
• Experience with VHDL
• Experience with high-speed, multi-layer, digital printed circuit board (PCB) design
• Current or previous DoD security clearance 
• Experience with GPUs and/or AI engines
• Experience with git
• Experience with Bitbucket CI, Jenkins or similar CI/CD flows
• Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc) 

Why CHAOS?

• Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
• Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
• Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
• Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
• Team Growth: 200 employees and counting across 5 global offices

The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.

#LI-onsite

Who We Are: 

Eras of humanity can often be defined by a dominant transportation mode - horse drawn chariots, ocean going boats, or aircraft. These were spurred by a small group of people rigorously focused on building technology to achieve faster access to more of the world. 

We seek to usher in a new era of humanity defined by universal access to the whole globe free of borders and the presence of a routine way from space to Earth. To do this, we are building highly maneuverable re-entry vehicles that can loiter in orbit before precision landing back on Earth.

What You'll Do:

As a Senior Avionics Engineer, you will be personally responsible for the architecture and implementation of the core avionics elements for Inversion's next-generation vehicles. This position requires a highly motivated engineer who thrives in a fast-paced environment and can execute with autonomy. You will help define the foundation of Inversion's avionics architecture while setting the technical standards for future team growth.

You will be a key member of the Avionics team, reporting directly to the Director of Engineering, Avionics. Our engineers are responsible for the complete lifecycle of the hardware they create, including development, testing, and integration.

Essential Duties and Responsibilities:

• Develop complete avionics systems, including architecture, design, integration, and verification, from initial concept through delivery of qualified hardware

• Lead the technical execution of avionics hardware builds, including PCB design, harnessing, embedded systems, and environmental qualification

• Collaborate with propulsion, guidance and control, thermal and software teams to ensure seamless integration and performance of avionics systems

• Develop, lead, and own digital, analog, and mixed-signal circuit board designs

• Implement robust design and test processes that ensure reliability and safety of your designs

• Qualify your designs through environmental testing including vibration, shock, TCYC, and TVAC testing

• Coordinate with suppliers and internal stakeholders to manage component selection, testing, and delivery schedules

• Lead and present trade studies to shape the architecture and design

• Maintain accurate design documentation, test plans, and reports, demonstrating strong communication and organizational skills

• Contribute to flight software architecture design

Required Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field

• Typically, 5+ years of professional experience in the design, build, and test cycle for satellite and spacecraft flight computer hardware

• Proficiency executing thorough mixed-signal and digital circuit simulations

• Demonstrated ability designing PCBAs using Altium Designer or other board design software

• Hands-on work implementing mixed-signal PCBs with digital communications (UART, I2C, SPI, RS422, RS485, CAN, PCIe, Ethernet, etc.)

• Background in fault-tolerant and failover-capable electronics design

• Proven ability designing test systems and developing test plans for multidisciplinary systems

• Strong understanding of requirements, systems design, and test methods for space, launch, and/or reentry environments including thermal, vibration, shock, EMI/EMC, and radiation

• Proficient using common laboratory equipment such as oscilloscopes, multimeters, power supplies, spectrum analyzers, and data acquisition systems

• Proven track record of delivering high-visibility designs resulting from rigorous methodology

Desired Qualifications:

• Background in high-reliability and/or safety-critical systems for spacecraft or automotive applications

• Knowledge of radiation-hardened or rad-tolerant system design

• Demonstrated ability implementing advanced microprocessors and support structures, including DRAM, power distribution, NAND flash, and other peripherals

• Understanding of unique design requirements for long-duration orbital missions

• Knowledge of common spacecraft ADCS sensors and propulsion components (star trackers, reaction wheels, thermocouples, resistance temperature detectors (RTDs), pressure transducers, solenoid valves, etc.)

• Experience with video system development and integration

• Proficiency with software and scripting languages such as C/C++, Python, or Rust

• Proficiency with RTL languages such as VHDL or Verilog

• Prior work in startups and small independent teams

Our office headquarters is located in Playa Vista, CA. This position requires in-office presence.

_{The California annual base salary for this role is currently $137,000-$193,000. Pay Grades are determined by role, level, location, and alignment with market data.  Individual pay will be determined on a case-by-case basis and may vary based on the following considerations: interviews and an assessment of several factors that are unique to each candidate, job-related skills, relevant education and experience, certifications, abilities of the candidate and internal equity.} 

CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.   

CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com. 

Role Overview:

CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.   

Responsibilities: 

• Design and implement complex FPGA designs targeting our next-generation sensor products
• Support system integration of FPGA designs with complex software systems
• Support deployed FPGA capabilities in the hands of our U.S. and international customers
• Work full-time on-site in our office in Hawthorne, California

Minimum Requirements:

• Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
• 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
• Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
• Extensive experience developing in Verilog and SystemVerilog
• Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
• Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
• Experience with Network Protocols (TCP/UDP/IP)
• Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
• Experience using Bash and Python for scripting and testing
• Experience modifying software drivers and applications when needed to validate FPGA designs
• Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
• Ability to work with minimal supervision and collaborate on small teams
• U.S. Person status is required as this position will require the ability to access U.S.-only data systems 

Preferred Requirements:

• Experience designing and implementing highly performant baseband signal processing in an FPGA
• Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
• Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
• Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
• Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
• Experience with Analog Device Transceivers
• Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
• Experience with Time Synchronization technologies (NTP / PTP)
• Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)
• Experience with VHDL
• Experience with high-speed, multi-layer, digital printed circuit board (PCB) design
• Current or previous DoD security clearance 
• Experience with GPUs and/or AI engines
• Experience with git
• Experience with Bitbucket CI, Jenkins or similar CI/CD flows
• Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc) 

Why CHAOS?

• Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
• Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
• Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
• Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
• Team Growth: 200 employees and counting across 5 global offices

The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.

#LI-onsite

Are you excited by the idea of applying your hardware development expertise to power ultra-low-latency trading systems? Do you want to explore new architectures that push the limits of performance and help take some of our most sophisticated trading strategies to the next level? If so, we encourage you to read on! 

At CTC, we’re looking for a Senior FPGA Engineer to join our FPGA development team to do just that and more. As a member, you'll work closely with other specialists, traders, and quants to design and build the next generation of end-to-end trading systems. While helping craft our development environment and processes, you’ll architect solutions, influence design choices across teams, and see your work translate into real-time impact. 

Responsibilities

• Partner with a skilled team to define and implement a pragmatic architectural vision with a focus on ultra-low-latency and reliability. 
• Collaborate with senior technology leaders to continuously improve our trading platform design. 
• Build a deep understanding of trading workflows, quantitative models, and system performance needs while working with a multidisciplinary team. 
• Develop an implementation roadmap in partnership with Quant and Trading to deliver incremental improvements in trading performance and long-term architectural innovation. 
• Lead design implementation efforts, contribute to team code reviews, and champion best practices around performance, logic, standard methodologies and maintainability issues to ensure code-level consistency and scalability. 

Qualifications

• Proven experience and expertise with FPGA development. 
• Advanced proficiency using HDLs, with an emphasis on SystemVerilog or VHDL. 
• Comfortable working in Python and/or C++ for developing tools, testbenches, and integrations. 
• Demonstrated understanding of computer architectures. 
• Enthusiasm for applying modern, agile design and testing practices. 

Nice to Have 

• Experience in financial markets or trading environments. 
• Knowledge of common networking protocols like TCP/UDP and multicast. 

CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.   

CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, and London. For more information, please visit www.chaosinc.com. 

Role Overview:

CHAOS is seeking a highly-skilled and motivated Senior Guidance Software Engineer to join our R&D team. You will get an opportunity to lead the design of our guidance software on a clean sheet airframe design. As a member of Engineering, you also have the opportunity to expand your skillset across our product families. 

Responsibilities:

• Implementation of guidance and navigation software within COTS software frameworks
• Support airframe design activities
• Support system integration of software on flight hardware
• Work full-time on-site in our office in Los Angeles (Hawthorne), California

Minimum Requirements:

• Minimum education: Bachelor’s or higher Degree in Computer Science, Computer Engineering, Aerospace Engineering, or related degree
• 10+ years of experience in professional, object-oriented software development
• Experience with design and implementation of guidance algorithms for UAS platforms using commercial autopilot frameworks like ArduPilot
• Practical understanding of flight dynamics of fixed wing and rotary wing platforms
• Solid understanding and extensive experience in software development on microcontroller architectures (STM32 or similar) and on Linux hosted on Nvidia Jetson, AMD/Xilinx SoC or Microblaze architectures
• Experience developing real-time embedded software to include hardware interfaces
• Experience with integration of vendor provided low-level drivers and firmware
• Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
• Ability to work with minimal supervision and collaborate on small teams
• U.S. Person status is required as this position will require the ability to access U.S.-only data system

Preferred Requirements: 

• Current or previous DoD security clearance 
• Part 107 remote pilot certification
• Experience with EO/IR sensor integration
• Experience with radar sensor integration
• Experience with firmware development using VHDL and embedded software development flow on AMD/Xilinx FPGAs
• Experience with git
• Experience with production-level SW development & deployment, including DevOps, DevSecOps, and/or Continuous Integration/Continuous Delivery (CI/CD) using modern FOSS/COTS toolsets
• Experience with full lifecycle SW development of high-TRL systems
• Experience with HW/SW I&T and V&V of high-TRL systems

Why CHAOS?

• Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
• Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
• Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
• Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
• Team Growth: 200 employees and counting across 5 global offices

The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.

#LI-onsite