About the team

The world is cutting the cord and streaming its TV online, a shift that has dramatically changed how advertisers target, reach and measure their preferred audiences in ways that broadcast TV and cable never could.

Roku Ads Manager is our answer to the growing demand in streaming advertising. Our self-serve platform just entered General Availability (GA) in September 2024 and has picked up major momentum. Our Ads Manager team is small, gritty, and focused on scaling the best streaming ad platform in the market. We move fast, pivot quickly, and work hard. We rally around decisions, challenge assumptions, and push the limits on what advertising can do for growth marketers, performance agencies, and any other business interested in making the big screen work for their brands’ objectives. 

The Roku Ads Manager team is looking for a Sales Development Representative to help us scale our platform.

About the role

TV ads were once reserved for large national brands. Roku believes that it’s better for streamers, brands, and our company that all businesses have a path to advertising in streaming. Roku Ads Manager is our answer to democratizing streaming advertising, creating a self-serve path for businesses of any size to get their brand on the big screen.

Roku Ads Manager is looking for a Sales Development Representative (SDR) to help lead demand generation and client growth for our self-serve streaming ad platform. This role will join two existing SDRs and will play a crucial role in attracting and onboarding new advertisers, ensuring their success on the platform, and driving revenue growth.

Sound like fun? 

For Chicago Only - The estimated annual salary for this position is between 52,000 and 75,000 annually.

Compensation packages are based on factors unique to each candidate, including but not limited to skill set, certifications, and specific geographical location.

This role is eligible for incentive compensation/commissions, health insurance, equity awards, life insurance, disability benefits, parental leave, wellness benefits, and paid time off.

What you’ll be doing

• Prospect and qualify inbound and outbound leads for Roku Ads Manager
• Educate potential advertisers on the benefits of streaming and our self-serve platform
• Collaborate with Account Executives to build and maintain a healthy sales pipeline
• Track and manage leads using CRM tools and outreach platforms
• Provide feedback to marketing and product teams to improve messaging and user experience
• Stay up to date on industry trends and Roku’s evolving ad solutions

We’re excited if you have

• 1–2 years of experience in a sales, business development, or customer-facing role
• A passion for advertising, media, or technology
• Excellent communication and interpersonal skills
• A self-starter mindset with strong organizational skills
• Experience with CRM tools like Salesforce or HubSpot (a plus)
• A collaborative spirit and a drive to learn and grow

#LI-LS1

#LI-Onsite

What You’ll Do

Lead cutting‑edge research on next‑generation AI system architectures. The role is responsible for end‑to‑end co‑design of AI workloads, system‑level modeling, hardware platforms, and high‑performance processors that leverage Samsung’s advanced memory technologies to eliminate capacity, bandwidth, and large‑scale communication bottlenecks.

Location: Daily onsite presence at our San Jose Headquarters in alignment with our Flexible Work policy

AI System Architecture Leadership

• Define system‑level architectures that solve memory‑capacity, bandwidth, and interconnect challenges for large AI workloads (e.g., large language models, recommendation systems).
• Build and maintain analytical and event‑driven simulation frameworks for compute‑memory‑network performance at rack scale.
• Conduct design‑space exploration and quantitative trade‑off studies (performance, power, cost) to guide architecture decisions.
• Partner with SAIT HQ teams to align modeling insights with real‑world AI system implementations.

RISC‑V CPU Architecture Leadership

• Architect high‑performance, out‑of‑order RISC‑V CPU cores that serve as host processors for AI computing systems.
• Drive IPC‑focused feature path‑finding; lead micro‑architecture research through performance‑model simulation and workload analysis.
• Produce detailed micro‑architecture specifications and guide cache/memory hierarchy design for optimal AI workload execution.

Research & Innovation Management

• Lead a multidisciplinary research team, set technical roadmaps, and ensure delivery of high‑impact publications.
• Present architectural insights and strategic recommendations to senior leadership and external partners.

What You Bring

• Education: Ph.D. in Computer Science, Electrical Engineering, or a related field.
• Experience: 10 + years in system‑level architecture research or large‑scale computing platform design, with a strong focus on AI workloads.
• Technical Expertise:
  • Performance modeling, event‑driven simulation, and quantitative analysis of compute‑memory‑interconnect systems.
  • Deep knowledge of modern CPU/accelerator architectures (RISC‑V, ARM, x86) and heterogeneous integration.
  • Proven ability to design rack‑scale AI system architectures that address memory, bandwidth, and interconnect constraints.
  • Proficiency with transaction‑level modeling (TLM) and event‑driven simulation for compute‑memory‑network co‑design.
  • Experience in large‑scale design‑space exploration and PPA (performance, power, area/cost) trade‑off analysis.
  • Expertise in architecture and micro‑architecture design of out‑of‑order CPUs.
  • Hands‑on experience with simulation tools and programming languages such as Python and C++.
• Communication Skills: Excellent written and verbal communication; proven ability to deliver technical presentations to senior stakeholders. 

Preferred Experience

• Proven track record of publishing high‑impact research papers.
• Experience influencing product roadmaps through architectural recommendations.
• Strong collaborative history with cross‑functional teams (hardware, software, memory technology). 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change

#LI-SF1

Principal, CPU Architecture & Performance Research Engineer

What You’ll Do

Architecture Research Lab is seeking Principal CPU Architecture & Performance Engineer to lead the definition, analysis, and optimization of next-generation CPU microarchitectures (RISC-V core). This role is focused on end-to-end performance: from architectural trade-offs and workload characterization to micro-architectural modeling, simulation, and silicon bring-up correlation.

You will work closely with architecture, design, compiler, and system teams to drive performance and efficiency across a broad set of real-world workloads

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42918

• Define and evaluate CPU micro-architectural features for future cores (frontend, execution engine, memory hierarchy, interconnect).
• Lead performance analysis using simulators, RTL.
• Help develop and validate performance models (cycle-accurate, trace-driven, statistical).
• Characterize workloads (SPEC, server, client, AI/ML, cloud, internal traces) and translate findings into architectural requirements.
• Identify performance bottlenecks and propose data-driven optimizations.
• Drive architecture-to-implementation alignment with design team.
• Collaborate with compiler, OS, and system architects on cross-stack performance issues.
• Mentor senior and staff engineers; provide technical leadership across projects.
• Work leading to patents and publication

What You Bring

• Master’s with 18+ years of experience in Computer Engineering, Computer Science, or related field.
•  or PhD with 15+ years of experience preferred.
• 10+ years of experience in CPU microarchitecture and/or performance engineering.
• Experience with RISC-V, ARM or X86 architectures.
• Strong understanding of:
• Out-of-order execution, branch prediction, pipelines, and speculation
• Cache coherence, memory systems, prefetching, and NUMA effects
• Hands-on experience with architectural simulators (like gem5).
• Strong programming skills in C/C++ and Python.
• Familiarity with compiler optimizations and hardware/software co-design.
• Familiarity with SIMD / Vectors / VME for AI inference workloads.
• Experience analyzing large performance datasets and traces.
• Proven ability (Tapeout / Patents /Publications) to influence architecture / micro architectural decisions through quantitative analysis.

Preferred Qualifications

• Background in power/performance/area (PPA) trade-off analysis.
• Experience with SIMD/Vectors.
• Experience with compiler optimizations and hardware/software co-design.
• Prior technical leadership at Senior Staff or Principal level. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design.

Our team works hands-on with cutting-edge accelerator hardware, experimental memory systems, and emerging domain-specific languages (DSLs). We build and optimize a Triton-based software stack that pushes the limits of performance, efficiency, and scalability for modern LLM workloads.

We are looking for a Senior AI Systems Engineer with deep experience in high performance Triton kernel development on modern accelerators. In this role, you will design, analyze, and optimize performance-critical kernels used in large scale LLM inference and training pipelines. You will work closely with hardware architects, compiler engineers, and ML researchers to identify performance bottlenecks, interpret profiling data, and co-design solutions that span software and hardware boundaries.

This role is ideal for engineers who enjoy working close to the hardware stack while still reasoning deeply about model level abstractions.

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Design, implement, and optimize high-performance Triton kernels for LLM workloads on existing accelerators.
• Analyze kernel performance using profiling tools; interpret metrics such as latency, throughput, occupancy, memory bandwidth, and compute utilization.
• Identify performance bottlenecks in kernel design (e.g., memory access patterns, synchronization, tiling strategies) and propose concrete optimizations.
• Work across the stack; from model architecture to kernel implementation—to ensure end-to-end performance efficiency.
• Collaborate with hardware and compiler teams on hardware–software co-design, providing feedback that influences future accelerator and DSL designs.
• Prototype and evaluate kernel optimizations using upcoming DSLs and experimental compiler flows.
• Contribute to the evolution of a Triton-based software stack used for cutting-edge research and production-grade experimentation.
• Document design decisions, performance trade-offs, and optimization strategies clearly for internal and external stakeholders.

What You Bring

• Bachelor’s with 5+ years, or Master’s with 3+ years, or PhD's with 0+ years of industry experience.
• Strong experience writing high-performance Triton kernels for GPUs or other accelerators.
• Solid understanding of LLM fundamentals, including attention mechanisms, transformer architectures, and inference/training workflows.
• Deep knowledge of accelerator hardware architecture, including:  Memory hierarchies (HBM, SRAM, caches).
• Proven ability to read and interpret profiling data and performance counters.
• Experience diagnosing and resolving performance bottlenecks in kernel-level code.
• Strong systems programming skills in Python and low-level performance-oriented programming paradigms.
• Experience with hardware–software co-design or compiler-assisted optimization.
• Familiarity with FlashAttention, fused kernels, MoE kernels, and different attention mechanisms.
• Experience working with emerging or experimental domain-specific languages (DSLs) for accelerator programming.
• Background in ML systems, compilers, or performance engineering.
• Prior experience working with different accelerator backends (including but not limited to CUDA).
• Opportunity to work on cutting-edge accelerator hardware and experimental software stacks.
• Direct impact on the performance and design of next-generation AI systems.
• A highly collaborative environment spanning hardware, systems, and ML research.
• Flexibility to publish, prototype, and influence future hardware and software directions.
• Ability to work effectively in cross-functional, research-oriented environments.
• Strong analytical and problem-solving skills.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-VL1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

We are looking for a Senior Engineer, Performance Architecture.  This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design.

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Model the architecture, performance, and power characteristics of Memory Centric Computing platforms
• Develop and optimize models to explore a large design space.
• Analyze various trade-offs within a design space, considering different architectural choices and workloads.
• Collaborate with architecture, design and software engineers to ensure that the PPA of modeled systems meet the requirements of our users
• Conduct research and development in emerging technologies and trends in AI/ML workloads and Memory Centric Computing architectures
• Communicate effectively with stakeholders, including users, partners, and management, to ensure that the systems are delivered on time and within budget

What You Bring

• BS in Computer/Electrical Engineering or Computer Science with 5+ years of working experiences in silicon development or MS in Computer/Electrical Engineering or Computer Science with 3+ years of relevant working experience or PhD and 0+ years of relevant working experience preferred.
• Strong background in computer architecture
• Experiences in developing and optimizing models for high-performance computing systems
• Strong analytical and problem-solving skills
• Excellent communication and interpersonal skills
• Ability to work independently and as part of a team
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-VL1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

We are looking for a Senior Engineer, RTL Memory Centric Computing.  This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design.

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Develop IP for memory centric computing systems using Verilog, System Verilog and HLS
• Optimize the IP for performance, power, and area by leveraging advanced design techniques such as pipelining, parallelism, and data compression.
• Collaborate with Verification engineers to design and develop test plans
• Make design decisions out of a large design trade-off space across performance, power, thermal, and cost.
• Troubleshoot and debug hardware issues and ensure the quality of the design through verification and validation.
• Stay up-to-date with the latest advancements in machine learning and hardware architecture and contribute to the development of new technologies.
• Communicate effectively with stakeholders, including users, partners, and management, to ensure that the systems are delivered on time and within budget
• Complete other responsibilities as assigned.

What You Bring

• Bachelor’s with 15+ years, or Master’s with 13+ years, or PhD's with 10+ years of industry experience.
• Strong background in microarchitecture and computer architecture
• 5+ years of experience in front-end design methodology involving RTL development for complex control and data path IPs
• Experience in designing Memory Controller, NOC, Interconnect IP
• Experience in Memory Centric computing IP and  SOC integration
• Experience in AI/ML workloads.
• Strong analytical and problem-solving skills
• Excellent communication and interpersonal skills
• Ability to work independently and as part of a team
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change

#LI-VL1

Staff, CPU Architecture & Performance Research Engineer

What You’ll Do

Architecture Research Lab  is looking for  Staff CPU Architecture & Performance Engineer to drive detailed performance analysis and architectural optimization for current and next-generation CPU (RISC-V) cores. This role focuses on deep ownership of performance-critical micro-architectural domains, workload analysis, and data-driven recommendations that influence core architecture decisions.

You will work closely with architects, design, compiler, and system teams to evaluate trade-offs, identify bottlenecks, and improve performance across real-world workloads

 Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42850

• Own performance analysis for one or more CPU microarchitectural domains (e.g., frontend, execution engine, memory subsystem).
• Build, extend, and validate architectural performance models and simulators.
• Perform CPI/IPC breakdowns and root-cause performance bottlenecks.
• Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models.
• Characterize workloads and benchmarks (SPEC, server, client, AI/ML, internal traces).
• Translate performance data into clear architectural recommendations.
• Work leading to patents and publication.

What You Bring

• Master’s in Computer Engineering, Computer Science or related filed with 8+ years of experience or PhD in Computer Engineering, Computer Science, or related field with 5+ years of experience.
• 5+ years of experience in CPU microarchitecture and/or performance engineering.
• Experience with RISC-V, ARM or X86 architectures.
• Strong understanding of:
• Out-of-order execution, branch prediction, pipelines, and speculation
• Cache coherence, memory systems, prefetching, and NUMA effects
• Hands-on experience with architectural simulators (like gem5).
• Strong programming skills in C/C++ and Python.
• Experience analyzing large performance datasets and traces.
• Familiarity with compiler optimizations and hardware/software co-design..
• Proven ability - prior tapeout experience.

Preferred Qualifications

• Background in power/performance/area (PPA) trade-off analysis.
• Experience / Familiarity with SIMD / Vectors / VME for AI inference workloads..
• Prior  leadership guiding junior engineers.
• Prior patent / publication experience. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Job Title: Staff Engineer, AI System Architect (Hardware)

What You’ll Do
The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung’s world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Senior Staff AI System Architect who will play a key role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung’s long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42917

• Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems.
  • Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale.
  • Analyze representative and emerging AI workloads (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power.
  • Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections.
  • Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices.
  • Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities.
  • Communicate architectural insights and recommendations through clear technical presentations and documentation.
  • Occasional domestic and international travel (<10%).

 What You Bring

• Ph.D. in Computer Science, Electrical Engineering, or a related field, with 5+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads.
  • Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation.
  • Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects.
  • Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems.
  • Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions.
  • Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation.
  • Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams.
  • A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges.  
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build.
• Understanding. You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 

#LI-SF1

Memory IO Lab is part of Samsung’s Memory Business Unit, the industry's all-time DRAM and NAND Flash leader both in technology as well as in volume. Memory IO’s vision is to provide memory interface technology solutions which can be adopted in DDR, LPDDR, GDDR, and more. We are an integral part of Samsung’s paramount R&D innovation engine. We work closely with cross-disciplinary development teams to bring feature innovation to product roadmaps.

Come and join the team that is providing the next generation IO tech solutions to support emerging machine learning applications, data analytics, and edge computing.

Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy

What You'll Do

• Hands on in analog circuit design, which includes circuit design, running simulations to confirm functionality and performance, and work with verification team to verify design. The mixed-signal designs will include but are not limited to the following: high-speed data converters, PLL, and SERDES.
• Guide layout floor-planning block and top level to optimize the overall performance; supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary.
• Ownership of circuit and system specifications.
• Simulate designs with state-of-the-art CAD tools.
• Document designs and simulation results.

What You Bring

• BS 10+ years experience, MS 8+years of experience, PhD 5+ years experience in Electrical Engineering, Computer Science preferred. 
• 5+ years of experience working with system on chip architecture, high-speed serial interfaces, analog and mixed-signal circuit designs using advanced CMOS technology nodes.
• Prior experience in design of any one of the standard high speed interfaces like DDR, LPDDR, , GDDR, HBM I/O interface.
• Needs to be an expert in providing and understanding layout requirements of high speed circuits.
• Knowledge of all facets of high speed I/O design but specifically should include DLL / PLL / FFE / CTLE / DFE, output drivers , ODT, Duty cycle correction (DCC), Training/calibration to improve timing, high speed power design and low power design.
• Experience working closely with device/process team to define transistor specs
• The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment.
• Ability to troubleshoot and analyze complex problems.
• Excellent communication (written and verbal) and interpersonal skills
• Experience in high frequency clock distribution design, implementation, and analysis.
• Deep understanding of PPA (performance, power, and area) trade-offs.
• Ability to handle EDA tools well, such as Cadence, MATLAB (Simulink), and EM tools
• Experience on silicon bring-up and automatic measurement using script
• Strong scripting and automation skills using Tcl/Perl. Knowledge of Python is a plus.
• Self-motivated problem-solver with an ability to work well in a team.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Join Samsung Semiconductor to guide the development and design evaluation of next‑generation semiconductor packages and memory devices. In this role as a Staff Engineer for Mechanical Simulation, you will partner with cross‑functional, multicultural teams to advance innovative packaging solutions, automate simulation workflows, and bridge the gap between numerical predictions and experimental validation.

Location:  Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy with 10-20% of domestic and international travel.

Reports to: Principal Engineer

What You’ll Do

• Perform advanced numerical modeling and simulation to evaluate and improve the performance and reliability of cutting‑edge semiconductor packages and memory devices.
• Provide mechanical and thermal design support throughout package‑ and system‑development stages—from concept and detailed modeling to qualification and reliability testing.
• Apply hands‑on expertise in mechanical and thermal modeling of micro‑electronic components, including interconnects, solder joints, BGAs, and advanced‑packaging architectures.
• Develop and maintain scripts for process automation (Python, MATLAB, or ANSYS APDL) to streamline pre‑processing, simulation, and post‑processing workflows for parametric and sensitivity studies.
• Leverage a solid understanding of semiconductor manufacturing, advanced‑packaging technologies, material properties, and associated design and reliability constraints.
• Design, execute, and interpret validation experiments that correlate and calibrate simulation models with empirical data.
• Contribute effectively both independently and as a member of cross‑functional, cross‑cultural, and globally distributed teams.

What You Bring

• Ph.D. in Mechanical Engineering, Materials Science, Physics, or a related field. (Equivalent combination of a Master’s degree and extensive professional experience also welcomed).
• 10+ years of hands‑on modeling and simulation experience in the high‑tech or semiconductor industry.
• Proven expertise with leading simulation tools such as ANSYS, Abaqus, HyperMesh, and their associated pre‑/post‑processing software.
• Proficiency in thermal‑analysis platforms Flotherm and Icepak, together with related utilities.
• Extensive experience in static and dynamic simulations, covering linear and nonlinear analyses that involve geometric and material non‑
• Deep knowledge of thermal analysis and cooling‑design strategies for advanced packaging solutions.
• In‑depth understanding of advanced semiconductor packaging, interconnect structures, and reliability‑modeling techniques.
• Strong technical‑writing skills, capable of producing clear, comprehensive documentation and communicating complex concepts to both technical and non‑technical audiences.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-MD1

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

We are looking for a Senior Engineer, RTL Memory Centric Computing.  This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design.

Location:  Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Develop IP for memory centric computing systems using Verilog, System Verilog and HLS
• Optimize the IP for performance, power, and area by leveraging advanced design techniques such as pipelining, parallelism, and data compression.
• Collaborate with Verification engineers to design and develop test plans
• Make design decisions out of a large design trade-off space across performance, power, thermal, and cost.
• Troubleshoot and debug hardware issues and ensure the quality of the design through verification and validation.
• Stay up-to-date with the latest advancements in machine learning and hardware architecture and contribute to the development of new technologies.
• Communicate effectively with stakeholders, including users, partners, and management, to ensure that the systems are delivered on time and within budget
• Complete other responsibilities as assigned.

What You Bring

• Bachelor’s with 10+ years, or Master’s with 8+ years, or PhD's with 5+ years of industry experience.
• Strong background in microarchitecture and computer architecture
• 5+ years of experience in front-end design methodology involving RTL development for complex control and data path IPs
• Experience in designing Memory Controller, NOC, Interconnect IP
• Experience in Memory Centric computing IP and  SOC integration
• Experience in AI/ML workloads.
• Strong analytical and problem-solving skills
• Excellent communication and interpersonal skills
• Ability to work independently and as part of a team
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change

#LI-VL1

What You’ll Do

We are looking for a passionate and experienced Staff Engineer, SRAM Circuit Design  to lead the development of next-generation SRAM solutions. In this position, you will drive end-to-end design of high-performance, low-power memory circuits used in cutting-edge semiconductor products. Your work will directly influence the power, performance, and area (PPA) efficiency of future computing, mobile, and AI platforms.

This role combines deep technical expertise with strategic team leadership, offering the opportunity to innovate at the forefront of semiconductor design.

• Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders and control circuits for advanced process nodes (e.g., 2nm, 3nm and 5nm).
• Optimize SRAM designs for performance, power and area (PPA) and yield.
• Develop custom layouts and perform physical design verifications (e.g., DRC, LVS).
• Evaluate trade-offs between speed, power, and area to meet design targets.
• Develop and improve SRAM design methodologies, including automation scripts for design, simulation, and verification.
• Work with product and test engineers to develop test plans and support silicon bring-up.
• Mentor Junior engineers, providing guidance on SRAM design techniques and best practices.
• Perform extensive circuit simulations using tools like HSPICE, finesim or cadence Spectre to validate SRAM functionality and performance.
• Contribute to patents, technical papers, or industry conferences to advance SRAM technology.

What You Bring

• Bachelor's degree in electrical engineering with 10+ years of industry experience or master's degree in electrical engineering with 8+ years of experience strongly preferred. 
•  Prior experience in SRAM or memory circuit design, with a proven track record of delivering SRAM designs in advanced process nodes.
• Strong understanding of semiconductor devices physics and process technology (FinFET, GAA, SOI, etc.).
• Expertise in SRAM architecture, including bitcells, sense amplifiers, write drivers, and read/write control paths.
• Familiarity with timing analysis, power analysis, and design for manufacturability (DFM).
• Proficiency in circuit simulation, variation analysis, and design tools such as Spectre, HSPICE, Cadence Virtuoso, etc.
• Knowledge of scripting languages (e.g., Python, Perl, TCL) for automation of design tasks.
• Strong cross-functional collaboration and communication skills for working with design, layout, verification, and technology development teams.
• Experience with advanced technology nodes (e.g., 5nm, 3nm, or beyond).
• Knowledge of SRAM compiler development and experience with low-power SRAM design techniques (e.g., power gating, voltage scaling).
• Background in silicon debug and root-cause analysis.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change. 

#LI-SF1

What You’ll Do

We are looking for a passionate and experienced Staff Engineer, SRAM Layout to lead the development of next-generation SRAM solutions.

• Lead the development and execution of full-custom SRAM memory layout and sign-off verification flows (including compiler automation where applicable).
• Collaborate closely with circuit designers to translate schematics into efficient, high-performance physical layouts, own floor planning, placement, routing, and tape-out.
• Design and optimize SRAM layouts at the cell, array, and peripheral levels for area, speed, power, yield, and manufacturability.
• Perform and close all physical verification; DRC, LVS, ERC, antenna checks, custom memory rules, RC extraction, parasitic analysis, and signal integrity verification.
• Debug and resolve layout issues efficiently, including process-specific challenges in advanced nodes.
• Lead layout reviews, mentor junior engineers, and drive best practices, optimization techniques, design-rule compliance, and knowledge sharing.
• Develop automation scripts (Perl, Tcl, SKILL, etc.) to improve productivity.
• Address reliability concerns such as EM/IR drop, soft errors, and process variability. 
• Work cross-functionally with circuit, architecture, verification, and foundry/process teams to ensure first-pass silicon success and support product integration

What You Bring

• Bachelor's degree with 10+ years of experience in custom SRAM, memory compiler and IC physical layout design or master's degree 8+ years of experience strongly preferred. 
• 3 year’s experience in leadership of management role preferred.
• Extensive experience in SRAM layout design in advanced process nodes (e.g., 3nm, 2nm, or below).
• Demonstrated ability to lead, mentor, and manage a team of layout engineers. 
• Strong project management skills to handle complex schedules and cross-functional collaboration. 
• Strong proficiency with industry-standard EDA tools: 
• Candence Virtuoso (or Custom Compiler/IC Compiler) for custom/analog layout. 
• Physical verification tools for DRC/LVS/ERC flows. 
• Perform and close all physical verification; DRC, LVS, ERC, antenna checks, custom memory rules, RC extraction, parasitic analysis, and signal integrity verification. 
• Experience with RC extraction, parasitic reduction, and memory-specific verification. 
• Scripting/automation skills (Perl, Tcl, SKILL, etc.) are highly valued. 
• Proven ability to drive layout quality, constraints, and closure while collaborating in global, cross -functional teams. 
• Prior work on high-speed, low-power SRAM in leading-edge nodes preferred. 
• Mentoring or technical leadership experience preferred. 
• Understanding of SRAM architecture, timing, power analysis, and yield optimization preferred. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change

#LI-SF1

What You’ll Do

As the Director of Product Marketing for North America, you will be the strategic lead for Samsung’s most advanced memory solutions in the region. You will manage a high-performing team to drive the commercial success of High Bandwidth Memory (HBM) and Graphics Memory, acting as the critical link between North American market requirements and global product roadmaps.

This role sits at the intersection of AI infrastructure, hyperscale data centers, and next-generation graphics, shaping how cutting-edge memory technologies power the future of computing.

• Team Leadership: Build, mentor, and scale a high-impact North America product marketing team, fostering a culture of accountability, innovation, and continuous growth.
• Roadmap Influence: Represent the voice of the North American customer to global engineering and product teams; translate market signals, customer requirements, and competitive insights into clear, actionable inputs for product roadmap decisions.
• Regional Strategy: Define and execute the North American strategy across AI/ML, cloud, and gaming segments—ensuring alignment with global priorities while maximizing regional growth opportunities.
• Market Intelligence: Develop robust TAM forecasts, monitor Silicon Valley and broader industry trends, and deliver actionable competitive analysis to inform strategic decisions.

Sales Enablement & Business Development

• Design Win Leadership: Partner with Sales, FAEs, and engineering teams to identify opportunities, guide design-in cycles, and secure strategic design wins with key North American customers.
• Customer & Field Enablement: Lead the creation of compelling, technically credible marketing content and deliver high-impact training to sales teams and Tier-1 customers.
• Thought Leadership: Act as a visible industry leader and evangelist, representing the company at executive briefings, industry events, and key customer engagements.

 Execution & Cross-Functional Alignment

• Go-to-Market Excellence: Develop and execute regional GTM strategies, including product positioning, pricing frameworks, and launch plans tailored to the North American ecosystem.
• Global Collaboration: Operate effectively across regions and time zones - particularly with headquarters in Korea - to align regional demand with global supply, ensuring seamless execution and clear communication between stakeholders.

What You Bring

• Education: Bachelor’s degree required (Electrical Engineering or Computer Science preferred); MBA highly preferred.
• Experience: 15+ years in product or strategic marketing within semiconductors, graphics, gaming, or data center infrastructure.
• Leadership: proven success leading high-performing teams in fast-paced, technically complex environments.
• Domain Expertise: deep understanding of HBM, GDDR, and memory architectures, along with strong knowledge of AI hardware, GPUs, and hyperscale data center trends.
• Strategic Impact: Demonstrated ability to influence global product direction through data-driven insights and well-structured business cases.
• Analytical Strength: advanced proficiency in Excel and PowerPoint, with the ability to distill complex technical and financial data into executive-level narratives.
• Travel: willingness to travel domestically (~20%) and periodically internationally.

Additional Preferred Qualifications

•  Cross-Cultural Fluency: Experience working with Korea-based teams or within a Korean corporate environment.
• Language Skills: Familiarity with Korean language is a plus
• Cultural Agility: Demonstrated ability to navigate cross-cultural communication styles and decision-making processes in a global organization.

 The Ideal Candidate

• Strategic Operator: combines big-picture thinking with disciplined execution; anticipates risks and acts decisively.
• Curious Technologist: continuously learning and staying ahead of trends in AI, accelerated computing, and emerging memory architectures.
• Accountable Leader: takes full ownership of outcomes, operates with urgency, and delivers results without ego.
• Collaborative Influencer: builds trust across global teams, communicates with clarity, and elevates both team performance and organizational alignment.

 #LI-KS1

Job Title: Principal engineer, AI Serving Framework Architect (Software)

What You’ll Do    

The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung’s world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Principal AI System Architect who will play a key role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung’s long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42853

• As a Tech Lead, leading research teams in Korea and proposing technical direction
• Research on dynamic scheduling methodologies for maximizing AI inference performance in multi-rack scale memory-centric systems, comprised of heterogeneous compute-capable memory and hierarchical memory
• Investigating methods to accelerate search operations in RAG’s vector DB and AI Agent’s knowledge-graph by leveraging compute-capable memory
• Studying strategies for optimally placing KVCache and a vector DB in hierarchical memory to minimize frequent SSD accesses and reduce IO stalls
• Proposing SW design for implementing the derived optimization algorithms on open-source platforms such as vLLM

What You Bring

• PhD in Computer Science or a related field with 10+ years of experience in AI Serving Framework for large-scale computing, with focusing on the AI workloads. 
• Led a project to build and optimize a Large Language Model (LLM) Inference Software Stack on a multi-rack scale system to deliver AI Inference services to over 100,000 users. 
• Extensive experience in designing AI Inference Software Stacks for heterogeneous devices.In-depth understanding of the internal architecture and operation mechanisms of inference engines such as vLLM. 
• Proficiency in AI Inference System Profiling and optimization. 
• Knowledge and practical experience with future AI workloads, including reasoning models, multi-modal solutions, AI agents, and world models. 
• Strong understanding of compute, memory, and networking bottlenecks in AI systems. 
• Required skillsets: PyTorch, Python, and C++ 
• A collaborative mindset, curiosity, and resilience in solving complex challenges. 
• Excellent verbal, presentation, and written communication skills. 
• (Nice to have) Native or fluent Korean speakers are preferred. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build. Understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change 

#LI-SF1

Job Title: Principal Engineer, AI System Architect (Hardware)

 What You’ll Do
The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung’s world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung’s long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42852

• • Technically Lead the architecture team with strong  direction, shaping system‑architecture strategy and advancing key innovations
  • Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems.
• Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale. 
• Analyze representative and emerging AI workloads (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power.  
• Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections. 
• Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices. 
• Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities.  
• Communicate architectural insights and recommendations through clear technical presentations and documentation.   
• Occasional domestic and international travel (<10%).

 What You Bring

• Ph.D. in Computer Science, Electrical Engineering, or a related field preferred,  with 15+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads 
• Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation. 
• Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects.
• Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems.
• Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions.
• Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation. 
• Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams.
• A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Job Title: Principal Engineer, AI System Architect (Hardware)

The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung’s world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung’s long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42852

What You’ll Do

• Technically Lead the architecture team with strong  direction, shaping system‑architecture strategy and advancing key innovations
• Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems.
• Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale. 
• Analyze representative and emerging system-level architectural research (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power.  
• Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections. 
• Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices. 
• Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities.  
• Communicate architectural insights and recommendations through clear technical presentations and documentation.   
• Occasional domestic and international travel (<10%).

 What You Bring

• Ph.D. in Computer Science, Electrical Engineering, or a related field preferred,  with 15+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads 
• Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation. 
• Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects.
• Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems.
• Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions.
• Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation. 
• Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams.
• A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Samsung Semiconductor Inc. (SSI) is advancing the world’s technology. As a leader in Memory, System, LSI and LCD technologies, our US teams contribute to breakthroughs in 5G, SOC, memory and display. With our global perspective and diversity of thought, we proudly serve our customers around the world. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams.

Advanced Circuit and Systems (ACAS) is looking for a highly skilled engineer that has strong background and hands-on experience on RFIC design. The candidate will be developing next-generation RF transceivers and mixed-signal circuits for

What You’ll Do

• Design low-power and low-voltage RF and Analog circuits using advanced deep-submicron CMOS technologies.
• Lead efforts to perform chain and chip level design verification and production support tasks.
• Work closely with digital and software developers to develop an implementation that meets
• system requirements.
• Research in advanced wireless techniques for highly integrated RFICs

What You Bring

• Bachelor’s with 20+ years of experience or  Master's with 18+ years of experiences or PhD with 15+ years of experience in a related field.
• Hands-on experience in designing various RF/Analog integrated circuits, such as LNA, Mixer, RF VGAs, PA, VCO, etc., in deep sub-micron CMOS technologies.
• Ability to comprehend RF transceiver system level requirements and translate into circuit level specifications. Excellent problem solving and analytical skills are essential.
• Technical leadership, mentoring, and post-silicon validation expertise are essential.
• Specialized knowledge in high-speed I/Os (SerDes, DDR) or data converters is a bonus.
• Strong knowledge on IC design CAD tools such as Spectre, SpectreRF, Spice, Matlab, and/or ADS.
• Thorough understanding of the physical layout requirement and ability to perform the critical layouts.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.

#LI-VL1

Principal Engineer, SOC Design

What You’ll Do

The DRAM Development Lab (DDL) is part of Samsung’s Memory Business Unit, the industry's technology and volume leader in DRAM, HBM and NAND Flash.  DDL’s vision is to solve key problems of Cloud & Data center by developing the new technology for memory and storage. The SOC team within DDL focuses on the development of silicon solutions. We are an integral part of Samsung’s strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps.

Come join the team that is creating new computing system architectures needed to support emerging machine learning applications, data analytics and edge computing. You’ll focus on enhancement of memory and storage capability by developing prototype and production controllers.

Job ID:  42866

Location: Daily onsite presence at our San Jose or Folsom office in alignment with our Flexible Work policy

• Participate in architectural definitions and responsible for micro architecture of subsystem and/or chip level.
• Responsible for top integration, logic design and RTL implementation along with quality check (Assertion, Lint, CDC, and STA).
• Reviews 3^rd party IPs including ARM cores, DDR controller, and UCIe PHY 
• Responsible for integrating the third part IPs and sub system at top level
• Work closely with architects and verification engineers to ensure sound design at SoC level.
• Work with physical designers on timing constraints, synthesis, DFT insertion, and static timing analysis

What You Bring

• Bachelors in Electrical, Computer Science or related with 20+ years of experience or Masters in Electrical, Computer Science or related Science with 18+ years of Industry Experience or PhD in Electrical, Computer Science or related Science with 15+ years of Industry experience preferred.
• Highly motivated with good verbal and written communication skills.
• Hands on knowledge & experience in ASIC design flow from design to tape out.
• Experience & Good knowledge in ATE vector generation, testing and silicon bring up.
• Experience in the commercial IPs such as UCIe, CPU, Ethernet, and DDR interfaces.
• Good understanding of PPA (performance, power, and area) trade-offs.
• Experience in SoC level synthesis, timing analysis, lint check, CDC checks.
• Experience in interfacing 3^rd party service companies for DFT/PI/PD.
• Good knowledge and experience in AMBA bus fabric, ARM cores.
• Self-motivated problem-solver with an ability to work well in a team.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Senior, CPU Architecture & Performance Research Engineer

What You’ll Do

Architecture Research Lab is  seeking Senior CPU Architecture & Performance Engineer to contribute to performance analysis and microarchitectural optimization of current and next-generation CPU (RISC-V) cores. This role emphasizes hands-on analysis, modeling, and close collaboration with architects and design teams to improve performance across real-world workloads.

You will focus on executing well-defined performance studies, identifying bottlenecks, and helping translate architectural ideas into measurable performance gains

 Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42851

• Perform performance analysis for CPU microarchitectural features under guidance from Staff and Principal engineers.
• Run architectural simulations and analyze results (IPC, CPI stacks, latency and throughput metrics).
• Identify performance bottlenecks in frontend, execution engine, or memory subsystems.
• Assist in evaluating design trade-offs using trace-driven or cycle-accurate models.
• Characterize workloads and benchmarks (SPEC, server, client, internal traces).
• Develop scripts and tools to automate performance analysis.
• Work leading to patents and publication.

What You Bring

• Master’s, or PhD in Computer Engineering, Computer Science, or related field.
• 2+ years of experience in CPU microarchitecture and/or performance engineering.
• Strong understanding of:
• Out-of-order execution, branch prediction, pipelines, and speculation
• Cache coherence, memory systems, prefetching, and NUMA effects
• Hands-on experience with architectural simulators (like gem5).
• Strong programming skills in C/C++ and Python.
• Experience analyzing large performance datasets and traces.
• Familiarity with compiler optimizations and hardware/software co-design.

Preferred Qualifications

• Experience with RISC-V, ARM or X86 architectures.
• Background in power/performance/area (PPA) trade-off analysis.
• Familiarity with SIMD / Vectors / VME for AI inference workloads.
• Prior tapeout / patent / publication experience. 
• You’re inclusive, adapting your style to the situation and diverse global norms of our people. 
• You approach challenges with curiosity and resilience, seeking data to help build understanding. 
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. 
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Prezzee is a global leader in digital gifting and payments, having sold over 140 million gift cards through partnerships with more than 1,500 brands and serving over 6 million customers worldwide. Our mission is to change lives through the power of giving — leveraging borderless payment technology and innovative digital solutions to help people connect and create memorable moments that truly matter.

We’re looking for a Head of Marketing, US to lead Prezzee’s North America marketing. Reporting to the Chief Marketing Officer based in Australia, this is a strategic and hands-on role where you’ll lead the regional marketing strategy while also executing campaigns, content, partnerships, and product go-to-market initiatives across the US and Canada. You’ll work closely with Sales, Partnerships, Product, and Global Marketing to drive growth.

This position is based in our New York City, Chelsea office  or San Jose, CA office, with 3 in-office days per week.

 The Role

• Lead and present the annual North America marketing strategy, covering US B2B and B2C and Canada B2C, aligned with global objectives and marketing strategy
• Develop and execute B2B demand generation programs to support pipeline growth and sales targets
• Lead B2C full-funnel campaigns, from awareness through conversion, tailored to local market insights
  Act as the strategic marketing partner to the US Sales team, ensuring alignment with pipeline priorities and ICPs
• Plan and execute partner marketing campaigns, managing approvals, execution, and post-campaign analysis
• Own regional campaign and content execution across paid, owned, and earned channels
• Build and maintain B2B sales enablement materials (case studies, pitch decks, one-pagers, email sequences)
• Manage product go-to-market plans in collaboration with global marketing and product teams
• Manage regional agencies and contractors to ensure delivery against objectives, budgets, and timelines
• Monitor business, strategy and campaign performance and deliver reporting, insights and recommendations to optimise results

About You

• 8-10 years experience marketing, campaign management, or growth roles
• Proven track record across both B2B and B2C marketing, including lead generation, acquisition, and retention campaigns
• Comfortable operating at both strategic and hands-on executional levels, from campaign planning to implementation
• Strong communicator and presenter, able to clearly articulate ideas and results to internal teams, senior stakeholders, and external partners
• Experienced collaborating closely with Sales, Product, and Partner teams to align marketing initiatives with business goals
• Commercial acumen with proven understanding of business impact, ROI, and marketing effectiveness, linking campaigns to measurable outcomes
• Able to analyze insights and translate them into actionable strategies to optimize performance
• Skilled in managing external agencies and cross-functional internal and external stakeholders, ensuring alignment and delivery
• Thrives in fast-paced, evolving environments, managing competing priorities with agility
• Proficient with CMS platforms and Microsoft Word, PowerPoint, and Excel
  
  

Why Join Prezzee?

• A global business with strong momentum in North America
• High-impact role shaping marketing across North America
  Collaborative culture with close connection to global teams
• Opportunity to work across B2B, B2C, partnerships, and product GTM
  
  

Benefits & Perks:

• Competitive compensation
• Health, dental, vision, 401k matching
• Prezzeeversary Leave – Extra day of annual leave for each year you’re with us.
• BirthYay Leave – Celebrate you with a paid day off during your birthday month.
• ClassPass Membership – Fully covered monthly credits for fitness, wellness, and beauty.
• Office Allowance – One-time payment to upgrade your office setup.
• Flexible Work Perks – Flex your hours, take Culture Swap Days, and opportunity to work from anywhere for 30 days a year.
• Prezzee Staff Discounts – Exclusive deals on Prezzee gift cards – just for being part of the team.
• Wellbeing Support – Access to mental, social, financial, and physical wellbeing support via Telus.
• Learning & Development – Grow your career with LinkedIn Learning, job shadowing, industry programs, and our Lunch & Learn sessions.
• Employee Resource Groups – Be an advocate or ally and foster belonging through groups like EmpowHer and Pride.
• Parental Leave – 12 weeks for primary carers and 4 weeks for secondary carers

Prezzee has been recognised for the third consecutive year as a Computerworld Best Places to Work in IT, and as a Great Place to Work® 2026 across all three of our three regions. We value diversity, collaboration, and innovation in everything we do. Join a global team united by the core values: Give openness, Give greatness, Give magic, Give ingenuity and Give damn.

Prezzee is an Equal Opportunity employer. We believe that diversity is the key to building the best products for our customers, team culture and growing our global business. Our diversity mission is for our people to be their most authentic selves, to inspire, innovate and celebrate within a culture of belonging. We do not discriminate based on race, religion, national origin, gender identity or expression, sexual orientation, age, or marital, veteran, or disability status.

We are looking for people to help create human connections, make magic and shape the future of gifting so even if you don’t think you quite meet all of the skills listed or tick all the boxes, we’d still love to hear from you! Please let us know if you require any adjustments as part of the application and recruitment process, We also encourage you to let us know of your pronouns at any point of the process.

This position can be based in our New York City, Mid-Town office or our St Jose office. Base salary ranges between $ $170,000 to $190,000 USD. Our salary range is based on the industry benchmark for position, location, function and level of individual experience. The total compensation package for this position includes STI and benefits.

Prezzee is a global leader in digital gifting and payments, having sold over 140 million gift cards through partnerships with more than 1,500 brands and serving over 6 million customers worldwide. Our mission is to change lives through the power of giving — leveraging borderless payment technology and innovative digital solutions to help people connect and create memorable moments that truly matter.

We’re looking for a Head of Marketing, US to lead Prezzee’s North America marketing. Reporting to the Chief Marketing Officer based in Australia, this is a strategic and hands-on role where you’ll lead the regional marketing strategy while also executing campaigns, content, partnerships, and product go-to-market initiatives across the US and Canada. You’ll work closely with Sales, Partnerships, Product, and Global Marketing to drive growth.

This position is based in our New York City, Chelsea office  or San Jose, CA office, with 3 in-office days per week.

 The Role

• Lead and present the annual North America marketing strategy, covering US B2B and B2C and Canada B2C, aligned with global objectives and marketing strategy
• Develop and execute B2B demand generation programs to support pipeline growth and sales targets
• Lead B2C full-funnel campaigns, from awareness through conversion, tailored to local market insights
  Act as the strategic marketing partner to the US Sales team, ensuring alignment with pipeline priorities and ICPs
• Plan and execute partner marketing campaigns, managing approvals, execution, and post-campaign analysis
• Own regional campaign and content execution across paid, owned, and earned channels
• Build and maintain B2B sales enablement materials (case studies, pitch decks, one-pagers, email sequences)
• Manage product go-to-market plans in collaboration with global marketing and product teams
• Manage regional agencies and contractors to ensure delivery against objectives, budgets, and timelines
• Monitor business, strategy and campaign performance and deliver reporting, insights and recommendations to optimise results

About You

• 8-10 years experience marketing, campaign management, or growth roles
• Proven track record across both B2B and B2C marketing, including lead generation, acquisition, and retention campaigns
• Comfortable operating at both strategic and hands-on executional levels, from campaign planning to implementation
• Strong communicator and presenter, able to clearly articulate ideas and results to internal teams, senior stakeholders, and external partners
• Experienced collaborating closely with Sales, Product, and Partner teams to align marketing initiatives with business goals
• Commercial acumen with proven understanding of business impact, ROI, and marketing effectiveness, linking campaigns to measurable outcomes
• Able to analyze insights and translate them into actionable strategies to optimize performance
• Skilled in managing external agencies and cross-functional internal and external stakeholders, ensuring alignment and delivery
• Thrives in fast-paced, evolving environments, managing competing priorities with agility
• Proficient with CMS platforms and Microsoft Word, PowerPoint, and Excel
  
  

Why Join Prezzee?

• A global business with strong momentum in North America
• High-impact role shaping marketing across North America
  Collaborative culture with close connection to global teams
• Opportunity to work across B2B, B2C, partnerships, and product GTM
  
  

Benefits & Perks:

• Competitive compensation
• Health, dental, vision, 401k matching
• Prezzeeversary Leave – Extra day of annual leave for each year you’re with us.
• BirthYay Leave – Celebrate you with a paid day off during your birthday month.
• ClassPass Membership – Fully covered monthly credits for fitness, wellness, and beauty.
• Office Allowance – One-time payment to upgrade your office setup.
• Flexible Work Perks – Flex your hours, take Culture Swap Days, and opportunity to work from anywhere for 30 days a year.
• Prezzee Staff Discounts – Exclusive deals on Prezzee gift cards – just for being part of the team.
• Wellbeing Support – Access to mental, social, financial, and physical wellbeing support via Telus.
• Learning & Development – Grow your career with LinkedIn Learning, job shadowing, industry programs, and our Lunch & Learn sessions.
• Employee Resource Groups – Be an advocate or ally and foster belonging through groups like EmpowHer and Pride.
• Parental Leave – 12 weeks for primary carers and 4 weeks for secondary carers

Prezzee has been recognised for the third consecutive year as a Computerworld Best Places to Work in IT, and as a Great Place to Work® 2026 across all three of our three regions. We value diversity, collaboration, and innovation in everything we do. Join a global team united by the core values: Give openness, Give greatness, Give magic, Give ingenuity and Give damn.

Prezzee is an Equal Opportunity employer. We believe that diversity is the key to building the best products for our customers, team culture and growing our global business. Our diversity mission is for our people to be their most authentic selves, to inspire, innovate and celebrate within a culture of belonging. We do not discriminate based on race, religion, national origin, gender identity or expression, sexual orientation, age, or marital, veteran, or disability status.

We are looking for people to help create human connections, make magic and shape the future of gifting so even if you don’t think you quite meet all of the skills listed or tick all the boxes, we’d still love to hear from you! Please let us know if you require any adjustments as part of the application and recruitment process, We also encourage you to let us know of your pronouns at any point of the process.

This position can be based in our New York City, Mid-Town office or our St Jose office. Base salary ranges between $ $170,000 to $190,000 USD. Our salary range is based on the industry benchmark for position, location, function and level of individual experience. The total compensation package for this position includes STI and benefits.

About the Role

We are looking for a creative and detail-oriented Senior UI/UX Marketing Campaign Web Designer to join our Web Design Studio team. In this role, you will design engaging digital experiences that support global marketing campaigns across web, social media, email, and multimedia channels. You will collaborate closely with designers, marketing teams, and stakeholders to deliver visually compelling assets while maintaining brand consistency and leveraging modern design tools, including AI-powered creative technologies. You will also provide direction, feedback, and approvals to external partners, including contractors, consultants, and creative agencies, ensuring high-quality and consistent execution across all externally produced design assets.

What You’ll Do

• Design visually engaging web pages, campaign assets, and digital marketing materials that support global marketing initiatives.

• Create social media graphics, email templates, animations, and multimedia content aligned with Veeam’s brand standards.

• Collaborate with designers, marketing teams, and stakeholders to translate campaign objectives into impactful visual designs.

• Develop reusable templates and design assets that improve efficiency and ensure consistency across marketing channels.

• Leverage AI-powered design tools and generative technologies to streamline workflows and enhance creative output.

• Communicate design concepts, decisions, and rationale clearly to stakeholders and cross-functional partners.

• Manage design projects from concept to final delivery while ensuring timelines, quality standards, and campaign goals are met.

• Review and approve design assets produced by third-party vendors, ensuring alignment with brand and campaign standards.

• Provide clear design direction, guidelines, and feedback to external partners to ensure consistent, high-quality deliverables.

• Mentor and onboard external designers and contractors, supporting their integration into workflows, tools, and brand expectations.

• Act as the main point of contact for design collaboration with external agencies and vendors.

Technologies You’ll Work With

• Figma and other digital design platforms

• AI-powered creative tools and generative image/video platforms

• Animation tools such as After Effects or similar software

• Project management tools such as Asana, Trello, or Jira

• Basic web technologies such as HTML and CSS

What You’ll Bring

• 5+ years of experience in web design, digital design, or a related creative field

• Strong portfolio demonstrating digital marketing, campaign, or web design work

• Proficiency with Figma and modern digital design tools

• Experience using AI-powered creative tools for image generation, design workflows, or multimedia production

• Ability to communicate design ideas clearly to both creative and non-technical stakeholders

• Knowledge of digital marketing design principles and brand consistency across multiple channels

• Experience working with project management methodologies such as Agile or Scrum

• Proven experience operating at a senior level, including providing direction, feedback, and quality control to external design partners (agencies, contractors), as well as mentoring designers.

Bonus Skills

• Experience with animation tools such as After Effects or similar software

• Experience with AI-based image or video generation platforms

• Basic knowledge of HTML and CSS

• Experience designing and building email marketing campaigns

• Experience collaborating with global marketing teams or creative agencies

• Experience working with and managing deliverables from external agencies or other designers

What You’ll Get

• Two weeks of paid vacation, 12 statutory holidays, plus 4 extra global VeeaMe Days for self-care and 24 paid volunteer hours annually through Veeam Cares

• Paid parental leave: 8 days for fathers, 122 days for birthing parents, 92 days for adoptive parents

• Medical, dental, and vision coverage fully funded through INS Premium for employees and dependents

• Mental health support, therapy sessions, and virtual care via our Employee Assistance Program

• Retirement and social security contributions through Costa Rica’s statutory programs

• Life insurance equal to 24x monthly salary, plus disability and funeral coverage

• Daily cafeteria subsidy

• Fertility, adoption, and surrogacy support, plus 24 paid volunteer hours through Veeam Cares

• Opportunities to learn and grow through on-demand libraries (LinkedIn Learning, O’Reilly), mentoring, workshops, and learning events like our annual Global Day of Learning

Please note: The position is based in San Jose, Costa Rica. If the applicant is permanently located outside of Costa Rica, Veeam reserves the right to decline the application. All applications must be submitted in English.

#LI-FT1
#LI-REMOTE

About The Team 

Noah Medical is recruiting for a Product Support Engineer to facilitate operational and service engineering support of Noah medical products and digital platforms. The Product Support Engineer serves as a primary liaison between Noah’s internal technical groups (Engineering, Quality, Manufacturing) and the various internal and external departments supporting Service (Field and Customer Service, Clinical Sales, and Marketing). 

The role should expect to travel within the United States up to 25% of the time. This travel may include customer visits, managing escalations, team meetings, attending conferences, or other activities to support the business. 

 A Day In the Life of a Product Support Engineer 

• Provide real-time troubleshooting support for escalations from internal customers (Field Service, Sales & Marketing) 

• Serve as a primary technical liaison between Noah Medical and commercial partners, distributors, and key customer accounts, building strong relationships and driving customer satisfaction and retention 

• Apply strong problem solving skills to complex product and process challenges; lead and collaborate cross-functionally including with commercial teams and distribution partners to drive resolutions that minimize customer impact 

• Drive complex failure investigations, data collection and analysis, and collaborate closely with the engineering team to identify product design, service, and quality improvement opportunities. 

• Develop & maintain service procedures, service bulletins, risk assessment documents, training materials, knowledge base articles. 

• Develop validation protocols and reports for internal service processes  

• Develop, manage, and drive continuous improvement in field tooling (hardware, software, and infrastructure tools) 

• Provide technical support for Quality and Post-Market activities including CAPAs, field actions, and complaint investigations, ensuring commercial impact is assessed and communicated 

• Ensure customer feedback is documented, analyzed, and used to drive improvements in service delivery. 

 About You 

• Bachelor’s degree in Engineering (Electrical, Electronics, Mechanical, or Fluidics), and/or at least 3 years of relevant experience.  

• Relevant clinical or bronchoscopy engineering experience including, but not limited to, understanding of basic pulmonary anatomy and physiology 

• Relevant Experience with system/electrical troubleshooting, detail-oriented and willing to find the root causes of issues with good engineering practice 

• Excellent oral (including group presentations) and written communication skills, as well as solid organizational and time management abilities 

• Self-motivated and proactive, with a passion for quality and continuous improvement 

• Live in the assigned geography 

• Willing to travel and be hands-on in the field to service the product whenever necessary. 

• Must be fiscally responsible, able to make own travel arrangements, and turn in expense reports on a weekly basis. 

• Excellent computer and technology skills with regards to software applications, (Excel, Word, Outlook, Power Point) ERP databases, and technology innovation. 

• Must have a valid driver’s license.

#LI-Hybrid

Principal Product Manager – Smart Cable Modules 

Astera Labs is at the center of the AI infrastructure revolution, and our Smart Cable Modules are critical to enabling the high-bandwidth, low-latency connectivity that next-generation data centers demand. We're looking for a Principal Product Manager to own and drive this exciting product portfolio—working directly with hyperscalers and AI platform providers to define solutions that push the boundaries of what's possible. 

In this role, you'll be the connective tissue between our customers, engineering teams, and go-to-market functions. You'll translate complex customer requirements into differentiated products, guide development from concept through launch, and help secure design wins with the world's most demanding infrastructure builders. This is a high-visibility, high-impact opportunity to shape products that will power the future of AI and cloud computing. 

Based in San Jose, this position requires an in-person presence with regular travel to customers. 

Key Responsibilities 

• Product Definition & Strategy 
  • Define detailed product requirements for Smart Cable Modules, prioritizing features, enhancements, and bug fixes based on business goals and customer feedback 
  • Translate market trends and customer insights into a compelling product roadmap 
  • Drive competitive differentiation through deep understanding of PCIe, Ethernet, and system architectures 

• Customer Engagement & Design Wins 
  • Serve as the primary technical product interface with lighthouse customers, translating their needs into actionable product requirements 
  • Secure and support new design wins throughout the product lifecycle 
  • Build strong relationships with hyperscalers and AI platform providers to ensure Astera Labs remains their connectivity partner of choice 

• Cross-Functional Leadership 
  • Collaborate with engineering to drive products from ideation through launch, ensuring on-time delivery of competitive solutions 
  • Partner with product marketing on go-to-market planning, sales enablement, competitive analysis, and product positioning 
  • Work across Astera Labs functions to align priorities and drive consensus in a fast-paced environment 

Basic Qualifications 

• Bachelor's degree in Electrical Engineering, Computer Science, or related technical field 
• 8+ years of experience in product management, applications engineering, or technical product roles within the semiconductor industry 
• Deep understanding of high-speed protocols (PCIe, Ethernet, CXL) and system architectures used in cloud and AI infrastructure 
• Proven track record of defining and launching successful semiconductor products 
• Strong communication skills with the ability to articulate complex technical concepts to both technical and business audiences 
• Willingness to travel for customer meetings, industry events, and trade shows 

Preferred Qualifications 

• Master's degree in Electrical Engineering, Computer Science, or related field 
• Experience working directly with hyperscalers or large cloud infrastructure providers 
• Background in cable modules, retimers, or high-speed connectivity products 
• Experience driving products through full lifecycle from concept to high-volume production 
• Strong strategic thinking and analytical skills with ability to translate customer pain points into competitive products 
• Experience speaking Mandarin

Salary range is $158,400 to $220,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits. 

About the Role

As a Senior Product Advisor within the Product Management Alliances team at Veeam, you will be instrumental in shaping our product integration strategy in collaboration with leading hyperscaler platforms such as Microsoft Azure and AWS. In this role, you will function as a strategic technical partner—guiding the convergence of business needs and technical innovation to advance Veeam’s leadership in data management, protection, and resilience.

What You’ll Do

• Lead Cloud Integrations: Architect and implement advanced integrations between Veeam’s products and hyperscaler cloud platforms (AWS, Azure, GCP), delivering customer value through technical innovation and excellence
• Strategic Partner Collaboration: Serve as the primary technical liaison for hyperscaler partners, co-developing integration strategies, architectural frameworks, and best practices for joint solutions
• Cross-Functional Leadership: Collaborate closely with product management and engineering teams across organizations, providing architectural guidance and ensuring partner and customer insights shape product development
• Relationship Management: Cultivate and maintain strong technical relationships with hyperscaler stakeholders, sharing operational expertise and uncovering opportunities for joint innovation
• Technology Evangelism: Champion the adoption of emerging cloud and AI technologies within Veeam’s portfolio, enabling the delivery of next-generation workload protection solutions
• Internal Advisory: Act as a trusted technical advisor to internal teams—including Product Management, R&D, Support, and Sales Engineering—guiding product strategy and solution architecture
• Technical Escalation: Function as the senior escalation point for complex integration scenarios and critical customer engagements, resolving advanced technical challenges and ensuring project success
• Architectural Leadership: Assess and articulate the impact of architectural decisions on scalability, performance, and cost, while setting and advocating for high standards in integration and design

What You’ll Bring

• Bachelor’s degree in Computer Science, Engineering, or a related field, or equivalent professional experience
• Strong programming and engineering acumen, with the ability to interpret and analyze data structures, code architectures, and technical documentation
• Proven expertise in designing, architecting, and integrating products and solutions within hyperscaler environments (AWS, Azure, GCP) and complex enterprise software ecosystems
• In-depth knowledge of cloud-based data protection, storage technologies (including object storage), APIs, SaaS architectures, and AI-driven integrations
• Demonstrated success in technical leadership roles, including driving alignment and negotiation across multifaceted partnerships and alliances
• Exceptional communication and interpersonal skills, with a track record of engaging, influencing, and building relationships with diverse internal and external stakeholders
• Experience delivering compelling technical presentations, evangelizing products and solutions at industry events, and serving as a trusted advisor to customers and partners
• Advanced analytical and problem-solving abilities in cloud environments, with a history of resolving complex technical challenges and thoroughly documenting solutions
• Willingness to travel approximately 5–7 weeks per year

Bonus Skills

• Relevant certifications such as AWS Certified Solutions Architect or Microsoft Certified: Azure Solutions Architect Expert
• Experience with DevOps practices and automation tools
• Background in product management or technical alliances within the cloud ecosystem
• Experience working in a global, cross-functional, or matrixed organization

About The Team

We are seeking a skilled Test Technician to join our team. The ideal candidate will be responsible for testing and troubleshooting medical robotic systems while adhering to Good Manufacturing Practices (GMP). The successful candidate will have a strong understanding of robotic hardware, sensors, motors, PLC’s, relays, circuit boards, computers, cabling and experience with and testing, excellent troubleshooting skills, and GMP experience.

A Day In The Life Of Our Manufacturing System Technician

• Assemble and/or test medical robotic systems according to established MPI, drawings, and schematics.
• Assemble and/or test medical subassemblies according to established MPI, drawings, and schematics.
• Perform packaging medical subassemblies and systems according to established MPI, and drawings.
• Install and configure hardware components, including robotic arms, sensors, motors, PLC’s, relays, circuit boards and cables.
• Install and configure software components, including programming and testing of robotic movements and functions.
• Perform system testing and work with engineers to troubleshoot issues as they arise.
• Collaborate with other team members to identify and resolve issues.
• Assist with inventory management and point out shortages as needed.
• Maintain accurate records of system configurations, test results, and troubleshooting activities as part of the Device History Records while adhering to GMP.
• Maintain a clean and organized work area as part of the line clearance procedure as lean manufacturing practices.
• Meet all standard cycle time requirements and quality standards.
• Perform other reasonable duties in assembly, rework, or test as required
• Might require to stay overtime as required
• Shift schedule: Monday - Thursday: 5:00AM-3:30PM

About You

• High School Diploma required and a Minimum 3-5 years of medical device test work experience required (or)
• AS Degree in Computer Science and minimum 2 years of testing Medical Device experience (or)
• BS in Computer Science, Electrical Engineering, or Industrial Engineering with 1 year of experience medical device test work experience
• English language proficiency required
• Knowledge of working Microsoft office and other PC software
• Knowledge of GMP, Non-Conformance reports, and Line clearance experience required.
• Work with the production manager and engineers to assist root cause analysis for nonconformance.

Experience working in a regulated environment in compliance with ISO 13485 and 21 CFR 820 required.

#LI-Onsite

About The Team

The Senior Facilities Technician will be a key contributor to various projects in our growing company.  You have experience supporting multiple buildings with facilities maintenance, repairs, improvements, and expansions.  You have experience in areas such as electrical, plumbing, carpentry, construction. You are able to prioritize and multi-task effectively in an agile, start-up environment and are able to collaborate with cross functional teams and vendors.  

A Day In The Life Of Our Sr. Facilities Technician at Noah Medical

• Assist with the coordination and execution of facility improvements, expansions, and maintenance. This may include electrical work, plumbing, carpentry, ventilation, painting, heating/cooling, and other building related tasks. 

• Assist with installation and modification of production workstations, clean rooms, and material handling systems. 

• Inspect lighting and fixtures to ensure adherence to code and modify as necessary. 

• Install, maintain, and troubleshoot equipment, utilities, and hardware.  

• Perform preventive maintenance of some production equipment. 

• Identify building safety hazards and work with vendors when needed. 

• Obtain any required facility permits for compliance. 

• Execute 5S solutions as directed by the Operations team. 

• Assist with construction and tenant improvements. Send work orders to landlord on roof leaks and exterior repairs. 

• Follow through with facility project plans and schedules.  

• Perform other reasonable facilities duties and resolve facility issues quickly while minimizing risk and properly communicate issues 

• Respond to emergency situations. 

About You

• High school diploma or possession of a G.E.D. 

• Minimum of 2 years of working experience in construction trades or facilities roles.  

• Good mechanical aptitude and the ability to work with hand and power tools 

• Basic understanding of electrical, plumbing, carpentry, painting, and construction equipment. 

• Strong team player with a demonstrated history of success working in a multi-disciplinary, cross-functional environment 

• Ability to work independently or with others during projects. 

• Must demonstrate strong communication and interpersonal skills, customer service oriented 

• Must be organized, detail oriented, self-motivated, and able to multi-task 

• Strong problem-solving skills paired with ability to be proactive and foresee next steps 

• Must have some computer skills, Microsoft Outlook, Word, Excel. Operate mobile equipment including forklift and scissor lifts in the performance of duties 

• Must be able to work flexible hours 

• Ability to handle physical workload including standing-walking, bending, kneeling, stooping, lifting up to 40 pounds, and moving objects between 10-50 pounds. 

#LI-Onsite

About The Team

Join our Quality team at Noah Medical, where you'll play a pivotal role in driving innovation and product leadership in medical robotics. We're a hands-on, technical, and solution-oriented, and accountable team, seeking like-minded individuals to join us. Utilizing a data-driven approach, we tackle challenges and fuel innovation. Committed to exceeding FDA and international regulatory standards, we take initiative, optimize processes, and implement agile quality management systems to foster continuous improvement. Our ultimate goal is to make a meaningful impact on patients' lives by setting new benchmarks and breaking barriers in the field of medical robotics. Come join us as we shape the future together! 

This position is responsible for ensuring product quality throughout the design lifecycle while serving as a key liaison between Engineering and the Service organization. This role drives design robustness, field performance improvement, and customer satisfaction by proactively incorporating serviceability, reliability, and field feedback into product development and continuous improvement initiatives. We are looking for someone that is highly motivated and solution oriented; you must be a self-starter, team builder, and excellent communicator. This is a 6-month contract opportunity. 

A Day In The Life Of Our Contract Sr. Design Quality Engineer-Service at Noah Medical

• Act as the primary quality liaison to the Service organization. 

• Support Design for Reliability (DFR), Design for Manufacturability (DFM), and Design for Serviceability (DFS) initiatives. 

• Review hardware and system-related verification and validation strategies for the Service organization and ensure timely execution.   

• Co-develop the project process validation strategy and review IQ/OQ/PQ/TMV protocols for service tools, equipment, software, and field processes. 

• Participate in development activities, including design reviews, requirements analysis and tracing, and configuration management. 

• Serves as a technical resource for risk management activities for hardware and systems in compliance with ISO 14971 and IEC 60601.   

• Review test plans, and test cases based upon the product and component level requirements, ensuring that appropriate statistical techniques are applied. 

• Review and approve V&V system maintenance such as reworks and modification and tracking. 

• Partner with cross-functional teams to collaborate on root cause analysis of identified design issues and identify appropriate corrective and preventive action.  Use the NC and CAPA systems as needed to structure activities. 

• Support field service engineering requests and assess serviceability risks. 

• Partner with PMO to apply project management tools to define project deliverables and establish a project schedule. 

• Foster a culture of quality throughout the organization by sharing best practices and promoting quality awareness. 

About You

• BS in Engineering or Technology, Mechanical, Industrial, Electrical, Life Sciences, etc. 

• Minimum of 4 years of Engineering work experience with a BS in the medical device or similarly regulated industry or minimum of 2 years of Engineering work experience with a PhD.    

• Preferred 2 years experience in a development QE function in a regulated environment 

• Experience in meeting Design Control and DHF requirements with R&D teams. 

• Experience with Quality Management System to meet US FDA and ISO/MDR requirements. 

• Experience with Risk Management, FMEA, Hazard Analysis, GD & T requirements. 

• Experienced with statistical skills to define/train on test sample size and data analysis techniques. 

• Experienced in Microsoft Office, Google Suite, Jama, and ePLM/eQMS systems. 

• Must be a self-starter, team builder, and excellent in verbal and written communication. 

• Preferred: Experience working in a clinical setting, and or field service 

• Preferred: Certifications: CQE, CQA(BM), CQM, 6 Sigma, etc 

#LI-Hybrid

About The Team

The Director of RA/QA reports to the Head of Quality and Regulatory. This position is the day to day leader of the RA/QA function and provides guidance and leadership from a Regulatory and Quality perspective to the team throughout all stages of product development.  We are looking for someone that is highly motivated in their career growth (possible vertical and horizontal growth to take on wider roles as well); must be a self-starter, team builder, and excellent in communication.

A Day In The Life Of Our Director, Quality Assurance and Regulatory Affairs at Noah Medical

• Establishes RA/QA department operational objectives/budgets, manages staff hiring, assignments, performance feedback, and coaching to support company milestones. 
• Involved in developing, modifying and executing RA/QA related company policies, which affect immediate operation(s) and may also have company-wide effect. 
• Manages the RA/QA department functions through direct reports or subordinates.
• Regularly interacts with senior management of other functional areas, suppliers, and/or customers using soft skills to collaborate, think outside of the box, problem solve and gain acceptance of others in sensitive situations. 
• Supports defining, training and implementing the quality management system (QMS) at Noah Medical and the ongoing maintenance of the QMS to ensure that the quality system is properly documented and revised as necessary to assure continued compliance with US and International regulatory requirements.  
• Coordinates the planning and organization of regulatory activities related to Design/Development/NPI, manufacturing, distribution control, and service
• Manages the reporting and investigation of customer/service complaints, the review of corrective actions and failure investigations, the review of Post Market Surveillance reporting and, if necessary, implements field corrective actions. 
• May serve as the designated Management Representative. 

About You

• Requires a BS (preferably in Engineering or Technology) with a focus in Mechanical, Industrial, Manufacturing, Electrical, Life Sciences, etc. 
• Minimum of 10 years of RA/QA related experience in the medical device field (experience in capital equipment and services a plus)
• Minimum of 3 years of supervisory experience of multiple exempt level employees.
• Experience working in a startup environment to meet rigorous timelines with NPI and product launch teams.
• Experienced in implementing a complete QMS system to meet US FDA and ISO requirements.
• Experienced in conducting internal and supplier audits and hosting 3rd party audits.
• Must be a self-starter, team builder, and excellent in verbal and written communication.
• Preferred: Knowledge of sterile/disposable medical device production processes.
• Preferred: Master Degree, MBA, experienced with Software Validation, 
• Certifications is a plus: CQE, CQA(BM), CQM, 6 Sigma, ISO Auditor, etc. 

#LI-Hybrid