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AST SpaceMobile is building the first and only global cellular broadband network in space to operate directly with standard, unmodified mobile devices based on our extensive IP and patent portfolio and designed for both commercial and government applications. Our engineers and space scientists are on a mission to eliminate the connectivity gaps faced by today’s five billion mobile subscribers and finally bring broadband to the billions who remain unconnected.
Position Overview
We are seeking a Senior FPGA Verification Engineer with 4–8 years of experience to design, develop, and execute comprehensive verification strategies for complex FPGA designs. This role requires strong hands-on expertise in System Verilog and UVM, testbench architecture, and cross-functional collaboration with design and system teams.
Key Responsibilities:
Qualifications
Education:
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
Experience:
4–8 years of hands-on experience in functional verification
Preferred Qualifications:
Soft Skills:
Technology Stack:
Physical Requirements
This job description may not be inclusive to the duties and responsibilities listed. Additional tasks may be assigned to the employee from time to time or the scope of the job may change as needed by business demands.
AST SpaceMobile is an Equal Opportunity, at will Employer; employment is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
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Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
We are looking for a talented engineer to join our CPU design team to define and implement CPU system RTL. You’ll work to combine multiple cores, multiple clusters of cores, fabrics and subsystem components together, collaborating with DV, PD, architecture and performance teams to deliver a functional, timing, and power-converged design.
This role is hybrid, based out of Bengaluru, India.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
What You Will Learn
This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
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Role Overview
We are seeking a Senior Staff DFT Engineer to join a rapidly growing DFT design team focused on next-generation AI accelerator SoCs. In this role, you will define, architect, and implement current and future DFT/DFX solutions, supporting advanced SoC designs that leverage innovative memory-centric compute and heterogeneous chiplet architectures.
This is a highly hands-on role requiring both deep technical execution and high-level planning, working across design, verification, product, and test teams to ensure robust manufacturability and silicon bring-up.
Location:
Hybrid, working onsite at our Bengaluru, Karnataka, headquarters 3-5 days per week.
Drive DFT partitioning strategies for ATPG, including hierarchical and scalable approaches.
Implement ATPG compression and serialization, and perform RTL scan insertion with associated design rule fixes.
Own Memory BIST (MBIST) solutions, including memory repair and in-system test (IST), from implementation through verification and silicon debug.
Support boundary scan and define DFT mode constraints for IPs, providing timing feedback to STA teams.
Generate and integrate DFT RTL, ensuring quality through RTL-level checks (e.g., linting and DFT rule verification).
Apply and support IEEE 1149.1, IEEE 1500, and IEEE 1687 standards.
Execute and verify ATPG (SAF, TDF) and MBIST using unit-delay and min/max timing simulations.
Perform detailed ATPG coverage analysis and drive coverage closure.
Collaborate with product and test engineering teams to deliver manufacturing test patterns for ATE.
Develop diagnostic tools and flows for ATPG, MBIST, and silicon bring-up on ATE.
Work hands-on with industry-standard DFT tools, contributing from low-level implementation through architectural planning.
BE/ME (or equivalent) in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
7+ years of experience in DFT, including scan test and MBIST.
Proficiency with HDLs such as Verilog, SystemVerilog, or VHDL.
Experience with scripting or programming languages (e.g., Python, Perl, TCL, C).
Strong ability to collaborate effectively in cross-functional and diverse teams.
Experience producing clear, detailed technical documentation.
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About InnoPhase IoT
If you are keen to work with a bunch of brilliant people with various backgrounds, if you share the same value of working smart and celebrating successes, if you have enthusiasm for big technology in a small company, if your goals are to learn and experience different aspects of work--not just singing the same song every day, you’ll find your playground at Innophase IoT.
We are looking for people seeking AWESOMENESS! If you’re good at what you do, you can work anywhere. If you’re the best at what you do, come work at Innophase IoT!
You will do:
Construct SoC level test benches using verification components developed at the IP level. Test bench architecture for
random/directed testing, stimulus generation, and checking to include custom and off the shelf VIP/UVCs.
• Develop and execute SoC verification plans focused on IP block interoperability and SOC/System level. Develop and
execute verification plans based on design specifications and collaboration with architects and designers.
• Develop RAL test plan at SOC/IP level and its implementation.
• Verify SoC using advanced verification methodologies.
• Construct HW/SW Co-Verification environment - test-benches, use-cases,
• APIs, sequences. Execute and Debug use-cases.
• Be part of a dynamic and functionally diverse team with opportunities for gaining exposure to modeling (TLM), HW
emulation/acceleration, and SW driven verification.
• Work with design team to understand design intent and bring up verification plans and schedules.
• You will think through design corner cases and be able to write relevant cover points.
• Debug test cases and report verification result to achieve expected code/functional coverage goal. Utilize constrained
random verification, functional coverage, code coverage and assertions to achieve goals.
• Assist in emulation, FPGA, prototyping efforts.
• Implement / maintain automated verification flows in languages such as Python, Perl/ Shell scripts.
Required Qualifications:
Preferred Qualifications:
We bring together the best in technology, drive innovation to create the best ULP wireless IoT solutions and user experiences in home, building and industrial automation and wearables.. We create career opportunities across a wide range of locations, disciplines and are at the forefront of change, thanks to our remarkable people, who bring cutting-edge products and solutions to our customers. If you share in our passion for teamwork, our vision to revolutionize the IoT industry and our goal to lead the future in technology, we want you to fast-forward your career at InnoPhase IoT.
It is key to unleash the potential in every employee, every team, every leader, and the company herself. We know employees perform best when motivated, appreciated and recognized, and can be themselves. We are committed to building a culture where every voice can be heard, everyone has room for growth and can make meaningful contributions. At the end of the day, we want success not just for the company, but also for everyone who believes in the company, the vision, and the future.
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Apply to InnoPhase IoTCookies & analytics
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