We are looking for a Staff Digital Design Engineer to help define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads. This role is ideal for engineers who thrive at the intersection of microarchitecture, RTL implementation, and performance-aware design.

This role is hybrid, based out of Toronto, Ottawa, Boston, or Austin. 

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• A digital design expert with a deep understanding of computer architecture and IP microarchitecture.
• Skilled in RTL development (Verilog/VHDL) and familiar with full ASIC flows.
• Comfortable optimizing for power, performance, and area (PPA) under aggressive design goals.
• A naturally collaborative and technical engineer — you thrive in spec definition, peer reviews, and team-wide planning.

What We Need

• Architecture and RTL implementation of Tenstorrent’s custom IP blocks and SoC components.
• Performance-aware design decisions for compute, interconnect, or memory-heavy blocks.
• Occasional contributions to validation using emulation, FPGA prototyping, or UVM flows.
• Strong synthesis and timing closure awareness to support backend teams.
• Prior experience in on-chip fabric and interconnect designs is an asset.

What You Will Learn

• How cutting-edge AI chips are built, from spec to silicon.
• What it takes to collaborate with teams designing novel processor and memory architectures.
• How to blend custom logic with standard SoC elements for power and scale.
• How cross-functional workflows come together across design, DV, physical, and firmware teams.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

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The Role

We are looking for an ASIC Validation Engineer to help bridge the gap between custom mining silicon design and real-world operation. In this highly hands-on, lab-focused role, you'll work closely with ASIC designers and system engineers to debug issues, build test infrastructure, and generate the data needed to enable rapid design iteration and system-level development.

You Will:

• Bring up new silicon on bench platforms, evaluation boards, and system hardware
• Debug issues across ASIC, board, firmware, and system interactions
• Develop bench tests, scripts, and tools to exercise silicon features and collect data
• Build and maintain test setups (lab automation, instrumentation, fixtures, scripts)
• Partner with ASIC designers to validate functionality and root-cause failures
• Work with system engineers to ensure silicon performs correctly in target system environments, including mining systems
• Generate and analyze data to support design decisions, characterization, and bring-up
• Create lightweight, reusable test workflows and documentation for the broader team
• Support early manufacturing efforts with practical validation and debug, as needed
• Travel up to 20% to the labs in Oakland, CA or Toronto, Canada

You Have:

• Bachelor's degree in Electrical Engineering or related field
• 4+ years of experience in silicon validation, hardware test, or related roles
• Strong hands-on experience in a lab environment (bench bring-up, debugging, instrumentation)
• Solid understanding of digital systems and basic analog concepts
• Experience writing scripts or tools (Python preferred) for test and data analysis
• Comfortable debugging issues that span multiple layers (ASIC ↔ board ↔ system)
• Clear communication skills and ability to work closely with cross-functional teams

Preferred:

• Experience with ASIC or FPGA bring-up and validation
• Familiarity with common interfaces (SPI, I2C, JTAG, UART, etc.)
• Experience using lab equipment (oscilloscopes, logic analyzers, power supplies, etc.)
• Exposure to high-performance, power-dense systems (e.g., mining ASICs, accelerators, or similar)
• Experience building test automation or internal tooling
• Familiarity with data analysis and visualization

Nice to Have

• Experience working with early silicon / first bring-up environments
• Exposure to manufacturing test or ATE
• Experience working on systems with tight power, thermal, and performance constraints

The Role and Its Impact 

Our analog connectivity product portfolio includes sophisticated mixed-signal components that form the critical signal conditioning path in both optical modules and copper interconnects: transimpedance amplifiers, transmit drivers, continuous-time linear equalizers, and integrated analog subsystems. The firmware you develop will directly control the adaptive behavior, calibration sequences, and real-time performance optimization of these analog circuits deployed in data centers worldwide.  

As a Principal Engineer in our Signal Connectivity Engineering group, you'll shape firmware architectures that directly impact the performance and reliability of connectivity solutions powering AI infrastructure globally. You'll take end-to-end ownership of the software lifecycle, from pre-silicon planning through production deployment and field support. You will bridge the gap between sophisticated analog circuit design and the software intelligence required to make these circuits adaptive and robust. Working at the intersection of embedded systems and analog control, you'll collaborate closely with mixed-signal designers, systems architects, silicon validation engineers, and customer teams while building and leading a technical team in a high-growth company. 

We're a startup, and this role reflects that reality. You'll have responsibilities spanning firmware architecture, team building, CI/CD infrastructure, customer engagement, and lab automation. We're looking for someone who thrives wearing multiple hats and is energized by jumping into whatever needs doing. We recognize this breadth and reward it accordingly. 

This position offers an opportunity to build and lead a team from the ground up. You'll help hire two engineers and will play an active role in recruiting as the team grows. Depending on your preferences, you can either manage these engineers directly from day one, or mentor them while remaining in a technical lead capacity, either path is fully supported. 

Level is negotiable based on experience and qualifications. 

Location & Travel 

This is a remote position, but candidates must be located and authorized to work in the Ottawa area. Occasional travel to our San Jose headquarters will be required, approximately twice per year for chip bring-ups and project coordination. 

Core Responsibilities 

Software Ownership & Architecture 

• Own the complete firmware stack for analog connectivity products, from low-level hardware abstraction through customer-facing APIs 
• Design and implement embedded firmware that controls complex analog subsystems including adaptive equalization, gain control, PLL/CDR feedback loops, and thermal management 
• Architect calibration algorithms, state machines, and control flow for managing analog tuning parameters across process, voltage, and temperature variation 
• Establish software quality gates and validation criteria at each development phase 

Technical Leadership & Team Building 

• Help recruit and hire two engineers to join your team, with ongoing involvement in recruiting as the team expands 
• Lead your team, whether through direct management or technical mentorship, through design, implementation, code review, and debugging activities 
• Lead architecture discussions and technical tradeoff decisions; balance performance, code size, maintainability, and time-to-market 
• Serve as the go-to technical expert for mixed-signal firmware and analog control loop behavior 
• Drive difficult debug sessions in the lab and through remote customer support, coordinating across silicon design, systems, and applications teams 

Cross-Functional Collaboration 

• Partner with analog circuit designers to understand hardware behavior, tuning requirements, and failure modes 
• Collaborate with product applications to translate customer requirements into firmware features and APIs 
• Work alongside silicon and system validation teams to develop test plans, automate characterization flows, and verify firmware behavior across corner cases 
• Coordinate with field applications engineers to support customer integration and resolve deployment issues 
• Provide regular project updates on progress, risks, dependencies, and technical challenges 

What You Bring 

Required Qualifications: 

• BS/MS in Computer Science, Electrical Engineering, Computer Engineering, or related field 
• 10+ years of embedded C/C++ firmware development in resource-constrained environments 
• Proven track record as a Technical Lead or Team Lead on embedded projects from architecture through production 
• Deep understanding of microcontroller architecture, memory-mapped peripherals, interrupt handling, and bare-metal firmware design 
• Solid experience with analog control loops: PID controllers, feedback systems, adaptive algorithms, and tuning methodologies 
• Strong proficiency with Linux development tools: gcc/clang, make, bash scripting, gdb, and git 
• Excellent verbal and written communication skills; ability to explain complex technical concepts clearly 
• Demonstrated problem-solving ability and systematic debugging approach on real hardware 
• Comfort with ambiguity and a willingness to take on whatever challenges arise in a fast-moving startup environment 

Highly Valued Skills: 

• Experience with Python for test automation, data analysis, or general scripting 
• Hands-on experience building and maintaining Jenkins CI/CD pipelines and automated test infrastructure 
• Familiarity with mixed-signal systems: ADC/DAC interfaces, sensor readout, analog signal conditioning, calibration techniques 
• Knowledge of transimpedance amplifiers, transmit drivers, equalizers (CTLE/DFE), CDR/PLL circuits, or related analog signal path components 
• Background in optical module firmware, pluggable optics/AEC standards (MSA/CMIS), retimer or gearbox firmware/API, or high-speed copper connectivity 
• Experience with lab equipment: oscilloscopes, power supplies, logic analyzers, Viavi/Lecroy/Exfo/Keysight/Tektronix/etc. 
• Exposure to SERDES, Ethernet PHYs, layer 1 devices, or PCIe physical layer implementations 
• Understanding of signal integrity concepts: equalization, channel loss, jitter, eye diagrams, and link margin 
• Familiarity with FPGA emulation, pre-silicon validation, or hardware simulation environments 
• Experience with RTOS, device drivers, coroutines 
• Prior people management, mentorship, or recruiting experience 

Compensation 

Salary range is CAD $184,500 to $205,000 depending on experience, level, and business need. This role will include a discretionary bonus, extremely competitive equity package, comprehensive health/dental/vision coverage, professional development opportunities, and a culture that values technical excellence, collaboration, and innovation.