Tenstorrent is looking for a mid- to senior-level Physical Design Engineer who will contribute to the physical design of high-performance chips for industry-leading AI/ML architectures, spanning implementation from synthesis through tapeout. You will partner with front-end and physical design engineers to optimize floorplanning, timing, power, performance, and area across multiple IPs. Along the way, you will build end-to-end ASIC expertise while learning from experienced engineers across the chip development process.

This role is hybrid, based out of Austin, TX, Fort Collins, CO, or Santa Clara, CA.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• An engineer excited to work on high-performance designs for industry-leading AI/ML architectures.
• A collaborative problem solver who enjoys working with experienced engineers across ASIC disciplines.
• Grounded in logic design fundamentals and gate- and transistor-level implementation.
• Curious about how early architectural and RTL decisions shape physical implementation and final chip quality.

What We Need

• A BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with strong logic design fundamentals.
• Experience with synthesis, place-and-route flows, and physical design tools, plus familiarity with timing, EM/IR, and power analysis.
• The ability to contribute across floorplanning, clocking, I/O planning, timing closure, area improvement, and power optimization.
• Strong Tcl, Perl, Shell, and/or Python skills, along with knowledge of low-power techniques such as power gating, multi-Vt, and voltage scaling.

What You Will Learn

• The complete ASIC implementation lifecycle, from synthesis through signoff and tapeout.
• How architecture, front-end design, and RTL decisions influence physical implementation outcomes.
• How to develop flows and use experiments to optimize power, performance, and area.
• How to build physical design expertise while collaborating with experts across advanced AI/ML silicon development.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a U.S. EAR Country Groups D:1, E1, or E2 country.