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Sobre este puesto de Lead Software Engineer - Liberate en Cadence Design Systems

Cadence Design Systems · Presencial · SHANGHAI

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The candidates should have two or more years of experiences in developing EDA software.

 Must be proficient in C, C++, TCL, and development in Linux/Unix.
 Knowledge on semiconductor device is strong plus.
 Experience with SPICE or SPICE-like circuit simulation is important.
 Knowledge of Verilog and VHDL is also highly desirable.
 Have a good understanding of library characterization, IP design, static timing analysis, power analysis, and signal integrity analysis flows.
 Minimum Education Required / Minimum Experience Required : MS, EE, CS, Math or Physics 2
 Preferred Education / Preferred Experience: Ph.D. , EE, CS, Math or Physics 3-5

We’re doing work that matters. Help us solve what others can’t.

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Additional Jobs Equal Employment Opportunity Policy: Cadence is committed to equal employment opportunity throughout all levels of the organization. Read the policy(opens in a new tab) We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact [email protected] . Privacy Policy: Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) . E-Verify Cadence participates in the E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64

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