𝗧𝗵𝗶𝘀 𝗿𝗼𝗹𝗲 𝗶𝘀 𝗳𝗼𝗿 𝗼𝗻𝗲 𝗼𝗳 𝘁𝗵𝗲 𝗪𝗲𝗲𝗸𝗱𝗮𝘆'𝘀 𝗰𝗹𝗶𝗲𝗻𝘁𝘀

𝗦𝗮𝗹𝗮𝗿𝘆 𝗿𝗮𝗻𝗴𝗲: 𝗥𝘀 𝟴𝟬𝟬𝟬𝟬𝟬𝟬 - 𝗥𝘀 𝟭𝟬𝟬𝟬𝟬𝟬𝟬𝟬 (𝗶𝗲 𝗜𝗡𝗥 𝟴𝟬-𝟭𝟬𝟬 𝗟𝗣𝗔)

Experience: 15+ yrs

Location: Bengaluru

We are seeking an experienced DFT Delivery Manager to lead Design for Test (DFT) engineering delivery across multiple projects and customer accounts. The role requires strong technical expertise in DFT, hands-on experience with SoC tapeouts, and proven leadership capabilities to manage engineering teams, ensure delivery excellence, and maintain strong customer relationships.

The ideal candidate will bring 15–17 years of industry experience, including at least three years of managing teams of 10 or more engineers. This role combines technical leadership, project delivery, resource management, and customer engagement to ensure high-quality DFT implementation and successful first-silicon testing outcomes.

Requirements

Key Responsibilities

• Own end-to-end DFT delivery across multiple projects, including scope definition, planning, execution, quality assurance, sign-off, and customer acceptance.
• Manage project schedules, deliverables, risks, dependencies, and quality metrics to ensure timely and successful execution.
• Lead and develop teams of 10–25 DFT engineers, building technical capability, accountability, and a high-performance culture.
• Manage customer relationships at the engineering-management level, including governance reviews, escalations, status reporting, and change requests.
• Plan resources, monitor utilisation, allocate engineers across projects, and develop hiring plans aligned with business requirements.
• Drive performance management, career development, appraisals, succession planning, and employee retention.
• Provide technical direction through engineering leads and principal engineers, ensuring consistent DFT methodologies and best practices across projects.
• Define and monitor delivery metrics, including test coverage, test time, DRC status, schedule variance, and silicon escapes.
• Drive first-silicon test success across multiple SoC programs through effective planning, execution, validation, and issue resolution.
• Collaborate with RTL, Synthesis/STA, Physical Design, and Product Engineering teams to deliver integrated, turnkey engineering engagements.
• Contribute to proposals, effort estimation, resource planning, and SOW definition for new customer engagements.
• Establish scalable quality processes, including design reviews, checklists, audits, and delivery governance.
• Identify process improvements, mitigate technical and operational risks, and continuously improve delivery predictability and customer satisfaction.

What Makes You a Great Fit

• 15–17 years of experience in semiconductor engineering, with substantial expertise in Design for Test (DFT).
• Strong hands-on DFT background with demonstrated experience supporting SoC tapeouts and first-silicon test success.
• At least 3 years of experience managing teams of 10 or more engineers.
• Proven ability to manage delivery across multiple projects or customer accounts simultaneously.
• Strong understanding of DFT methodologies, implementation quality, test coverage, test-time optimisation, and sign-off processes.
• Experience managing project schedules, delivery metrics, customer expectations, and engineering escalations.
• Demonstrated capability in resource planning, team development, hiring, performance management, and retention.
• Strong customer-facing communication, stakeholder management, and conflict-resolution skills.
• Experience collaborating across RTL, Synthesis/STA, Physical Design, and Product Engineering functions.
• Ability to establish engineering standards, scalable processes, and consistent quality practices across teams.
• Commercial awareness and experience contributing to proposals, effort estimates, and SOW preparation.
• Strong analytical thinking, decision-making, and problem-solving skills, with a focus on delivery excellence and customer satisfaction.