The CesiumAstro FPGA team is looking for Summer 2027 interns to apply digital design and verification principles to FPGA’s for satellite communication systems.

FPGA interns will work closely with CesiumAstro engineers on FPGA’s through multiple phases of the development process. Interns will primarily focus on either FPGA design or FPGA verification, based on project needs, experience, and interests.

FPGA Design assignments may include developing and testing RTL for high-speed serial interfaces and data streams, digital processing cores, multiple clock domains, and management interfaces.

FPGA Verification assignments may include developing testbenches and verification environments, creating test scenarios, generating constrained-random stimulus, checking expected behavior, debugging failures, and measuring verification coverage.

Assignments will be determined by a mix of project availability and the interests of the successful candidates.

Prior FPGA-specific coursework or experience is not required. We recognize that access to FPGA courses, development boards, commercial tools, and verification environments varies among universities. We are looking for candidates with a strong foundation in digital design or software-based verification concepts and an interest in applying those skills to FPGA development.

CesiumAstro interns regularly present their work to peers, mentors, and CesiumAstro executive leadership throughout the course of the summer. As such, excellent written and verbal communication skills are required.

To apply, please include a cover letter describing your interest in digital design, FPGA development or verification, and either space systems or communication systems, as well as your status as a US citizen or permanent resident.