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Über diese Solutions Intern - Systems Modeling (FPGA) Stelle bei Marvell

Marvell · Vor Ort · Hyderabad

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

About Marvell

Marvell is a global leader in high-performance silicon and AI infrastructure, powering the world's most advanced datacenters, cloud platforms, 5G networks, and AI/ML workloads. Our innovations drive next-generation computing, networking, and storage, enabling breakthrough performance, scalability, and efficiency for the most demanding applications.

This team at Marvell prototypes and validates the next-generation protocols and interconnects that move data across large-scale AI infrastructure. Depending on the problem, that means building FPGA prototypes, running simulations on platforms like Murals, or modeling the data infrastructure itself — always with a deep understanding of the underlying protocols. The team works across hardware and simulation to prove out emerging networking and interconnect ideas before they reach silicon.

Working closely with system architects, hardware designers, and ML practitioners, the team explores innovative ways to optimize compute, memory, and networking subsystems across complex datacenter environments.

What You Can Expect

Key Responsibilities

  • FPGA Prototyping – Design, implement, and test FPGA prototypes of networking and interconnect protocols.
  • Protocol Bring-Up – Implement and validate protocol behavior in hardware, measuring latency, throughput, and correctness.
  • Simulation & Modeling – Model workloads and study protocol behavior using trace-driven and analytical methods on platforms like Murals.
  • Performance Analysis – Profile bottlenecks across compute, memory, and network layers, and correlate hardware results with simulation.
  • Hardware/Software Co-Design – Collaborate with architects on emerging technologies (CXL, PCIe, RDMA/RoCE, UET/UEC, in-network compute).
  • Prototype & Validation – Test implementations in simulated and real environments and iterate on the designs.
  • Knowledge Sharing – Document workflows, share findings, and drive peer learning.

What We're Looking For

Eligibility

  • Enrolled in a Bachelor's or Master's in Computer Engineering, Electronics, Electrical Engineering, or a related field.


Requirements — Core Skills

  • Strong foundation in computer architecture, digital design, and computer networks.
  • Solid understanding of networking and interconnect protocols (TCP/IP, RDMA/RoCE, PCIe, switching/routing).
  • Hands-on experience in one or both of the following:
    • FPGA prototyping — Verilog/SystemVerilog or VHDL
    • Simulation & modeling — frameworks such as Astra-Sim, Chakra, gem5, SST, or NS-3
       
  • Strong programming skills in C/C++, Python, and scripting for automation.
  • Ability to generate ideas, run experiments, and communicate results clearly.
     

Preferred Skills

  • Exposure to interconnect and memory technologies (CXL, PCIe, NVLink, UAL).
  • Experience with high-speed interfaces, protocol design, or hardware verification.
  • Familiarity with performance profiling and analysis tools.
  • Interest in AI infrastructure or next-generation data movement.
     

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity 

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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Über Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

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