Über diese Senior Design Verification Engineer Stelle bei SiFive
About SiFive
As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.
At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.
Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.
Are you ready?
To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.
Job Description:
The Role
As a Design Verification Engineer, you will work with CPU designers, compiler team, performance team, and system verification team to generate the test cases automatically to fit those teams' verification requirements from different perspectives. Your responsibilities will target developing internal processor model to verify hardware design and establishing a random instruction test generator that produces self-checking direct test cases.
Responsibilities:
Review and influence product definition and specifications from a verification perspective and collaborate closely with the design team on feature specifications, test plans, and failure analysis.
Implement internal processor model to support all new features of RISCV world and SiFive special design.
Develop tools, test benches, and test suites (C/C++/Python, systemverilog is plus) to execute test plans.
Requirements:
A minimum of 3 years of recent experience with standard verification tools and methodologies (RTL simulation, wave tracing, scripting languages, etc.).
Familiarity with and/or ability to learn languages and methodologies that are not part of the industry-standard approach to verification (Scala, Chisel, etc.).
Experience with command line tools of embedded software (gcc, as, gdb, etc.)
Solid understanding of processor and SoC architecture, or a strong desire and ability to learn the same.
A thorough understanding of the high-level verification flow methodology (test plan generation, test generation, failure analysis, coverage analysis, and closure).
Experience with prototyping and debugging systems on Field Programmable Gate Array (FPGA) platforms will be a plus.
Good interpersonal skills to listen to diverse points of view and influence people from different disciplines.
An unwavering dedication to product quality.
If you want to do incredible work and be challenged by exciting, truly innovative projects that will test the boundaries of your skills and creativity, then SiFive is the place for you! Be proud of your work. Do things better. Join SiFive.
Additional Information:
This position requires a successful background and reference checks and satisfactory proof of your right to work in:
TaiwanAny offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.
SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.
