The mission of this role as a Principle Validation Engineer is to develop and execute electrical validation tests to quantify parametric device performance and margins over all system conditions. The validation team holds customers’ requirements in the highest regard and is solely responsible for certifying a product’s parametric conformance to this high bar. At Astera Labs, we are looking for motivated Post-Silicon Validation Engineers to work on our game-changing portfolio of connectivity products for Artificial Intelligence and Machine Learning applications. In this role you will formulate a comprehensive post-Silicon validation plan, automate the testing of ICs and board products, design experiments to root-cause unexpected behavior, report results and specification compliance, and work with key internal customers to quantify margins and ensure robustness. 

Basic qualifications 

• Strong academic and technical background in Electrical or Computer Engineering. At minimum, a Bachelor’s is required, and a Master’s is preferred. 

• 10 + years' experience testing, supporting or developing complex SoC/silicon products and high-speed IO/SerDes electrical interface for Server, Storage, and/or Networking applications. 

• Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for internal meetings in advance, and to work with minimal guidance and supervision. 

• Entrepreneurial, open-minded behavior and can-do attitude. Think and act with the customer in mind! 

• Proven track record solving problems independently, preferably as a tech lead. 

Required experience 

• Experience leading SoC validation, debug and development for high-speed interfaces such as 802.3x Ethernet and/or PCIe. 

• Familiarity with Ethernet and/or PCIe standards, electrical compliance, and both NRZ and PAM signaling. 

• Working knowledge of key, high-speed design blocks such as PLL’s, CTLE, DFE, Tx EQ. 

• Experience in system or SerDes testing, characterization, margin analysis and optimization of high-speed data links over long and short channels 

• Strong python scripting ability: knowledge of object-oriented programming and basic dev ops using git for source control and collaboration 

• Deep background in developing bench automation techniques, preferably using Python, with emphasis on execution efficiency, repeatability, and data analysis. 

• Proficiency using high-speed lab equipment such as BERT, Oscilloscope, and VNA 

Preferred experience 

• Hands-on experience with signal integrity, especially as it relates to Ethernet, PCIE testing, and/or CEM/NVMe interfaces 

• Working knowledge of C or C++ for embedded FW 

• Ability to drive electrical compliance testing or discussion at industry workshops and committee activities 

• Working knowledge of common serial data specifications such as I2C, SPI, etc 

• Knowledge of schematic capture and PCB layout tools from Cadence, Altium, etc. 

• Knowledge of simulation tools such as MATLAB, Keysight ADS, or PLTS for data analysis and modeling of electrical channel and signal integrity issues 

Your base salary will be determined based on your experience and the pay of employees in similar positions. The base salary range is $185,000 USD - $240,000 USD for Principal.