Role Overview 

As a Principal Engineer on the Scorpio Product Applications team, you will help customers and internal teams deploy high-performance PCIe fabric solutions for rack-scale AI infrastructure. You will translate complex system requirements into practical architectures, lead platform bring-up, and guide the integration of Scorpio switches across demanding CPU, GPU, NIC, storage, and accelerator designs. 

This role connects product strategy, firmware, and real-world system behavior. You will work across hardware, firmware, validation, and customer-facing teams to solve interoperability challenges, accelerate adoption, and shape the next generation of PCIe Gen 6/Gen 7 connectivity. Your work will directly influence how AI systems scale using purpose-built fabrics, UALink, and UCIe. 

Key Responsibilities 

• Product Applications and Customer Enablement  

• Lead technical engagements with customers and ecosystem partners to define Scorpio-based PCIe architectures and deployment requirements. 

• Develop reference designs, application guidance, technical presentations, and system-level collateral that accelerate customer adoption. 

• Translate customer use cases into clear product requirements, integration plans, and prioritized technical actions. 

• PCIe and Firmware Bring-Up  

• Drive system bring-up, debug, and interoperability across PCIe hosts, GPUs, NICs, storage devices, and other high-performance endpoints. 

• Partner with firmware teams to define, implement, and validate device configuration, boot flows, telemetry, recovery mechanisms, and field-debug capabilities. 

• Analyze link training, enumeration, performance, error handling, and system stability issues using protocol traces, logs, and lab instrumentation. 

• Build and maintain firmware, validation, and automation workflows that improve debug efficiency and product readiness. 

• Cross-Functional Product Leadership  

• Partner with architecture, design, firmware, validation, and applications teams to resolve complex issues from prototype through production. 

• Lead root-cause analysis, communicate risks and recommendations, and drive issues to closure with clear ownership and measurable outcomes. 

• Influence product enhancements and ecosystem interoperability plans for next-generation AI infrastructure connectivity. 

Basic Qualifications 

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. 

• 8–12 years of experience in product applications, systems engineering, firmware, platform validation, or a related semiconductor domain. 

• Strong understanding of PCIe architecture, including link training, enumeration, configuration space, error handling, performance, and system interoperability. 

• Experience with firmware development or debug, including the ability to read code, interpret logs, and collaborate effectively with firmware developers. 

• Hands-on experience with system bring-up, lab debug, protocol analysis, and root-cause investigation across complex hardware and software stacks. 

• Strong written and verbal communication skills, with the ability to explain technical issues to both engineering teams and customers. 

Preferred Qualifications 

• Experience with PCIe Gen 6 or Gen 7, PCIe fabric switches, retimers, or other high-speed connectivity products. 

• Familiarity with UALink, UCIe, or emerging scale-up and scale-out interconnect architectures. 

• Experience developing validation plans, firmware test strategies, lab automation, or customer-facing technical collateral. 

• Background supporting AI servers, accelerator platforms, hyperscale infrastructure, or high-performance computing systems. 

• Demonstrated ability to lead ambiguous, cross-functional technical challenges in a fast-paced, high-growth environment. 

Salary range is $207,000 to $230,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.