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Project Title

F10N/W CMOS Matching and RegE Wafer Edge Exclusion (WEE) Program

Role Overview

The intern will be responsible for driving yield improvement initiatives through CMOS matching analysis and RegE Wafer Edge Exclusion (WEE) program. The role focuses on identifying inline mismatches, reducing wafer edge-related yield loss, and developing robust analytical solutions to enable sustainable manufacturing performance.

Key Responsibilities

F10 N/W CMOS Matching

• Conduct fab to fab offload interaction studies to identify and diagnose inline mismatches between N and W processes that contribute to yield differences.
• Perform detailed bevel characterization to assess defectivity performance differences and quantify their impact on inline die loss.
• Analyze cross-module data to establish root cause relationships between process variation and yield performance.

RegE Wafer Edge Exclusion (WEE) Program

• Drive key WEE performance metrics, including 22UE capability and 1H edge coat performance, to maximize overall yield.
• Identify, troubleshoot, and mitigate process detractors impacting WEE metrics and edge-related yield loss.
• Develop and implement an accurate Wafer Inspection System (WIS) algorithm to reliably capture true 22UE performance while excluding known detractors such as wet moisture signature.

Project Scope

• Apply advanced analytical and data-mining tools to extract actionable insights and identify yield improvement opportunities.
• Integrate inline, defect, and inspection data to support root-cause analysis and data-driven decision making.
• Exercise strong engineering judgment to prioritize actions, balance risk, and drive effective technical solutions across cross-functional teams.

Key Deliverables

• Close the F10 N/W yield mismatch gap of approximately 0.9%.
• Drive the RegE WEE program toward a 160s edge exclusion target of zero non-live dies.
• Deliver a robust WIS algorithm that excludes wet moisture signatures while accurately reflecting true 22UE performance.

Required Skills and Competencies

• Strong background in semiconductor process engineering, yield analysis, and defectivity characterization.
• Proficiency in data analytics, statistical analysis, and use of inspection and inline metrology tools.
• Demonstrated ability to perform root-cause analysis and translate data insights into manufacturing improvements.
• Strong ownership mindset, problem-solving skills, and ability to collaborate effectively across modules and functions

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.

To learn more, please visit micron.com/careers

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

To request assistance with the application process and/or for reasonable accommodations, please contact [email protected]

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

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