Role Overview 

We are seeking an accomplished Principal Engineer to lead the technical architecture and evolution of our hybrid digital ecosystem. In this pivotal role, you will drive the strategic integration of multi-modal AI into our core infrastructure while architecting an omnichannel platform capable of supporting complex customer journeys. You will balance the adoption of proven third-party AI solutions (OpenAI, Anthropic) with the development of proprietary optimizations where they deliver a competitive advantage. As a technical leader, you will champion a vendor-agnostic, ethically grounded, and Privacy by Design approach to AI implementation.

Key Responsibilities

• Infrastructure Modernization: Lead the roadmap for migrating legacy data pipelines to AI-native architectures. You will design modern data orchestration solutions utilizing Apache Airflow, dbt, and Kafka to replace outdated batch processing with real-time, event-driven flows.
• AI-Native Web Transformation: Define the web infrastructure required for a high-agility ecosystem. Architect the evolution of our Headless CMS environments (AEM, Contentful) and modern frontend frameworks to enable automated page assembly and AI-driven UI components.
• Agentic Pipeline Development: Design and build autonomous pipelines that bridge the gap between design systems, automated component development, and publishing workflows.
• ML & Data Engineering Leadership: Establish standards for RAG, vector databases, and LLM orchestration. Provide architectural guidance for the seamless integration of AI capabilities across headless and omnichannel systems while ensuring consistency, performance, and security.
• Engineering Productivity: Champion the use of AI-assisted coding and engineering productivity tools such as Claude Code and Cursor to accelerate development cycles and optimize architectural decision-making.

Required Qualifications

• Experience: 8–10 years in software engineering, specializing in SaaS platform architecture and distributed systems design.
• Leadership & Advocacy: Excellence in technical diplomacy and stakeholder influence. Proven ability to translate complex AI/Data roadmaps into business value while mentoring senior teams and advocating for architectural best practices.
• Data Orchestration: Strong hands-on experience with Apache Airflow (or similar), Kafka, and dbt to support real-time AI applications.
• AI & Web Convergence: Proven expertise integrating LLMs into production web environments with a focus on agentic workflows and autonomous UI generation.
• Architectural Vision: Deep understanding of headless CMS, composable, and event-driven patterns that allow for programmatic content and UI generation.
• Modern Delivery: Experience with cloud-native technologies (AWS/GCP, Docker, Kubernetes) and a deep expertise in data privacy frameworks and AI ethics.

#LI-Hybrid

#P24079_3413893

We are hiring a Head of Chip Architecture, you will collaborate with both external partners and internal engineering teams to develop and deliver innovative, high-volume photonics products. In this role, you will define advanced chip architectures for co-packaged optics, working closely with cross-disciplinary teams to model, analyze, and optimize system performance. Success in this role requires deep domain expertise in silicon photonics, high-frequency (50+ GHz) electro-optic interfaces, lasers, optical amplifiers, fiber-optic communications, and packaging/assembly techniques. Strong analytical problem-solving, effective communication, and technical leadership are essential. You will be expected to be the primary technical liaison for key customers, partners, and internal stakeholders. You will also represent Lightmatter’s at premier industry conferences.

Join a tight-knit team where each individual’s contributions directly influence the success of the company and product. You'll have the opportunity to build a new kind of computer from the ground up and to solve groundbreaking challenges along the way. Work with people who love to build and who thrive in technically diverse environments where great ideas are prioritized.

Responsibilities: 

• Guide, coach, and mentor a team of chip architects from different domains: photonics, digital, and analog. 
• Define chip architectures for datacenter/AI compute optical interconnect demonstrations and products. 
• Lead the co-optimization of SerDes, analog front ends, and optical transceivers to achieve best-in-class performance in terms of performance, energy efficiency, and costs.
• Work with other engineering leaders to plan, set, and execute on development, tapeout, and validation timelines.
• Provide technical leadership to cross-functional engineering teams.
• Represent the architecture team in executive-level reviews, industry forums, and customer negotiations.
• Act as the primary technical liaison for key customers, partners, and stakeholders regarding our current chip’s architecture and future roadmap.
• Drive the technical selling process by clearly articulating the competitive advantages, performance metrics, and cost benefits to both technical and non-technical customers.
• Communicate complex technical concepts clearly to both technical and non-technical stakeholders.
• Partner with the Product and Sales teams to define next-generation photonic products.
• Research and evaluate emerging optical interconnect technologies, and drive technology roadmaps aligned with market trends and strategic objectives.
• Develop new IP. Publish technical findings at top journals and share our technical expertise at conferences.
• Be Lightmatter’s ambassador. 

This is not a complete listing of the responsibilities. It’s a representation of the things you will be doing 

Qualifications: 

• A Ph.D. degree in Electrical Engineering, Applied Physics, or a related field with 10+ years of relevant experience and leading teams.
• Must have managerial experience 
• Strong track record in managing teams and helping them grow and achieve at the highest level.
• Deep technical knowledge in photonic/AMS chip co-design.
• Proven success in developing, taping out, and bringing-up state-of-the-art photonic/AMS chips and system solutions.
• Proven track record of successfully taking at least two chip architectures from concept to high-volume production.
• Demonstrated experience serving as a primary technical point of contact with major external customers, partners, or vendors.
• Proven ability to translate complex technical concepts into compelling business value propositions for executive and non-technical audiences.
• Strong track record of planning and driving complex projects to completion.
• Ability to work cross-functionally with other organizations to achieve company-wide goals.
• Deep understanding of market trends and application of optical interconnects.
• Must to travel 30% of the time 

Preferred Qualifications:

• World-class technical leadership: demonstrated absolute technical and people excellence. 
• Strong track record of innovation in photonics as evidenced by patents and publications.
• Demonstrated creative problem-solving skills for problems that have no obvious solutions.
• Strong publication record and public speaking experience.
• Ability to retain and attract new talent.
• Executing R&D for product and market needs.
• Willingness to engage and learn quickly to ensure mission success. Self-starter with a “no task is too big or small” attitude.

About this Role

We're looking for a Senior Data Systems Engineer who bridges the gap between hardware domain expertise and modern data infrastructure. You won't just build pipelines — you'll work directly with foundries, OSATs, test engineers, and validation teams to understand what the data means, define how it should flow, and build the platform that makes AI-driven decisions possible across 13+ active hardware programs.

This is not a typical data engineering role. The right person has a background in semiconductor manufacturing, photonics, hardware test/validation, or a related hardware discipline — and a strong pull toward data systems, process optimization, and automation. You understand that the hardest part of a data platform isn't the code; it's knowing which data matters and why.

What You'll Do

Program Data Onboarding & Vendor Engagement

• Engage directly with foundries, OSATs, and internal engineering teams to align on data formats, delivery mechanisms, and quality standards for new programs
• Own the data onboarding lifecycle for programs ramping to High Volume Manufacturing (HVM)
• Identify gaps in data coverage across the pipeline: design, foundry, test/validation, photonics characterization, packaging/assembly, and system-level validation
• Influence external and internal teams to adopt scalable, platform-compatible data practices — this is hands-on stakeholder work, not email coordination

Data Platform Engineering

• Design, build, and maintain data pipelines that ingest, transform, and deliver hardware data from wafer-level test through system validation
• Build and maintain data models in dbt on Snowflake that serve downstream analytics, reporting, and AI/ML workflows
• Develop and operate orchestration workflows (Dagster) for reliable, observable data delivery
• Implement data quality checks, monitoring, and alerting to ensure platform reliability across production programs

Performance Metrics & Reporting

• Build performance metrics pipelines that translate raw hardware data into actionable insights for engineering and program teams
• Own stakeholder reporting and deliver training for teams onboarding to platform tools (Snowflake, Sigma, custom dashboards)
• Support AI/ML workflows by ensuring the data foundation is clean, structured, and reliable

Platform Improvement & Tooling

• Contribute to platform infrastructure: CI/CD, RBAC, cost optimization, self-service tooling
• Participate in sprint ceremonies, contribute to architectural decisions, and help shape the team's technical roadmap
• Mentor junior team members on both data engineering practices and hardware domain context

What You Bring

Required

• Bachelor’s Degree in Photonics, Data Engineering, Electrical Engineering or a related field
• 8+ years of professional experience in data engineering, process engineering, test engineering, or a related technical role in semiconductor, photonics, or hardware manufacturing
• Proficiency in Python and SQL
• Experience with Snowflake, dbt, Dagster/Airflow, or similar modern data stack components
• Experience working with data for hardware test, manufacturing, or characterization systems
• Demonstrated ability to work cross-functionally with technical teams and external partners (vendors, foundries, or OSATs) to define data requirements and influence practices
• Strong analytical thinking — you can look at a dataset and understand what it means in the physical world, not just how to transform it

Preferred

• Master’s or PhD in Physics, Electrical Engineering, Photonics, or a related field with 4+ years of experience
• Background in silicon photonics, photonic integrated circuits (PICs), or optical systems
• Experience with High Volume Manufacturing (HVM) ramps or new product introduction (NPI) data workflows
• Familiarity with semiconductor test data formats (STDF, WAT, parametric data)
• Experience building data quality frameworks or monitoring systems
• Experience with AI/ML tools applied to manufacturing or engineering data

About The Role

• Characterize and enhance the performance and reliability of advanced ML hardware/software systems, with emphasis on reducing power and thermal fluctuations.
• Analyze ML workloads, software kernels, and hardware architecture for power and performance impacts, and synthesize high-level insights across these layers.
• Develop creative software solutions to improve reliability and performance, collaborating cross-functionally to deploy these solutions in production.
• Influence the design of Cerebras' next-generation AI architecture and software stack through rigorous workload analysis and computational efficiency optimization.
• Partner with ML engineers, researchers, and reliability specialists to understand model behavior and drive system-level improvements from a software perspective.
• Collaborate with teams in architecture, silicon, and research to advance our computational platforms and influence future system designs.

• BS, MS, or PhD in Computer Science, Electrical Engineering, or a related field.
• 3+ years of relevant experience in performance engineering, reliability, computer architecture, and/or software design.
• Proficiency in Python or other scripting languages.
• Experience with C/C++ and assembly programming.
• Demonstrated expertise with system-level performance and reliability optimization.
• Strong verbal and written communication skills.
• Nice to have: Hands-on experience with ML models, ML frameworks, and collective communication.
• Nice to have: Understanding of thermal management principles and power delivery for advanced semiconductors.

Lead Package Assembly Integrator

In this role, you will work on leading-edge packaging technologies to enable AI architectures that set new industry standards for compute power, performance, and efficiency. As part of the Packaging Technology team, you will serve as the lead assembly process integrator. Your responsibilities will include developing assembly process technologies and generating assembly/test design rules for Heterogeneous Integrated co-packaged optics technologies by collaborating with design teams, silicon and photonics foundries, and OSAT partners. You will be responsible for developing test chip strategies, managing test chip design, and appropriately planning and managing design of experiments with partners. Additionally, you will work closely with package and system architects to incorporate manufacturability considerations into product definitions. The results of your work will lead to advanced package designs that meet assembly and reliability requirements, while delivering leading-edge products for data centers and the high-end compute segment.

Responsibilities: 

• Develop end-to-end 3D package assembly, test, and fiber-attach processes for Lightmatter products, ensuring robust high yields while meeting performance and reliability goals by working closely with foundry and OSAT partners.
• Develop and execute package architectures and designs, ensuring they meet rigorous product performance standards while optimizing for manufacturability and long-term reliability.
• Define test chip requirements and manage test chip design required for 3D package process development.
• Develop and validate design rules for a high-yielding assembly process. The scope includes assembly/test, backend/RDL, silicon/package interaction, substrate, thermal/mechanical solutions, fiber attach, system integration, and other related areas.
• Plan and execute design of experiments, manage data, and perform appropriate analysis to gain insights into assembly process and design interactions.
• Perform analysis to identify key reliability risks under product use conditions and drive appropriate design and materials solutions to improve product mechanical integrity.
• Summarize and communicate to key stakeholders across Lightmatter, suppliers and customers as required.
• Write reports and document methodologies.

Required Qualifications:

• MS or PhD in Mechanical Engineering, Material Science, or related engineering field.
• 10-12 years of experience in wafer scale packaging assembly process development.
• Knowledge of 2D/3D packaging technologies, materials, and equipment requirements.
• Proven ability to define requirements for test chip and assembly test vehicles.
• Understanding of photonics packaging requirements including various fiber attach methods.
• Experience with advanced packaging technologies, including thermal, mechanical, and reliability factors.

Preferred Qualifications:

• Excellent communication skills, with the ability to convey complex technical concepts to both technical and non-technical stakeholders.
• Strong project ownership, with a history of driving results independently and with minimal supervision.
• Proven track record of developing creative solutions for complex technical challenges.
• Experience in thermal and mechanical modeling and coding for data analysis.

About this Role