As an Integrated Circuit Designer, you will be part of a key team designing sophisticated advanced node CMOS products.

Key Job Duties:

• The design and development of the layout for integrated circuits according to electronics engineering principles, using software to create design schematics and diagrams. This will include [developing and verifying circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs to meet performance targets].
• The management of manufacturing process of the products, including technology yield and performance of the products.
• The development of test programmes and procedures to ensure the products meet their performance specifications. This will include [working on analog and clocking blocks for connectivity applications, using industry-standard tools like Spectre and MATLAB].
• The provision of advice on aspects of semiconductor process technology and maintain and repair semiconductor process equipment.

Basic Qualifications

• Strong academic and technical background in electrical engineering. A Master’s or PhD degree in EE is required, preferably from a top-tier university.
• 6+ years of experience supporting or developing complex analog IC designs.

Required Experience:

• Hands-on experience in designing high-speed mixed-signal circuits, including ADC/DAC data converters, RX front-end, TX driver/serializer, low-jitter PLLs, TX/RX calibration, low-jitter CLK distribution and other high-speed analog circuits is a must. 
• Have a deep understanding of biasing, band-gaps, reference circuits, opamps, comparators and other analog circuits.
•  Solid track-record for implementation of analog circuits high-speed data transmissions.
• Design and tapeout experience in advanced CMOS nodes (ex. 20nm or newer) is a must.
• Solid fundamentals in detailed transistor-level design, feedback/stability analysis, and noise/jitter analysis.
• Knowledge of TIA design and drivers for optical applications is highly desirable.
• Experience in RFIC design for wireless or wireline communication systems is highly desirable.
• Strong technical independent contributor with a proven ability to drive results.
• Excellent teamwork, presentation, and documentation skills.
• Ability to collaborate with global teams across multiple time zones and deliver under pressure with strict deadlines.
• Strong experience in lab chip bring-up and debugging efforts.

Preferred Experience:

• Relevant research publications and/or patents in analog or RF IC design.
• Familiarity in programming/scripting languages such as Python, Matlab, or C.
• Experience with PCB design.
• Familiarity with Verilog RTL or DSP design concepts.
• Knowledge of optical transceivers.
• Expertise in ESD protection techniques and IC packaging methodologies.

• The right candidate will be a self-starter who assumes full ownership of DV tasks and delivers high-quality results.
• Develop test plans at block, sub-system, and chip level.
• Execute SoC-based verification at full-chip and module level verification. Focus on Display subsystem (GPU, Display Controller), Radio Subsystem, SoC integration verification. 
• Experience in ARM or RISC-V based micro-controllers.
• Power-aware methodology (CPF/UPF).
• Write C-based lib packages and tests.
• Architect and implement scalable and reusable module test benches using SystemVerilog and UVM.
• Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.
• Automate the test environment for randomized testing and score-boarding.
• Utilize advanced debugging techniques to identify and resolve design and verification issues.
• Perform root-cause analysis and work with design teams to fix identified issues.
• Define and track functional and code coverage metrics to ensure thorough verification.
• Ensure that verification quality meets or exceeds industry standards and project requirements.
• Edge-based AI inference is preferred.

• BSEE/MSEE with 10+ years of experience (seniority depends on years of experience) in block, sub-system, and full-chip verification.
• Technologies: Experienced in ARM M/RISC-V (Preferred) SoC Verification, expert in AMBA AXI/AHB/APB, DMA, Flow Control, Serial Devices, Low Power (CPF/UPF) Verification, 3rd party IP integration verification.
• Experience in Display, Audio domains is a plus.
• Languages: Strong in SystemVerilog (UVM), Verilog, C/C++, Python, Perl, or Makefile.
• Should have delivered multiple chips functioning to specification.
• Identify and manage verification deliverables, milestones, and schedules.
• Proactively identify potential verification risks and develop mitigation strategies.
• Collaborate with design, architecture, and software teams to understand and verify design intent.
• Communicate verification progress, issues, and results to stakeholders and management.
• Strong in understanding multiple architectures, integrating 3rd party IPs/VIPs, and working with mixed-signal designs with low-power design and verification challenges.
• Strong understanding/exposure to Design Verification for low-power battery-operated designs is highly desired.
• C-based verification in an SoC environment is required.
• Experience with ARM processor-based designs and low-power design techniques is a plus.