We are looking for a Lead RTL Design Engineer to own microarchitecture definition and RTL implementation across the dataflow execution fabric, memory subsystem, on-chip interconnect/NoC, low-power logic, and standard peripheral IP (RiscV, NVM, I2S, I2C) integration. You will work from architecture spec through synthesis-ready RTL, collaborating with architects, microarchitects, DV leads, physical design, and firmware teams to tape out an industry leading power-efficient SoC.

This is a unique opportunity to be a part of a newly formed HW engineering org and have an influence on our products and processes as we move from the initial stages of product development to market release and scaled volume production.  Join our team and help us shape the future of computing at the edge and beyond!

Key Responsibilities 

• Microarchitecture definition (core focus): Own the design and definition of processor and compute-unit microarchitecture, including dataflow pipelines, execution units, and interfaces. Set performance, power, and area targets, and guide the team toward achieving them.
• On-chip interconnects and system integration: Define and drive the design of on-chip networks and data movement across the fabric, balancing performance, scalability, and implementation constraints in collaboration with physical design.
• Memory subsystem & system architecture: Define the interface to the memory subsystem, including data movement, ordering, and synchronization behavior, ensuring a clean and scalable model for software and future system expansion.
• Reconfiguration and execution model: Lead the architecture of configuration, scheduling, and execution of workloads on the fabric, including multi-kernel support and interaction with host systems.
• Power management and low-power design: Drive power architecture across the design, including clocking, reset, power domains, and low-power strategies to meet aggressive energy and efficiency goals.
• HW/SW co-design: Collaborate closely with compiler and software teams to define the hardware execution model, ensuring efficient mapping of workloads onto the architecture.

Specifications, Documentations and Reviews: Author and own uArch specification documents for assigned blocks; drive design reviews with architecture, compiler, DV, and physical design stakeholders.

• Mentoring and process improvement: Mentor senior and junior RTL engineers; review RTL, flag microarchitecture risks, and enforce coding style and lint-clean standards across the team.
• Driving PPA Metrics: Participate in PPA analysis loops: synthesize blocks regularly, review area/timing/power reports, and make data-driven tradeoffs against performance and feature requirements.
• DV Collaboration: Collaborate with DV leads to define/review verification plans; provide directed test scenarios for graph execution corner cases, back-pressure conditions, and power state transitions.
• Silicon Bring-up: Support silicon bring-up: contribute scan/ATPG guidelines, review DFT insertion, and provide RTL-level debug assistance during lab validation.

Required Qualifications & Experience

• 8+ years of RTL design experience with tape-out ownership of dataflow based design, on chip networks, memory subsystems  or peripheral integration on a processor or accelerator SoC.
• Deep proficiency in SystemVerilog for RTL — synthesis-clean, lint-clean, timing-aware; able to design complex state machines, arbiters, token flow controllers, and datapath logic from scratch.
• Solid understanding of parallel execution models: dataflow, SIMD, or systolic array architectures; familiarity with the hardware challenges of token-based firing-rule evaluation and producer-consumer synchronization.
• Hands-on experience with on-chip memory design: SRAM wrappers, scratchpad/TCM, banking, and memory-mapped register interfaces.
• Experience with low-power RTL techniques: UPF-driven flows, clock gating, power domains, retention registers, and AON wakeup logic.
• Familiarity with at least one standard on-chip bus protocol (AXI, AHB, APB, TileLink, or NoC equivalent) at the RTL implementation level.
• Experience taking RTL through synthesis and timing closure; ability to read and act on SDC constraints, STA reports, and synthesis QoR summaries.
• Strong written communication skills; able to produce uArch specs and design review material independently.
• Experience with memory compiler toolchains

Desired Qualifications & Experience Requirements 

• Prior RTL ownership of a dataflow engine, neural processing unit (NPU), or streaming DSP architecture with explicit producer-consumer token management.
• Experience collaborating with compiler or graph-optimization teams to co-design hardware execution models and graph IR representations.
• Familiarity with NVM controller RTL (MRAM, RRAM) including ECC, program/erase sequencing, and model weight storage use cases.
• Experience with IoT-class power budgets (sub-10 mW active, sub-100 µW standby) and the RTL design choices they necessitate.
• Familiarity with functional safety standards (ISO 26262, IEC 61508) as applied to execution fabric error detection and power domain isolation.
• Exposure to AI framework graph formats (ONNX, TFLite) and understanding of how graph compilation maps to hardware execution primitives.
• Tape-out credits on an edge-AI, IoT, or wearable SoC at 12nm or below.
• Experience with formal verification of flow-control logic, deadlock freedom, or bus protocol compliance.

We offer a competitive salary for this role, generally ranging from $160,000 to $250,000, along with meaningful equity and comprehensive benefits. The final compensation package will be based on your experience and location, with some flexibility to ensure we align with the right candidate.

Mission Summary:

Our Component Engineering Team in Pittsburgh is seeking a Senior Hardware Engineer for Radar Components to lead the development of next-generation radar technology powering advanced mobility systems. In this role, you’ll take ownership of radar component design from concept to production, defining requirements, selecting and managing suppliers, integrating systems, driving testing and validation, resolving issues, and ensuring production readiness. 

This is an onsite, hybrid position based in Pittsburgh, PA.

What you'll be doing:

• Lead technical supplier management, coordinating technical activities and project milestones across internal and external stakeholders.
• Compile, define, and maintain complete sets of requirements for radar components.
• Collaborate cross-functionally with Perception, Systems, Mechanical, Vehicle, Manufacturing, Quality, Software, Cybersecurity, Diagnostics, and Reliability teams.
• Develop and support testing for ML-based algorithms, including test design, planning, execution, and data collection.
• Lead radar acceptance, performance, and characterization testing to ensure robust system performance.
• Support and drive vehicle integration efforts for radar systems.
• Conduct root cause analysis and oversee issue resolution to maintain quality and reliability.
• Lead continuous improvement projects focused on radar components and processes.

What we're looking for:

• Deep understanding of radar hardware, radar DSP, and radar testing and performance.
• Proven experience developing automotive radar components and radar system design.
• 5+ years of experience in the automotive or a related industry.
• Experience with multi-domain controllers, secure gateways, or ADAS controller development.
• Comfortable debugging, disassembling, modifying, and installing electrical and mechanical systems in vehicles.
• Strong ability to operate within rigid design, integration, and time constraints.
• Basic knowledge of vehicle electrical and networking systems (CAN, LIN, Ethernet, etc.).
• Strong communication skills with the ability to collaborate globally across teams and levels to drive project success.
• Self-motivated, organized, and flexible individual with the ability to balance and prioritize multiple diverse projects.
• Creative and resourceful problem-solver who ensures quality results independently and in teams.
• Hands-on vehicle integration experience, including wiring harnesses and packaging, is preferred.
• Bachelor’s degree in Engineering (STEM) or a related field.

This position may require the use of power tools, as defined by OSHA (electric, pneumatic, liquid fuel, hydraulic, or powder-actuated tools). While performing job duties, employees may be required to convey and detect communication, remain stationary for up to 50% of the time, move within designated areas, and operate office equipment. The role may occasionally involve moving objects up to 50 pounds.

Latitude AI develops automated driving technologies, including L3, for Ford vehicles at scale. We’re driven by the opportunity to reimagine what it’s like to drive and make travel safer, less stressful, and more enjoyable for everyone.

When you join the Latitude team, you’ll work alongside leading experts across machine learning and robotics, cloud platforms, mapping, sensors and compute systems, test operations, systems and safety engineering – all dedicated to making a real, positive impact on the driving experience for millions of people. 

As a Ford Motor Company subsidiary, we operate independently to develop automated driving technology at the speed of a technology startup. Latitude is headquartered in Pittsburgh with engineering centers in Dearborn, Mich., and Palo Alto, Calif.

Meet the team:

The Bench Technician Associate will provide installation, upgrade, and engineering change requirements of all components including hardware and software. You will also be responsible for advanced diagnostic and triage support, technology expertise and end of line (EOL) commissioning support for the daily operation of the bench fleet. The role will perform independent project tasks and collaborate with a cross-functional team of internal and external customers and teammates.

This contract will be 1 year in length.

What you’ll do: 

• Diagnose in-depth physical and operational electronic and assembly issues using supplied and created hardware and software combinations
• Communicate with cross functioning teams on advanced architecture, sensor and compute control systems
• Follow provided work instructions such as tech papers, schematics, 2D and 3D prints, cut sheets, sample harnesses
• Assemble, modify, and repair wiring harnesses from schematics, using hand tools and proper assembly and rework techniques
• Validate signal path, network functionality, configuration management and scheduling mechanisms are functional across various sites and platforms
• Work individually or in small teams to complete daily triage and engineering requirements
• Document configuration management, diagnostic and triage events and bench health using various systems and automated tools
• Track inventory of project parts and supplies
• Maintain clean and organized workspace

What you'll need to succeed:

• Extensive knowledge of computer hardware, server rack installation and wire management techniques
• High School Diploma or GED equivalent with two years of employment experience required. Associate or Bachelor’s Degree preferred
• Able to create, modify, and install wiring systems and harnesses
• Effective written and verbal communication skills
• Knowledge of Google suite including Sheets, Docs and Slides
• Expect to potentially travel up to 20% of the time for trainings and/or team meetings
• Experience in a professional work environment where safety, honesty, procedure and/or software testing are emphasized
• Strong interest in technology and software and the ability to adapt to its ever-changing developments and improvements
• Ability to work in close quarters in a professional manner for extended periods of time
• Ability to work independently or with minimal supervision

Nice to have:

• Associate or Bachelor’s Degree in Engineering Technology or similar
• Experience with flashing and re-flashing automotive control modules and CAN (Controller Area Network) bus operation
• Familiar with the use of oscilloscope or picoscope
• Basic knowledge of networking technology and troubleshooting

Learn more about Latitude’s team, mission and career opportunities at lat.ai!

We are an Equal Opportunity Employer committed to a culturally diverse workforce. All qualified applicants will receive consideration for employment without regard to race, religion, color, age, sex, national origin, sexual orientation, gender identity, disability status or protected veteran status.