Verilog Jobs in Los Angeles.
All active Verilog roles based in Los Angeles.
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Senior Mixed-Signal Behavioral Modeling Engineer
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K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and others – with an additional $500M in signed contracts across commercial and US government customers – we’re mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.
The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today’s and tomorrow’s massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.
With multiple launches planned through 2026 and 2027, we're Building Bigger to develop the solar system and become a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a groundbreaking Series C space startup, we’d love for you to apply.
The Role
We are seeking a Senior Mixed-Signal Behavioral Modeling Engineer to own the creation of behavioral modeling and drive mixed-signal verification methodology from the ground up. You will be part of a collaborative design team developing state-of-the-art mixed-signal SoCs to be hosted on some of the largest, most powerful, rapidly designed and rapidly manufactured satellites ever deployed in space. Your work will directly influence top-level integration and silicon tapeout success. This is a high-impact, technical role with significant ownership across modeling, methodology, verification, and cross-functional alignment with RF, analog, and digital teams.
Responsibilities
- Develop high-level behavioral models for analog and mixed-signal IP (ADCs, DACs, PLLs, LDOs, RF front-end blocks, biasing, amplifiers, etc.).
- Create abstracted models using Verilog, Verilog-AMS, or SystemVerilog.
- Develop regression infrastructure and mixed-signal testbenches enabling co-simulation (digital + analog).
- Integrate AMS models into digital verification environments (UVM-based).
- Define and build the mixed-signal verification methodology for top-level SoC and subsystem verification.
- Support architectural exploration through early-phase modeling and system-level simulations.
- Collaborate with analog/RF designers to capture real-world analog behaviors and map them into accurate behavioral abstractions.
- Work with digital and verification teams to ensure seamless integration of AMS models.
- Provide modeling and verification insights during architectural reviews, PDR/CDR, and silicon bring-up.
- Act as technical leader and subject-matter expert.
Required Qualifications
- M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or related field.
- 5+ years of experience in analog/mixed-signal modeling and/or AMS verification.
- Hands-on experience with SystemVerilog, Verilog-AMS, wreal/RNM, or equivalent modeling languages.
- Strong understanding of analog/mixed-signal circuits (PLLs, LDOs, ADC/DACs, RF/IF paths, clocking, amplifiers).
- Experience with mixed-signal co-simulation environments (Cadence AMS Designer, Synopsys VCS AMS, or similar).
Preferred Qualifications
- Experience building AMS verification methodologies from scratch.
- Familiarity with UVM-based verification and digital design flows.
- Knowledge of signal processing theory, RF system modeling, or communication systems.
- Experience with MATLAB/Simulink, Python modeling, or SystemC AMS for high-level architectural modeling.
- Experience working in cross-functional, geographically distributed teams.
Compensation and Benefits:
- Base salary range for this role is $160,000 – $230,000 + equity in the company
- Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
- Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks
If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged!
If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know.
Export Compliance
As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.”
The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.
Equal Opportunity
K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
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FPGA Engineer (Mid-Career)
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CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.
CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com.
Role Overview:
CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.
Responsibilities:
- Design and implement complex FPGA designs targeting our next-generation sensor products
- Support system integration of FPGA designs with complex software systems
- Support deployed FPGA capabilities in the hands of our U.S. and international customers
- Work full-time on-site in our office in Hawthorne, California
Minimum Requirements:
- Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
- 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
- Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
- Extensive experience developing in Verilog and SystemVerilog
- Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
- Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
- Experience with Network Protocols (TCP/UDP/IP)
- Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
- Experience using Bash and Python for scripting and testing
- Experience modifying software drivers and applications when needed to validate FPGA designs
- Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
- Ability to work with minimal supervision and collaborate on small teams
- U.S. Person status is required as this position will require the ability to access U.S.-only data systems
Preferred Requirements:
- Experience designing and implementing highly performant baseband signal processing in an FPGA
- Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
- Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
- Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
- Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
- Experience with Analog Device Transceivers
- Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
- Experience with Time Synchronization technologies (NTP / PTP)
- Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)
- Experience with VHDL
- Experience with high-speed, multi-layer, digital printed circuit board (PCB) design
- Current or previous DoD security clearance
- Experience with GPUs and/or AI engines
- Experience with git
- Experience with Bitbucket CI, Jenkins or similar CI/CD flows
- Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc)
Why CHAOS?
- Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
- Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
- Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
- Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
- Team Growth: 200 employees and counting across 5 global offices
The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.
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Ready to apply?
Apply to CHAOS Industries
FPGA Engineer
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CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.
CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com.
Role Overview:
CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.
Responsibilities:
- Design and implement complex FPGA designs targeting our next-generation sensor products
- Support system integration of FPGA designs with complex software systems
- Support deployed FPGA capabilities in the hands of our U.S. and international customers
- Work full-time on-site in our office in Hawthorne, California
Minimum Requirements:
- Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
- 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
- Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
- Extensive experience developing in Verilog and SystemVerilog
- Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
- Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
- Experience with Network Protocols (TCP/UDP/IP)
- Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
- Experience using Bash and Python for scripting and testing
- Experience modifying software drivers and applications when needed to validate FPGA designs
- Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
- Ability to work with minimal supervision and collaborate on small teams
- U.S. Person status is required as this position will require the ability to access U.S.-only data systems
Preferred Requirements:
- Experience designing and implementing highly performant baseband signal processing in an FPGA
- Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
- Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
- Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
- Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
- Experience with Analog Device Transceivers
- Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
- Experience with Time Synchronization technologies (NTP / PTP)
- Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)
- Experience with VHDL
- Experience with high-speed, multi-layer, digital printed circuit board (PCB) design
- Current or previous DoD security clearance
- Experience with GPUs and/or AI engines
- Experience with git
- Experience with Bitbucket CI, Jenkins or similar CI/CD flows
- Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc)
Why CHAOS?
- Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
- Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
- Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
- Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
- Team Growth: 200 employees and counting across 5 global offices
The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.
#LI-onsite
Ready to apply?
Apply to CHAOS Industries
Embedded SW/Firmware Design Engineer
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CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.
CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com.
Role Overview:
CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.
Responsibilities:
- Design and implement complex FPGA designs targeting our next-generation sensor products
- Support system integration of FPGA designs with complex software systems
- Support deployed FPGA capabilities in the hands of our U.S. and international customers
- Work full-time on-site in our office in Hawthorne, California
Minimum Requirements:
- Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
- 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
- Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
- Extensive experience developing in Verilog and SystemVerilog
- Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
- Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
- Experience with Network Protocols (TCP/UDP/IP)
- Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
- Experience using Bash and Python for scripting and testing
- Experience modifying software drivers and applications when needed to validate FPGA designs
- Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
- Ability to work with minimal supervision and collaborate on small teams
- U.S. Person status is required as this position will require the ability to access U.S.-only data systems
Preferred Requirements:
- Experience designing and implementing highly performant baseband signal processing in an FPGA
- Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
- Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
- Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
- Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
- Experience with Analog Device Transceivers
- Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
- Experience with Time Synchronization technologies (NTP / PTP)
- Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)
- Experience with VHDL
- Experience with high-speed, multi-layer, digital printed circuit board (PCB) design
- Current or previous DoD security clearance
- Experience with GPUs and/or AI engines
- Experience with git
- Experience with Bitbucket CI, Jenkins or similar CI/CD flows
- Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc)
Why CHAOS?
- Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
- Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
- Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
- Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
- Team Growth: 200 employees and counting across 5 global offices
The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.
#LI-onsite
Ready to apply?
Apply to CHAOS Industries
Senior FPGA Engineer
Share this job
CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.
CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com.
Role Overview:
CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.
Responsibilities:
- Design and implement complex FPGA designs targeting our next-generation sensor products
- Support system integration of FPGA designs with complex software systems
- Support deployed FPGA capabilities in the hands of our U.S. and international customers
- Work full-time on-site in our office in Hawthorne, California
Minimum Requirements:
- Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
- 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
- Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
- Extensive experience developing in Verilog and SystemVerilog
- Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
- Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
- Experience with Network Protocols (TCP/UDP/IP)
- Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
- Experience using Bash and Python for scripting and testing
- Experience modifying software drivers and applications when needed to validate FPGA designs
- Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
- Ability to work with minimal supervision and collaborate on small teams
- U.S. Person status is required as this position will require the ability to access U.S.-only data systems
Preferred Requirements:
- Experience designing and implementing highly performant baseband signal processing in an FPGA
- Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
- Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
- Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
- Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
- Experience with Analog Device Transceivers
- Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
- Experience with Time Synchronization technologies (NTP / PTP)
- Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)
- Experience with VHDL
- Experience with high-speed, multi-layer, digital printed circuit board (PCB) design
- Current or previous DoD security clearance
- Experience with GPUs and/or AI engines
- Experience with git
- Experience with Bitbucket CI, Jenkins or similar CI/CD flows
- Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc)
Why CHAOS?
- Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
- Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
- Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
- Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
- Team Growth: 200 employees and counting across 5 global offices
The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.
#LI-onsite
Ready to apply?
Apply to CHAOS Industries
Firmware Engineer
Share this job
CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.
CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com.
Role Overview:
CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.
Responsibilities:
- Design and implement complex FPGA designs targeting our next-generation sensor products
- Support system integration of FPGA designs with complex software systems
- Support deployed FPGA capabilities in the hands of our U.S. and international customers
- Work full-time on-site in our office in Hawthorne, California
Minimum Requirements:
- Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
- 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
- Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
- Extensive experience developing in Verilog and SystemVerilog
- Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
- Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
- Experience with Network Protocols (TCP/UDP/IP)
- Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
- Experience using Bash and Python for scripting and testing
- Experience modifying software drivers and applications when needed to validate FPGA designs
- Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
- Ability to work with minimal supervision and collaborate on small teams
- U.S. Person status is required as this position will require the ability to access U.S.-only data systems
Preferred Requirements:
- Experience designing and implementing highly performant baseband signal processing in an FPGA
- Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
- Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
- Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
- Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
- Experience with Analog Device Transceivers
- Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
- Experience with Time Synchronization technologies (NTP / PTP)
- Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)
- Experience with VHDL
- Experience with high-speed, multi-layer, digital printed circuit board (PCB) design
- Current or previous DoD security clearance
- Experience with GPUs and/or AI engines
- Experience with git
- Experience with Bitbucket CI, Jenkins or similar CI/CD flows
- Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc)
Why CHAOS?
- Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
- Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
- Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
- Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
- Team Growth: 200 employees and counting across 5 global offices
The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.
#LI-onsite
Ready to apply?
Apply to CHAOS Industries
Digital Design Engineer
Share this job
CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time.
CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit www.chaosinc.com.
Role Overview:
CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families.
Responsibilities:
- Design and implement complex FPGA designs targeting our next-generation sensor products
- Support system integration of FPGA designs with complex software systems
- Support deployed FPGA capabilities in the hands of our U.S. and international customers
- Work full-time on-site in our office in Hawthorne, California
Minimum Requirements:
- Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree
- 5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs
- Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration
- Extensive experience developing in Verilog and SystemVerilog
- Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)
- Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)
- Experience with Network Protocols (TCP/UDP/IP)
- Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)
- Experience using Bash and Python for scripting and testing
- Experience modifying software drivers and applications when needed to validate FPGA designs
- Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies
- Ability to work with minimal supervision and collaborate on small teams
- U.S. Person status is required as this position will require the ability to access U.S.-only data systems
Preferred Requirements:
- Experience designing and implementing highly performant baseband signal processing in an FPGA
- Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations
- Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs
- Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)
- Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)
- Experience with Analog Device Transceivers
- Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)
- Experience with Time Synchronization technologies (NTP / PTP)
- Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)
- Experience with VHDL
- Experience with high-speed, multi-layer, digital printed circuit board (PCB) design
- Current or previous DoD security clearance
- Experience with GPUs and/or AI engines
- Experience with git
- Experience with Bitbucket CI, Jenkins or similar CI/CD flows
- Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc)
Why CHAOS?
- Health Benefits: Medical, dental, and vision benefits 100% paid for by the company
- Additional benefits: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more
- Our Perks: Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code
- Compensation Components: Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses
- Team Growth: 200 employees and counting across 5 global offices
The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations.
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Principal FPGA / RTL Design Engineer - Signal Processing
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THE COMPANY
Silvus Technologies, a leading provider of advanced MANET and MIMO communications systems, is reshaping mesh network technology for mission-critical applications – on the ground, in the air, and at sea. Its battle-proven StreamCaster family of MANET radios and proprietary MN-MIMO waveform provides the vital communications link for defense, law enforcement, and public safety agencies around the world, and in the toughest operational environments.
With deep roots in DARPA research, Silvus Technologies develops world-class advanced communications technologies that are reshaping the tactical communications landscape. From pure line-of-sight to extreme non-line-of-sight, Silvus radios form a self-healing, self-forming mesh network, enabling secure and reliable connectivity, including video and high-bandwidth data
Silvus Technologies is a wholly owned subsidiary of Motorola Solutions, Inc.
Would you like to join an incredibly talented group of people, doing very challenging work, with the prime directive of “Keeping Our Heroes Connected”?
THE OPPORTUNITY
Silvus is seeking a Principal FPGA / RTL Design Engineer- Signal Processing who will report to the Director of FPGA Engineering on the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products. In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D. These are exciting projects aimed at addressing challenging real-world communication needs.
This Principal FPGA / RTL Design Engineer position is based at Silvus headquarters in the heart of vibrant West Los Angeles, CA and is on a hybrid schedule. A minimum of 3 days onsite per week is expected. On-site days are Mondays, Wednesdays, and Thursdays.
The following is a list of at least some of the current essential job functions of the position. Management may assign or reassign duties and responsibilities at any time at its discretion.
ROLE AND RESPONSIBILITIES
- Working with system engineers and digital design architecting for wireless communication projects, including fixed point design of signal processing blocks.
- RTL coding, simulation, and test bench development.
- FPGA synthesis and timing closure.
- Hardware verification and troubleshooting; familiarity with logic analyzers.
- Provide support to the RF and Software Engineering Teams.
REQUIRED QUALIFICATIONS
- Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields.
- Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience in RTL design and FPGA implementation with an advanced degree (MS or PhD) in Electrical Engineering, Computer Science, or related fields.
- Demonstrated experience with fixed point binary arithmetic and digital signal processing (DSP) designs.
- Deep knowledge of RTL design fundamentals using Verilog and System-Verilog.
- Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain and/or high-utilization FPGA designs.
- Experience with Xilinx FPGAs, SoCs, and the Vivado IDE
- Must be U.S. Person (U.S. Citizen, or Permanent Resident) due to clients under U.S. federal contracts
- All employment is contingent upon the successful clearance of a background check.
PREFERRED KNOWLEDGE, SKILLS, AND ABILITIES
- MS. or Ph.D. degree in Electrical Engineering, Computer Science, or relevant fields.
- Basic MATLAB skills.
- Solid knowledge and understanding of scripting languages such as Perl and Python.
- Strong communication and presentation skills.
- Experience with wireless communication systems on FPGA or ASIC designs.
WORKING CONDITIONS & PHYSICAL REQUIREMENTS
- Office environment.
- Occasional exposure to heat, cold, and allergens while performing tests or demonstrations in the field.
- While performing the duties of this job, the employee is required to do the following:
- Lift equipment up to 20 lbs. for the set-up of demonstrations and testing.
- Perform bending and reaching movements to place items on lower and higher shelves.
- Kneeling or squatting to access lower shelves.
- Walking/Moving in the labs
COMPENSATION
The pay range is NOT a guarantee. It is based on market research and peer data, and will vary depending on the candidate’s experience and qualifications.
NOTE - As a US Federal Contractor, Silvus Technologies requires that ALL candidates being considered for employment for any position (regardless of level) MUST be a U.S. Person (permanent resident or citizen). Stricter U.S. Citizen ONLY requirements (needed for some Engineering or R&D roles) will be included in the Required Qualifications section of the posted position. This does NOT apply to international positions; only job postings for positions located in the US.
All employment is contingent upon the successful clearance of a background check and drug test.
Silvus is proud to be an equal opportunity employer, and we value diversity. We do not discriminate on the basis of race, color, age, religion or belief, ancestry, national origin, sex (including pregnancy), sexual orientation, gender identity and/or expression, marital, civil union or domestic partnership status, physical or mental disability, protected veteran status, genetic information, political affiliation, or any other factor protected by applicable federal, state, or local laws.
We will ensure that individuals with disabilities are provided with reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive benefits and privileges of employment. Please contact us to request accommodation.
*Silvus does not accept unsolicited resumes from individual recruiters or third-party recruiting agencies in response to job postings. No fee will be paid to third parties who submit unsolicited candidates directly to Silvus Technologies.
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