Companies Weekday AI Custom layout Engineer

About the role

Weekday AI

This role is for one of the Weekday's clients

Salary range: Rs 200000 - Rs 1800000 (ie INR 2-18 LPA)

Experience: 4+ yrs

Location: Hyderabad

Job Type: full-time

We are looking for a highly skilled Custom Layout Engineer with strong expertise in analog and mixed-signal layout design to contribute to the development of advanced semiconductor products. In this role, you will be responsible for creating high-quality custom layouts for complex analog, mixed-signal, and custom digital circuits while ensuring compliance with design specifications, process requirements, and quality standards.

You will work closely with circuit designers, verification engineers, and cross-functional teams to transform schematics into optimized physical layouts that meet performance, area, power, reliability, and manufacturability goals. This position is ideal for professionals who are passionate about physical design, layout optimization, and solving challenging semiconductor design problems in a fast-paced engineering environment.

The role offers the opportunity to work on cutting-edge technologies, contribute to full-chip and block-level layout development, and play a critical role in delivering high-performance silicon products.

Requirements

Key Responsibilities

  • Develop and implement custom analog and mixed-signal layouts using Cadence Virtuoso.
  • Create transistor-level layouts for analog, RF, memory, and custom digital circuit blocks.
  • Perform floorplanning, device placement, routing, matching, shielding, and layout optimization to meet performance targets.
  • Ensure layouts comply with foundry design rules, process requirements, and reliability guidelines.
  • Conduct and resolve DRC (Design Rule Check)LVS (Layout Versus Schematic), and physical verification issues.
  • Work with schematic designers to understand circuit requirements and implement efficient layout solutions.
  • Optimize layouts for area, performance, yield, power consumption, and manufacturability.
  • Execute parasitic-aware layout techniques and support extraction and post-layout verification activities.
  • Collaborate with design, verification, and technology teams throughout the design lifecycle.
  • Maintain design documentation, layout methodologies, and best practices.
  • Support tape-out activities and contribute to continuous process improvements.
  • Review layouts, provide technical feedback, and ensure adherence to quality standards.

What Makes You a Great Fit

  • 4+ years of hands-on experience in custom analog layout design.
  • Strong proficiency in Cadence Virtuoso and custom layout methodologies.
  • Solid understanding of analog layout concepts including matching, symmetry, common-centroid structures, shielding, guard rings, and parasitic minimization.
  • Experience working with advanced process technologies and semiconductor design flows.
  • Strong knowledge of DRCLVS, and physical verification methodologies.
  • Familiarity with VXL, layout verification tools, and debugging physical design issues.
  • Good understanding of semiconductor device physics and fabrication processes.
  • Ability to interpret schematics and convert them into optimized physical layouts.
  • Experience working on analog, mixed-signal, RF, memory, or custom digital blocks.
  • Strong analytical and problem-solving skills with attention to detail.
  • Ability to work independently while collaborating effectively with multidisciplinary engineering teams.
  • Excellent communication skills and a commitment to delivering high-quality layout solutions within project timelines.
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