Project Role : Static Timing Analysis Engineer
Project Role Description : Analyze and verify the timing of digital circuits to ensure they meet performance requirements under various operating conditions. Identify critical timing paths, perform timing optimizations, and resolve setup/hold violations to ensure the design functions correctly at the desired clock speeds. Collaborate with design and verification teams to refine timing models and improve circuit performance.
Must have skills : Static Timing Analysis (STA)
Good to have skills : NA
Minimum 5 year(s) of experience is required
Educational Qualification : 15 years full time education

Summary:
As a Static Timing Analysis Engineer, a typical day involves thoroughly examining and validating the timing characteristics of digital circuits to confirm they satisfy performance criteria across different operating scenarios. This role requires identifying the most critical timing paths within the design, optimizing timing parameters, and addressing any setup or hold timing violations to guarantee the circuit operates reliably at the intended clock frequencies. The engineer works closely with design and verification teams to enhance timing models and contribute to the overall improvement of circuit performance, ensuring the final product meets stringent timing requirements.

Roles & Responsibilities:
- Expected to be an SME, collaborate and manage the team to perform.
- Responsible for team decisions.
- Engage with multiple teams and contribute on key decisions.
- Provide solutions to problems for their immediate team and across multiple teams.
- Lead efforts to identify and resolve complex timing issues impacting project milestones.
- Facilitate knowledge sharing and mentoring within the team to build technical expertise.
- Coordinate cross-functional discussions to align timing analysis strategies with project goals.

Professional & Technical Skills:
- Must To Have Skills: Proficiency in Static Timing Analysis (STA).
- Strong understanding of timing verification methodologies and tools used in digital circuit design.
- Experience in identifying and optimizing critical timing paths to enhance circuit performance.
- Ability to analyze setup and hold violations and implement corrective measures effectively.
- Familiarity with collaboration techniques to work efficiently with design and verification teams.
- Skilled in interpreting timing reports and providing actionable feedback to improve design robustness.

Additional Information:
- The candidate should have minimum 5 years of experience in Static Timing Analysis (STA).
- This position is based at our BDC6F - SEZ office.
- A 15 years full time education is required.

15 years full time education

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