• Define and own the silicon product roadmap, from near-term tape-out requirements to multi-generation platform strategy, based on customer requirements, competitive positioning, and architectural opportunity.
• Translate customer needs, market dynamics, and competitive insight into clear product specifications.
• Own the Market Requirements Document (MRD) process.with tradeoffs and ownership explicitly documented.
• Partner with engineering to define performance targets, power envelopes, memory architecture, interface requirements, and feature prioritization for each product generation.
• Lead customer discovery and requirements-gathering for silicon and IP capabilities.
• Represent Efficient's silicon in technical customer discussions, evaluation engagements, and design-win conversations.
• Drive alignment between product requirements and engineering execution priorities. Own the cross-functional product review process and ensure tradeoff decisions are made explicitly, documented, and communicated as well as provide clear product direction when tradeoff decisions are required.
• Partner with the Software PM on hardware-software co-design requirements and ensure silicon and IP roadmap decisions support a usable and scalable developer experience
• Own competitive analysis, benchmarking strategy, and product differentiation narrative.
• Define platform requirements, including silicon, development systems, evaluation kits and reference designs, to enable customer adoption and successful deployment.

• 7+ years of experience in semiconductor product management, silicon architecture, or related technical leadership roles with direct ownership of product requirements, roadmap, and customer engagements
• Experience managing at least one full silicon product cycle from requirements definition through customer sampling, including spec ownership and tradeoff decisions
• Working knowledge of SoC architecture concepts: memory hierarchy, power domains, on-chip interconnects, compute accelerators, and interface standards, etc. sufficient to engage substantively with engineering teams
• Direct customer engagement experience: translating customer application requirements and deployment constraints into concrete silicon and IP product requirements
• Strong cross-functional leadership across architecture, design, verification, software, and applications teams, with the ability to drive alignment and make decisions without always having formal authority
• Ability to establish credibility with silicon architects, hardware engineers, and technically sophisticated customers through clear thinking, genuine technical depth, and accurate product judgment

• Experience with MCUs, embedded AI processors, DSPs, FPGAs, spatial computing architectures, or dataflow accelerators
• Experience in a startup environment with high ownership, incomplete information, and rapidly evolving product requirements
• Familiarity with embedded AI deployment workloads and edge inference application requirements, including power budgets, latency targets, and memory constraints
• Experience with silicon benchmarking methodology and competitive analysis in the edge AI or embedded compute space
• Experience with compiler-hardware co-design or hardware-software interface definition for novel compute architectures

We offer a competitive salary for this role, generally ranging from $180,000 to $210,000, along with meaningful equity and comprehensive benefits. The final compensation package will be based on your experience and location, with some flexibility to ensure we align with the right candidate.