Job Details:

Job Description: 

Join us to help build the next generation of AI hardware solutions.

You will be part of a highly skilled team developing cutting-edge silicon for GenAI workloads, where we push the boundaries of what silicon can do.

We are building this team from scratch within Intel, giving engineers the opportunity to shape both the technology and the way we operate, scale, and execute.

With a startup-like culture, we move fast, empower ownership, and deliver meaningful technical and business impact. Because the team is small, you will see the full picture - from the LLM algorithms and model behavior driving our architecture, down to the smallest design details.

AI is embedded in our development process, from architecture and design to verification and debug, and we expect and encourage engineers to continuously advance how these tools are used.

As a Senior Logic Design Engineer, you will set the direction for microarchitecture and RTL across complex AI-focused IPs and subsystems, make the architectural trade-offs that matter, and raise the bar for design quality across the team.

We are fast adopters of state-of-the-art AI tools and weave AI assistants and automation into every stage of the chip development flow, from exploration and specification through RTL, debug, and bring-up. We expect our senior engineers not only to use these tools, but to help shape how they are applied. If you are excited by solving open-ended problems and want broad scope, short feedback loops, and the opportunity to grow alongside great people, you'll thrive here.

Responsibilities:

• Own microarchitecture definition and RTL design (Verilog/SystemVerilog) for complex AI acceleration IPs and subsystems, from concept to silicon.
• Drive key architectural and microarchitectural trade-offs (performance, power, area, timing, and design complexity) and align them with system-level goals.

• Provide technical leadership and mentorship to other designers, set design conventions and quality standards, and review RTL and microarchitecture across the team.
• Champion and advance the team's use of AI tools in the design flow, identifying where they create real leverage and helping the team adopt them effectively.
• Partner closely with architects, verification, DFT, and physical design teams to take blocks through integration, timing closure, and bring-up.
• Lead pre-silicon debug and root-cause analysis, and drive issues through to resolution.

Qualifications:

• B.Sc. in Electrical Engineering, Computer Engineering, or equivalent.
• 6+ years of hands-on logic design experience, with a strong track record of delivering complex RTL/microarchitecture to silicon.
• Strong orientation and hands-on experience with AI-assisted engineering tools, or a strong interest in applying AI to improve hardware development workflows.

  
  Advantage:

• Experience designing accelerators, Datapath, or compute-heavy IPs for AI/ML.
• Understanding of deep learning or LLM workloads and how they map to hardware.
• Familiarity with the full development cycle, including verification, DFT, and physical design considerations.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (Israel)

Primary Location: 

Israel, Haifa

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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