About this Software Engineer II: Hardware Job Scheduler R&D role at Cadence Design Systems
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence Design Systems Inc. is looking for a motivated Software Engineer II: Hardware Job Scheduler R&D to work with us in Belo Horizonte, Brazil. Cadence is de-facto leader in Semiconductor verification, implementation, Design and Verification IP, analog simulation, timing closure. Palladium is industry leading Emulation platform based on our proprietary hardware. Extensive runtime features for optimal use of Palladium boards, debugging hardware by trigger, dynamic waveform dump, and full vision wave dump are unique in emulation market. Conceptually Palladium is a supercomputer using up to multi thousands of processors to emulate hardware designs. This platform is used for debugging complex and large hardware designs and system on a chip.
The Software Engineer II: Hardware Job Scheduler R&D will be joining the R&D team responsible for Cadence Hardware Job Scheduler product, including product coding, validation, and requirement analysis.
Job Description:
- Feature design and development in C++/Python: Writes code to specifications based on objectives and works within parameters provided; makes recommendations for improvements
- Customer issues troubleshooting and bug fixing
- DevOps activities (build, release, deployment), product validation and documentation.
Requirements:
- Complete Bachelor’s in computer science or electrical engineering and a minimum of 2years of related experience;
- Good knowledge in Python (v3.10+) and C++
- Experience with Linux OS
- Knowledge with git, perforce and others
- Experience with scripting languages (bash, tcl)
- Willingness to learn and tackle challenges, analytical skills
- Verbal and written communication in English and Portuguese
Nice to have:
- Performance profiling tools (py-spy or similar)
- Experience in debugging trace logs from live applications
- Familiarity with one of DRM or job scheduling tools: LSF, NC, SLURM
- Other language and advanced development proven experience, e.g., distributed systems, multithreading, service and REST API development
- Background w/ Verilog/VHDL with proven experience prototyping in FPGA
Additional Job Details:
- Employment category: CLT
- Employment term: 40 hours/week.
- Competitive benefits.
- Location: Av Contorno 5800, Belo Horizonte, Minas Gerais Brazil.
Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://www.cadence.com
