Job title

Senior DFT Engineer

Job description

We are looking for a person ready to take up the challenge of working in a high-profile project where we design and integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better.

In this role, you will be responsible for DFT implementation using industry standard tools for high-speed CPU core design. 

Your responsibilities

Integrate and verify test features in digital designs for effective manufacturing testing and silicon debug. Key responsibilities include:

• Building entire chip-level DFT strategies
• Inserting DFTs, including scan chains, memory BIST, and JTAG
• Collaborating with RTL, physical design, and verification teams for testability throughout the design flow
• Scripting and automating DFT flows using industry-standard EDA tools (e.g., Cadence, Synopsys, Siemens)
• Running and analyzing ATPG and fault coverage reports
• Supporting silicon bring-up and debug related to test features
• Knowledge of advanced silicon technologies and methodologies for test coverage optimization
• Experience with formal verification and signoff of inserted DFT logic
• Strong communication and collaboration skills for cross-functional teamwork

Experience and qualifications

• Bachelor, Master or PhD degree in electrical, computer engineering or computer science.
• At least 10 years of relevant industry experience.
• Experience with DFT standard tools (e.g. Synopsys/Siemens), scripting languages (e.g., TCL, Python) is required.
• Experience with DFT planning, debug silicon by making SOC
• Willingness to work with others in a highly complex decision space.
• Skills at developing an DFT plan, monitoring key indicators and communicating resource needs, as well as scoping risk to deliver value on schedule.
• Excellent verbal and written communication in English, and collaboration skills.

Nice to have

• Fluency in Japanese.
• Japanese work visa.

We are looking for a senior physical design engineer to join Tenstorrent’s AIDC Yayoi project, driving chiplet-level and chip-top physical implementation of high-performance CPU-based SoCs in a cutting-edge system-in-package environment.

This role is hybrid, based out of Tokyo, Japan.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• You have a Bachelor’s, Master’s, or PhD in electrical engineering, computer engineering, or computer science, with extensive experience (typically 10+ years) in SoC/ASIC/GPU/CPU physical design on taped-out designs.
• You are highly skilled with industry-standard tools (e.g., Synopsys/Cadence) and physical verification, and comfortable scripting in TCL and at least one other language (e.g., Python).
• You are a strong collaborator who can guide and mentor junior engineers, communicate clearly with global stakeholders, and navigate complex technical trade-offs to drive designs to closure.
• You are organized and data-driven, able to build implementation plans, monitor PPA and schedule metrics, communicate resource needs, and proactively identify and manage risks.

What We Need

• Lead chiplet and chip-top implementation for a high-profile, multi-chiplet System-in-Package project and place and route for high-speed CPU core designs in advanced nodes (5nm and below).
• Own chip-top floorplanning and integration: BUS and fabric planning, bump and IO placement, and hierarchical top/bottom floorplanning to achieve timing and PPA closure at chip level.
• Drive full physical verification and convergence, electrical rules, DRC/LVS, noise, and electromigration checks
• Take ownership of chip-level synthesis, BUS and bump planning, SoC floorplanning, and chip-top PV and EMIR, while providing technical leadership and mentoring to junior team members.

What You Will Learn

• Deep expertise in system-in-package design and multi-chiplet integration, working hands-on project with complex chip-top interfaces and constraints.
• Best practices for high-frequency, advanced-node (5nm and below) CPU design implementation, including cutting-edge timing closure, EMIR, and sign-off methodologies.
• How to operate in a highly collaborative global environment, partnering daily with Tenstorrent experts and leaders across Japan, the USA, and other regions, as well as external stakeholders.
• Advanced strategies for scaling physical design flows, improving reproducibility of convergence, and optimizing project PPA and schedule across multiple tapeouts.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a U.S. EAR Country Groups D:1, E1, or E2 country. 

We are looking for a person ready to take up the challenge of working in a high-profile project where we integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better.

In this role, you will ensure functionality and performance of the system.

This role is based out of Tokyo, Japan and offer flexible Hybrid work style.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Responsibilities:

• Verify Tenstorrent’s digital IP and SoC logic at chiplet integration level, using industry standard verification methodologies
• Build and improve components of verification infrastructure including model builds and simulation/regression runs,
• Create verification components like testbenches, checkers and test generators,
• Add assertions and coverages along associated methodologies,
• Build verification test plans for subsystems, align them with project stakeholders, implement test suites, summarize the results and share feedback with project stakeholders
• Publish and review verification metrics and drive convergence towards tape-out,
• Work across boundaries with architects, software and design/emulation teams,
• Guide and mentor junior engineers.

Experience & Qualifications:

• Advanced degree in electrical, computer engineering or computer science
• Proven experience in CPU or SoC verification
• Over 10 years of experience with verification flows, scripting and automation
• Good knowledge of logic design
• Knowledge of Verilog//v2k/system Verilog
• Strong problem solving skills
• Excellent organizational and communication skills
• Good English language skills (written and spoken)

Nice to Have:

• Knowledge of RISC-V, machine learning, die-to-die, memory controllers, PCIe, UCIe
• Knowledge of low level drivers and firmware in C
• Fluency in Japanese
• Japanese work visa

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

The Role:

Radio Frequency (RF) Engineer at ASM will provide solutions for difficult RF technical issues associated with specific projects, contribute to the timely completion of specific programs and projects, possess the ability to work on complex assignments with some guidance and direction from the Engineering Manager.

Responsibilities:

• Develop RF module and reactor of ASM products.
• Using conventional RF source and antennas provide reliable structure to provide stable performance in extreme and harsh conditions.

• Troubleshooting and modification of RF generator and matching network
• Understanding plasma characterization and troubleshooting the Plasma/RF related issues

• Coding FPGA chips to control modules and parts to maximize plasma performance of ASM Products

Education & Experience:

• Master's or Ph. D Degree in Electronics, Physics, or relevant disciplines.
• 3+ year experience in RF plasma field which including modules and parts is preferred.
• Have a broad-based background in analysis, design and debug of complex RF systems.
• Design, implement, maintain, and improve electrical instruments, equipment, facilities, components, products, and systems for the semiconductor equipment industry.
• Well versed with the requirements of CE, NEC, IEC, NFPA, VDE, SEMI S2-95 and other relevant standards as applicable to semiconductor manufacturing equipment.
• Experience with modularizing semiconductor equipment designs for offline assembly.
• Experienced using Microsoft applications such as Excel, Word, PowerPoint, and Project; Manufacturing Requirements Planning (MRP); AutoCAD; OrCAD or Altium schematic capture.
• Business level English

Functional Knowledge

• Plasma Deposition product knowledge a plus (CVD, ALD, EPI, PECVD, PEALD)

Job's mission

Join a team that transforms ideas into real-world solutions. As a System Engineer at ASM, you’ll contribute to the development and integration of advanced technologies that power the semiconductor industry. Your work will ensure our systems are designed, tested, and delivered with precision and purpose.

What you will be working on

• Apply design engineering principles, product specifications and research data to create designs for systems and products for semiconductor industry.
• Develop fail safe, cost effective designs for lower level sub-assemblies used in microprocessor controlled semiconductor equipment.
• Integrate lower level assemblies to obtain a desired system level configuration.
• Adapt digital and analog I/O requirements to achieve customer specific configurations.
• Provide technical support for capital orders, expense projects, retrofits and development projects.
• Evaluate engineering change requests and implement changes as necessary following established procedures and schedules.
• Participate in design reviews prior to releasing new designs to production.
• Support testing of hardware for cost reduction and product improvement projects to verify performance objectives. Design and build test equipment, support basic instrumentation with hardware, create test procedures, perform electro-mechanical tests as required and maintain reliability data and records of all evaluations performed.
• Assess feasibility of product proposals, resolve technical issues, develop new systems, tools, and units while adhering to product design safety criteria.
• Report generation, schedule creation and maintenance, and inter-team coordination.

Key Requirements

• Master’s or PhD in Electrical and Electronics Engineering.
• Ast least 5 years of work experience as a System Engineer in a semiconductor equipment manufacturing company, with expertise in equipment electrical hardware design or development of units/systems like Reactor or Plasma Source, etc.
• Proficiency in Auto CAD technique and also in JMP
• Ability to thrive in a fast-paced, team-oriented environment supporting a global customer base.
• Clear communication skills in English (Dongtan and Tama both) and Korea (Dongtan) or Japanese (Tama).
• A person with fundamental knowledge that enables learning about future processes and mechanisms.
• A person with basic knowledge and aptitude to grow into a system engineer in the future.
• A person who has the motivation to develop into a system engineer in the future.

About Tokyo

Applied Intuition entered the Japan market in 2019. The company has rapidly grown and established strategic relationships with major Japanese automotive OEM customers. Based in the Otemachi area, the Tokyo site consists of more than 60 employees who previously come from Google, Mobileye, TIER IV, Woven by Toyota, Tesla and other renowned companies.

We are continuing to look for experienced and motivated talents across the world to come join our Tokyo team! We are open to considering anyone interested in pursuing a career at Applied Intuition Tokyo office.

About the role

As a Hardware Integration Engineer you will be an integral part of the commissioning of new vehicles for our various projects at Applied Intuition. Your contributions will enable and make more effective broader hardware integration work being done on our vehicle fleets and drive quality and stability improvements for our vehicles being released for the road. You will primarily be responsible for the provisioning of new vehicle hardware, including sensors and computers, and then conducting validation testing at multiple stages of the vehicle build lifecycle.

At Applied Intuition, you will:

• Support hardware integration efforts and development of Applied vehicles.
• Conduct component provisioning, ensuring that a wide variety of components are ready for integration into a vehicle.
• Validate integrated vehicle builds at the system and vehicle level.
• Scale our provisioning and validation efforts to support larger vehicle fleets.
• Work cross-functionally to ensure that the provisioning and validation needs of various teams and projects are being met.

We're looking for someone who has:

• BS/MS in Electrical Engineering, Mechanical Engineering, or similar
• 2+ years experience working with automotive hardware and software
• Experience with hardware reliability and testing
• Experience with AV components (LiDAR, RADAR, Cameras, etc.)
• Experience creating and executing test plans

Nice to have:

• Knowledge of automotive communication (CAN/CAN FD, LIN, Automotive Ethernet)
• Knowledge/Experience with common CAN/CAN FD tools (Vector, PCAN View/Explorer)
• Experience flashing software/firmware updates on hardware (ECUs, etc)

Job Summary:​

We are looking for a Technical Program Manager (TPM) to lead and drive complex hardware-focusedproduct programs through the full product lifecycle from concept and feasibility to high-volumemanufacturing (HVM).​

The TPM will work cross-functionally with product management, process development, engineering,manufacturing, supply chain, and global product support teams to ensure programs are delivered ontime, within cost targets, and in alignment with customer and business requirements.​

This role requires strong program execution skills, technical understanding of hardware development,and the ability to manage multiple stakeholders across global teams.​

Responsibilities:​

Own and manage the NPI (new product introduction) program through the PLM development process from concept and feasibility to release.​

1. Drive tollgate-based product life cycle (PLC) management by reviewing stage-specific development tasks with functional owners, tracking milestones, managing risks, and ensuring schedule adherence.​
2. Coordinate with stakeholders on NPI products to meet required specifications, including SEMI standards and hardware requirements.​
3. Track NPI builds and assist with demo lab procurement of new chambers or major retrofits.​
4. Analyze and manage new product costs against ROI targets.​
5. Lead cross-functional teams and act as a communication bridge among R&D, manufacturing, quality, Marketing and sales.​
6. Ensure resource allocation aligns with divisional priorities to meet project timelines for assigned programs.​
7. Define product specifications and identify key hardware changes with stakeholders during the C&F stage.

   Experience & education:​

   1. BS degree in material science, electrical, mechanical, chemical, or industrial engineering, orequivalent technical education.​
   2. More than 3 years of experience in semiconductor marketing, supply chain management, or sales;experience in project management is a strong plus.​
   3. Working knowledge of project management and semiconductor equipment commercialization, withexperience supporting MRS, ROI analysis, cost tracking, and milestone management activities.​
   4. Proficient in learning complex technical subjects.​
   5. Effective communication, negotiation, and written skills; English and Japanese required.​
   6. Demonstrated ability to support effective internal and external collaboration and contribute toresource planning and execution.​
   7. Positive, energetic attitude with a strong work ethic.
   ​

Job's Mission 

As a R&D Process Engineer at ASM, you will work with semiconductor processing and analytical equipment to research, develop and optimize processes focused on oxidation, annealing, curing, Atomic Layer Deposition (ALD, PEALD), Epitaxy or PECVD for logic, memory, analog, power, and MEMS applications. You will design and conduct complex experiments, measurements and perform the interpretation of complex experimental output. While you deliver creative and inventive solutions, technical publications, and generation of Intellectual Property (IP) are an essential function of this position.

What you will be working on 

• Creative problem solver with experience in developing new films for emerging applications and experience in chemistry/materials characterization.
• Works with semiconductor processing equipment to research, develop and optimize unit processes focused on the deposition of metal and dielectric films via PEALD.
• Bringing innovative ideas, staying abreast of state-of-the-art processing applications in the semiconductor industry to be effective.
• Process consulting and accountability including technical papers on advanced process applications and Intellectual Property creation.
• Participates in and drives technical problem-solving sessions using the related scientific method and industry tools, such as Ishikawa diagrams.
• Designs and conducts experiments, in addition to measuring and interpreting experimental output, aimed at fulfilling stated objectives using Design of Experiments (DOE) and Response Surface Methodology (RSM).
• Troubleshoots equipment problems and is personally and actively engaged in problem via “hands-on” modalities.
• Works with customers and central marketing to understand and define requirements to successfully execute and document customer demonstrations.
• Develops methods and techniques for integrating metal and/or oxide films into existing and future device technologies.
• Ensures successful product transfer to customer base by performing demonstrations, training field service personnel, traveling to support remote sites (up to 10% travel required), and drafting documentation regarding process development, tool operation and maintenance.
• Produces technical papers on process, equipment, and device integration improvement strategies and presents to professional audience.

What we are looking for

• PhD degree in Chemical Engineering, Materials Science, Electrical Engineering, or Physics.
• Fresh PhD graduates OR MS degree holder with 2+ years of work experience with: PEALD, ALD, PECVD, CVD, Epitaxy, and/or other thin film deposition.
• Knowledge of electrical characterization techniques for CMOS devices.
• Application of dielectric and/or metal films for logic and memory structures.
• Knowledge of electrical characterization techniques for CMOS devices is preferred.
• Ability to independently manage complex process development projects, including personnel, project schedules, experimental thrusts, hardware procurement and budgetary oversight.
• Understanding of requirements for integration of metals as work function materials and barrier layers in FEOL and BEOL process flows
• Demonstrated ability to develop and completely characterize deposition processes using first principles and experimental design techniques (e.g., DOE, RSM).
• Experience with the theory, practice, and interpretation of materials characterization techniques such as XPS, SIMS, RBS, AFM, XRD, HRTEM, FESEM, Auger, Raman and ellipsometry.
• Excellent verbal and written communication skills in both English and Japanese, with ability to clearly communicate advanced technical constructs in direct and concise manner.

Job's mission

Each product line of XP8 DCM and JQCM has a complex building‑block structure that supports advanced process technologies. The intern will involve a cross‑functional review of the electrical wiring diagrams and building‑block structures for both product lines, analyzing and identifying design redundancies and common elements. Through this activity, the intern will aim to gain a deep understanding of the process module configuration of DCM and JQCM. Finally, based on the elements identified as candidates for commonality, the intern will propose standardization ideas that can contribute to improved design efficiency, cost reduction, and shorter development lead time.

What you will be working on

XP8 DCM and JQCM are composed of complex building‑block structures (BOMs). In this internship, the intern will systematically break down these complex BOMs and electrical wiring diagrams, reviewing and learning the commonalities and differences across product lines. The analysis approach begins with the high‑cost layers that are widely used across the XP8 DCM and JQCM product portfolios. Next, as part of the compatibility assessment, the intern will examine component‑level differences and determine whether functionally compatible alternatives exist. All components will be categorized into “Common” and “Functional Equivalent” groups, and the intern will redefine the component structure from this perspective. As part of design and development validation, the intern will work with related departments to reassess the technical rationale for the current differences. For manufacturing and procurement optimization, the intern will collaborate with FEMS ME to explore improvements to kit structures. The ultimate objective is to identify concrete and actionable cost‑reduction measures through standardization that can be applied across the entire XP8 DCM and JQCM product lines.

What we are looking fo

The ideal candidates for this internship are students in electrical engineering, manufacturing engineering, or other related engineering fields. A bachelor’s‑level academic background provides sufficient technical preparation to carry out the responsibilities associated with this project.

The Key Account Technology Engineer is the ASM product expert who supports extensive customer and internal company contacts for coordinating the introduction of new products, product improvements, and non-conformances/escalations at the customer. This includes leading projects/programs supporting these activities. The focus of this job is on managing all the technical account aspects of the customers in the assigned region. Responsibilities

· Drive NPI & evaluations by leading the project including hands-on work at the customer location, implement BU developed BKMs or CIPs at customer and execute necessary actions and modifications.

· Provide answers to our customers by identifying problems, researching answers and guiding customer through corrective steps to resolve high value problems at customer sites.

· Understand customer timelines for film development / roadmaps for current and future technology nodes and transfers the information to product management, business development and R&D.

· Identify technical inflections points and work with R&D to ensure customer requirements and learnings are implemented into product development.

· Responsible for the performance of our equipment at the customer. Customer specifications which are non-ASM standard are signed by the KAT.

· Recognize early non-conformance of our product and takes the necessary steps for corrective actions, including analyzing data, involving hardware and process exports.

· Take responsibility to solve any escalation as efficient as possible problems, for NPI and installed base.

· Support process team in demo lab execution of customer specific DOEs and processes.

· Own execution of customer demos for new processes and NPIs.

Qualification

· Masters in chemical engineering, electrical engineering, physics, or material science.

· 5-10 years in the semiconductor wafer processing or capital equipment industry with experience in process engineering and/or technical marketing. Direct experience with silicon wafer processing preferred.

Skills

· Strong problem-solving skills

· Ability to collaborate and partner with key stakeholders and customers

· Demonstrated ability to communicate effectively in verbal and written form. Present advanced technical constructs in direct and concise manner.

· Travel up to 10% - 25%, domestically and internationally (Ability to travel internationally)

· Fluent in Chinese (as the role support the customer in Taiwan) and business level of English.

Job's mission

You will play a key role in ensuring the performance, reliability, and success of our advanced plasma-based semiconductor equipment.
This role places you at the center of customer-facing technical support, working closely with key global customers, while partnering with engineering teams in Tama and collaborating with global colleagues across Japan, Korea, and the United States. Through deep technical expertise, strong ownership, and clear communication, you will directly contribute to ASM’s ability to deliver world-class support in a fast-moving, innovative environment.

What you will be working on

• Provide expert-level technical support for advanced PECVD and plasma-based equipment
• Diagnose, troubleshoot, and resolve complex electro-mechanical, plasma, and software-related issues escalated beyond first-line support
• Lead root cause analysis and clearly communicate issues, countermeasures, and expectations to customers and internal teams
• Work closely with engineering teams in Tama on design feedback, reliability improvements, and maintenance enhancements
• Support system installations, upgrades, engineering change implementations, and customer technical training
• Coordinate technical and administrative support activities including installation, repair, preventive maintenance, and upgrades at customer sites
• Report design, reliability, and maintenance issues to design and software engineering teams
• Communicate directly with customers (engineers through management-level stakeholders such as Directors and VPs)
• Collaborate with a global support team across Japan, Korea, and Arizona
• Travel globally up to 50% of the time (up to approximately six months per year)

What we are looking for

• Bachelor’s degree in Mechanical, Electrical, Aeronautical Engineering, or related science (practical experience is considered more important than formal education)
• At least 5 years of hands-on experience with PECVD / plasma technologies preferred
• Strong background in troubleshooting semiconductor manufacturing equipment
• Experience with plasma-related processes (e.g., PECVD, etching); experience at semiconductor companies preferred
• Ability to communicate effectively in English and Japanese for internal and external discussions, including U.S.-based customers
• Proven customer-facing experience with the ability to explain issues, root causes, and manage expectations
• Strong sense of ownership with the ability to drive issues end to end and follow through to resolution
• Willingness and ability to travel globally (up to 50%)
• Eligible to work in Japan (working visa acceptable)

What sets you apart

• Mandarin proficiency, beneficial for supporting our largest customer
• Experience working with senior stakeholders 
• Strong presentation and expectation-management skills
• Experience collaborating in cross-functional, global teams
• A mindset driven by teamwork, clear communication, accountability, perseverance, and problem-solving ownership