At Tenstorrent, we believe the future of computing must be open, which is why our interns don’t just watch from the sidelines - they help build the core of it. We provide a "code-to-career" pipeline where students collaborate with industry experts to solve high-stakes problems in RISC-V and AI hardware-software co-design. By joining us, you are taking an internship to democratize high-performance computers that are accessible to everyone. During this internship, you will bridge the gap between academic theory and industry practice  

This role is on-site, full time, based in Belgrade, Serbia.

Who You Are

• You are in your final year of undergraduate study, a recent graduate, or currently pursuing a master's degree in Computer Science or Electronics Engineering. 
• You enjoy tackling complex technical problems and naturally approach them with structured, analytical thinking. 
• You have written hardware in Verilog or VHDL and understand how HDL translates to physical logic. 
• You are genuinely curious about how processors and computer architectures work, not just in theory but at the implementation level. 
• You are comfortable working in C/C++ and can get things done with scripting languages such as Python, Perl, or Tcl. 
• Nice to have: experience in advanced digital hardware and system architecture (e.g., high‑frequency logic, processors/GPUs, SoCs and memory systems, real‑time hardware/firmware) and modern machine learning, including deep learning frameworks and models.

What We Need

• Architecture exploration and modeling.
• Implementation of Tenstorrent IP and SOC RTL logic in Verilog.
• Verification of Tenstorrent's IP and SOC logic using advanced verification methodologies.
• Low-level software development for hardware testing.

What You Will Learn

• Exposure to the complete RTL-to-GDSII flow. 
• Front-End Design & Logic Synthesis: Mastering Verilog/SystemVerilog to translate architectural specs into optimized hardware descriptions.
• Verification Methodologies: Developing robust testbenches and utilizing UVM (Universal Verification Methodology) and/or CocoTb to ensure "bug-free" silicon.
• Performance benchmark and optimizations
• Timing & Power Analysis: Performing Static Timing Analysis (STA) and power optimization to meet aggressive performance targets.
• Sign-off & Tape-out Readiness: Understanding the rigorous checks required to prepare a design for fabrication.

Hiring Timelines

This internship opportunity is available throughout our 2 terms with the following corresponding recruitment cycles:

• Summer/Fall Term: Aug-Jan work term, Apr–May recruit.
• Winter/Spring Term: Jan–June work term, Nov–Dec recruit.

Please note these timelines are for reference only. Actual timelines may vary.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.