Structural Engineer Jobs in Bristol.
All active Structural Engineer roles based in Bristol.
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Fractile is building silicon, systems and software which will redefine the frontier of AI: running the world’s most advanced models at radically higher speed and lower cost. We have an exceptional team across hardware and software capable of bringing about this change, and we are growing fast to meet demand and deliver our product at scale.
Join the team implementing DFT for a large, multi-core AI accelerator ASIC. You will work on scan, ATPG, and memory test, contributing to a robust and scalable test solution while developing your expertise in advanced SoC design.
Key Responsibilities
- Contribute to the DFT architecture of a multi-core AI accelerator SoC
- Drive integration of DFT tools into the EDA flow
- Implement scan insertion, compression, and test logic
- Generate and analyze ATPG patterns for structural faults
- Support MBIST implementation for embedded memories
- Work with physical design to ensure clean scan chain implementation and timing closure
- Develop scripts and automation to improve DFT workflows
- Support silicon bring-up, debug, and test analysis
- Work with test and product engineering teams to bring up and debug ATPG patterns on ATE, supporting production test and yield ramp
Required Experience
- Degree in Electrical Engineering, Computer Engineering, or similar
- Experience in DFT, digital design, or related ASIC development
- Good understanding of scan, ATPG, memory BIST and digital test concepts
- Familiarity with mainstream EDA tools
- Scripting skills (Python, Tcl, or similar)
Profile
- Eager to learn and grow in DFT and large-scale ASIC design
- Detail-oriented and comfortable working with complex systems
- Collaborative and responsive in a fast-moving team
How we work
- Ownership and execution: you will have full agency to drive your work forward
- Rapid iteration: we all work directly with top leadership to move from idea to hardware on ambitious timelines
- Full-stack engagement: hardware, software, silicon, and modelling teams all work closely together to create a product with generational impact
- Optimistic and pragmatic: we possess the will to win, and to do the hard work to get us there
- Team player mentality: the mission is bigger than any of us, and we have the curiosity and technical focus to see the best idea shipped, no matter who’s it is
About us
- Founded in 2022, team of 80+ which is expanding rapidly
- Modern, open offices in London and Bristol
- Collaborative, problem-solving culture built on deep curiosity, entrepreneurial initiative and technical fluency
Export control and security clearance
Certain roles may involve working on technologies subject to export restrictions. Applicants may be required to undergo additional eligibility checks to ensure compliance with applicable law.
Ready to apply?
Apply to FractileFractile is building silicon, systems and software which will redefine the frontier of AI: running the world’s most advanced models at radically higher speed and lower cost. We have an exceptional team across hardware and software capable of bringing about this change, and we are growing fast to meet demand and deliver our product at scale.
We’re looking for an engineer to develop and deliver production-ready manufacturing test solutions for an advanced AI accelerator chip. This role is a hands-on individual contributor position focused on ATE test program development, silicon bring-up, debug, and optimization across digital logic, memory, and high-speed interfaces. Work under the direction of the Semiconductor Test Engineering Lead and collaborate closely with design, DFT, product engineering, and external test partners.
Key Responsibilities
- Develop and maintain ATE test programs for an AI accelerator chip targeting high-volume manufacturing.
- Implement manufacturing test content for advanced CMOS designs including high-speed logic, SRAM, DRAM, and high speed IO blocks.
- Develop and debug structural and functional test content such as scan/ATPG, LBIST, MBIST, JTAG, and HSIO tests.
- Bring up first silicon on ATE, including pattern debug, tester correlation, shmooing, and corner analysis.
- Support testing of high-speed interfaces such as PCIe Gen6 and multi-GHz LPDDR, including at-speed tests and margining features.
- Execute silicon characterization and failure analysis to identify yield limiters and defect mechanisms.
- Optimize test coverage, test time, and cost while maintaining manufacturing robustness.
- Work with DFT and design teams to improve testability and close coverage gaps.
- Collaborate with OSATs and external partners on test program execution and debug under guidance from the test lead.
- Support advanced packaging test flows, including die-to-die interconnect testing and package-level thermal considerations.
- Contribute to documentation of test programs, debug procedures, and manufacturing release materials.
- Support qualification, reliability testing, and high-volume manufacturing ramp.
Required Qualifications
- 5+ years of hands-on semiconductor test engineering experience.
- Strong experience developing ATE test programs (Advantest 93K, Teradyne, or equivalent).
- Solid understanding of DFT methodologies (scan, ATPG, MBIST, LBIST) and memory test techniques.
- Experience debugging silicon issues at the tester and correlating failures to design or process causes.
- Familiarity with advanced CMOS nodes and production test challenges.
- Ability to work effectively in a cross-functional engineering environment.
Preferred Qualifications
- Experience testing AI accelerators, GPUs, networking ASICs, or other high-performance compute ICs.
- Experience with PCIe Gen5/Gen6, LPDDR4/5/6, or other high-speed interfaces.
- Exposure to advanced packaging, chiplets, or multi-die test flows.
- Experience improving yield, reducing test time, or optimizing cost in high-volume manufacturing.
How we work
- Ownership and execution: you will have full agency to drive your work forward
- Rapid iteration: we all work directly with top leadership to move from idea to hardware on ambitious timelines
- Full-stack engagement: hardware, software, silicon, and modelling teams all work closely together to create a product with generational impact
- Optimistic and pragmatic: we possess the will to win, and to do the hard work to get us there
- Team player mentality: the mission is bigger than any of us, and we have the curiosity and technical focus to see the best idea shipped, no matter who’s it is
About us
- Founded in 2022, team of 70+ which is expanding rapidly
- Modern, open offices in London and Bristol
- Collaborative, problem-solving culture built on deep curiosity, entrepreneurial initiative and technical fluency
Export control and security clearance
Certain roles may involve working on technologies subject to export restrictions. Applicants may be required to undergo additional eligibility checks to ensure compliance with applicable law.
Ready to apply?
Apply to FractileAbout Graphcore
At Graphcore, we’re building the future of AI compute.
We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale.
As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem. To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world.
We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence.
The Person
Graphcore’s experienced, skilled, and motivated engineering team is heavily involved in shaping the future of AI. A successful candidate will exhibit exceptional knowledge in Design for Testability (DFT) and will have a strong technical background and experience in DFT methodologies, complemented by a robust, self-motivated work ethic. The ideal candidate should also have a focus on quality and demonstrate a good understanding of the importance of production test on the success of a product. Some hands-on experience in one or more of the following areas is essential: RTL design, simulations and debugging, synthesis, STA.
The Role:
We are expanding and looking for an experienced DFT engineers to join the Silicon team. As a part of our team, you will have the opportunity to work on next-generation AI designs targeted for data centers applications.
Responsibilities:
- Keep up with the latest industry trends in DFT domain and help adopt the latest DFT techniques and methodologies
- Work closely with design, verification, physical design and product engineering teams to integrate DFT requirements into the overall design process
- Define and implement DFT architecture and features for next-generation AI designs and support their verification effort
- Develop efficient DFT flows and methodology compatible with silicon design flows
- Work with 3rd party IPs to integrate the provided design into the DFT infrastructure
- Generate structural test vectors, analyze and improve test coverage
- Work with the product and test engineering teams to ensure successful silicon bring-up and help identify any silicon failures to enhance yield learning and improvement
Requirements:
- Very good understanding of DFT components like JTAG (IEEE 1149.x), IJTAG (IEEE P1687), Core Test (IEEE P1500), SSN (Streaming Scan Network), Test Compression, OCC etc.
- Experience on developing DFT specifications and driving the implementation of the DFT features
- Experience in MBIST and BISR implementation and verification is desired
- Solid understanding of design verification methodologies for validating the DFT features using simulation in pre-silicon designs
- Exposure to STA constraints development and analysis for DFT modes and SDF simulations would be a plus
- Experience in Scan based testing and industry standard ATPG tools
- Knowledge of ATPG pattern verification and gate-level simulation flows using Synopsys VCS and Verdi or other EDA tools
- Very good knowledge of Digital Integrated Circuits and Systems
- Hands-on experience with Verilog RTL coding and familiarity with System Verilog
- Strong scripting and debugging skills using programming languages like Python, TCL, Perl, Shell etc.
- Exposure to silicon bring-up, post-silicon testing and tester pattern debugging
- Strong problem-solving skills across various levels of design hierarchies
- Great team working and communication skills
Academic Credentials
- Bachelors or Masters or PhD in Computer engineering/Electrical engineering/Electronics Engineering
Benefits:
In addition to a competitive salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to 5%), life assurance and income protection. We have a generous parental leave policy and an employee assistance programme (which includes health, mental wellbeing, and bereavement support). We offer a range of healthy food and snacks at our central Bristol office and have our own barista bar! We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments
We welcome people of different backgrounds and experiences and are committed to building an inclusive work environment that makes Graphcore a great home for everyone. We are an equal opportunity employer and want to build a work environment where everyone is happy, productive and respectful so they can do their best work. If you have a disability or additional need that requires accommodation, just let us know.
Ready to apply?
Apply to Graphcore