Jobs โ€บ Companies โ€บ Weekday AI โ€บ FPGA Design Engineer

รœber diese FPGA Design Engineer Stelle bei Weekday AI

Weekday AI ยท Vor Ort ยท Bengaluru, Karnataka, India

๐—ง๐—ต๐—ถ๐˜€ ๐—ฟ๐—ผ๐—น๐—ฒ ๐—ถ๐˜€ ๐—ณ๐—ผ๐—ฟ ๐—ผ๐—ป๐—ฒ ๐—ผ๐—ณ ๐˜๐—ต๐—ฒ ๐—ช๐—ฒ๐—ฒ๐—ธ๐—ฑ๐—ฎ๐˜†'๐˜€ ๐—ฐ๐—น๐—ถ๐—ฒ๐—ป๐˜๐˜€

๐—ฆ๐—ฎ๐—น๐—ฎ๐—ฟ๐˜† ๐—ฟ๐—ฎ๐—ป๐—ด๐—ฒ: ๐—ฅ๐˜€ ๐Ÿญ๐Ÿฌ๐Ÿฌ๐Ÿฌ๐Ÿฌ๐Ÿฌ - ๐—ฅ๐˜€ ๐Ÿญ๐Ÿฎ๐Ÿฌ๐Ÿฌ๐Ÿฌ๐Ÿฌ๐Ÿฌ (๐—ถ๐—ฒ ๐—œ๐—ก๐—ฅ ๐Ÿญ-๐Ÿญ๐Ÿฎ ๐—Ÿ๐—ฃ๐—”)

Experience: 3+ yrs

Location: Bengaluru

Job Type: Full-time

We are looking for an experiencedย FPGA Wireless Communication Protocol Design Engineerย to develop, implement, and validate wireless communication algorithms on FPGA platforms. The role involves taking wireless communication algorithms fromย high-level MATLAB/Simulink modelling through fixed-point optimisation, RTL generation, synthesis, timing closure, FPGA implementation, and hardware validation.

The ideal candidate will have a strong foundation inย digital signal processing, wireless communication, FPGA design, and model-based development, with a passion for building and deploying high-performance communication systems.

Requirements

Key Responsibilities

  • Develop and validate wireless communication signal chains usingย MATLAB and Simulink.
  • Model and simulate communication algorithms includingย modems, equalizers, channel coding, source coding, carrier synchronisation, and frame synchronisation.
  • Translate floating-point communication algorithms into hardware-efficientย fixed-point implementations.
  • Optimise fixed-point designs to achieve the right balance betweenย FPGA resource utilisation, computational performance, latency, and BER.
  • Useย MathWorks HDL Coderย and model-based design methodologies to generate synthesizable RTL.
  • Develop and integrateย VHDL, Verilog, or SystemVerilogย implementations for FPGA-based wireless communication systems.
  • Design, integrate, and validate custom wirelessย IP blocksย within complete FPGA signal chains.
  • Develop and integrate interfaces based onย AXI4-Stream and AXI4-Liteย architectures.
  • Perform FPGA synthesis, implementation, placement, routing, andย timing closureย using AMD/Xilinx Vivado.
  • Perform FPGA hardware bring-up, debugging, and functional verification.
  • Validate wireless communication performance using appropriateย RF test equipmentย and laboratory setups.
  • Work closely with RF and hardware teams during integration, testing, and system-level validation.
  • Analyse implementation results and optimise designs for performance, resource utilisation, and reliability.
  • Troubleshoot issues across algorithm models, RTL, FPGA implementation, and hardware validation.
  • Document algorithms, models, design decisions, implementation results, test procedures, and validation outcomes.
  • Contribute to continuous improvement of wireless communication architectures, development methodologies, and FPGA implementation practices.

What Makes You a Great Fit

  • 3+ years of hands-on experienceย in FPGA design, wireless communication, DSP, or related engineering domains.
  • Strong understanding ofย wireless digital communication systemsย and digital signal-processing concepts.
  • Hands-on experience withย MATLAB and Simulinkย for algorithm modelling and simulation.
  • Strong knowledge ofย fixed-point modelling and optimisation, preferably using Fixed-Point Designer.
  • Experience withย model-based design and HDL generationย methodologies.
  • Strong programming experience inย Verilog, SystemVerilog, or VHDL.
  • Practical experience withย AMD/Xilinx Vivado Design Suite, including synthesis, implementation, timing analysis, and FPGA deployment.
  • Strong understanding ofย OFDM, analog and digital modems, DDC/DUC, FIR/IIR filters, and digital signal processing.
  • Experience working withย AXI4-Stream and AXI4-Liteย interfaces.
  • Understanding of FPGA resource optimisation, latency, throughput, timing closure, and hardware implementation constraints.
  • Experience with FPGA hardware bring-up, debugging, and validation using laboratory orย RF test equipment.
  • Experience withย AMD/Xilinx Zynq UltraScale+ RFSoCย platforms is highly desirable.
  • Ability to translate theoretical DSP and wireless algorithms into practical, deployable hardware implementations.
  • Strong analytical and problem-solving skills with attention to algorithm accuracy and hardware performance.
  • Strong collaboration skills and ability to work effectively withย DSP, FPGA, RF, hardware, and system engineering teams.
  • Aย M.Tech / M.E. in Digital Signal Processing, Telecommunications, VLSI, Electronics, or a related disciplineis preferred.
  • Advanced training or certification inย DSP algorithms, wireless communication, FPGA design, or model-based developmentย is an advantage.
  • Strong passion forย wireless communication system design, algorithm development, FPGA implementation, and continuous technical learning.
  • Ability to take ownership of technical challenges and deliver practical engineering results within defined timelines.
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