รber diese Analog Layout Engineer Stelle bei Weekday AI
๐ง๐ต๐ถ๐ ๐ฟ๐ผ๐น๐ฒ ๐ถ๐ ๐ณ๐ผ๐ฟ ๐ผ๐ป๐ฒ ๐ผ๐ณ ๐๐ต๐ฒ ๐ช๐ฒ๐ฒ๐ธ๐ฑ๐ฎ๐'๐ ๐ฐ๐น๐ถ๐ฒ๐ป๐๐
๐ฆ๐ฎ๐น๐ฎ๐ฟ๐ ๐ฟ๐ฎ๐ป๐ด๐ฒ: ๐ฅ๐ ๐ฎ๐ฑ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ - ๐ฅ๐ ๐ฐ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ (๐ถ๐ฒ ๐๐ก๐ฅ ๐ฎ๐ฑ-๐ฐ๐ฌ ๐๐ฃ๐)
Experience: 5+ yrs
Location: Bengaluru
Job Type: Full-time
As an Analog Layout Engineer, you will be responsible for translating circuit designs and schematics into optimized physical layouts while maintaining performance, reliability, and design-rule compliance. You will work on advanced-node technologies and contribute to custom IO layout activities, ensuring that designs meet electrical, physical, and manufacturing requirements.
The role requires strong attention to detail, an understanding of analog layout principles, and the ability to collaborate effectively with circuit design, verification, and physical design teams.
Requirements
Key Responsibilities
- Develop and implement high-quality analog and custom layouts based on circuit schematics and design specifications.
- Work extensively onย 16FF Custom IO Layoutย and advanced-node semiconductor designs.
- Perform floorplanning, placement, routing, matching, shielding, and layout optimization.
- Apply analog layout techniques such as common-centroid, interdigitation, symmetry, matching, and guard-ring implementation.
- Ensure layouts comply with technology design rules, reliability requirements, and manufacturing constraints.
- Perform physical verification activities includingย DRC, LVS, and related checks.
- Identify and resolve layout-related issues in collaboration with circuit designers and verification teams.
- Optimize layouts for performance, area, signal integrity, and power requirements.
- Participate in design reviews and provide layout inputs to improve circuit performance and manufacturability.
- Maintain accurate layout documentation and follow established design methodologies and quality standards.
- Support debugging and resolution of physical verification and integration issues.
- Collaborate with cross-functional teams throughout the design and tape-out lifecycle.
What Makes You a Great Fit
- 5+ years of experienceย in analog/custom IC layout engineering.
- Strong hands-on expertise inย 16FF Custom IO Layout.
- Experience with advanced semiconductor process technologies and custom analog/mixed-signal layouts.
- Strong understanding of analog layout concepts, matching techniques, parasitic effects, and physical design constraints.
- Hands-on experience with layout and physical verification tools.
- Good knowledge ofย DRC, LVS, ERC, and other physical verification processes.
- Ability to interpret schematics and understand circuit-level requirements.
- Strong debugging and problem-solving skills with excellent attention to detail.
- Ability to work effectively with analog designers, verification engineers, and other semiconductor engineering teams.
- Strong understanding of design quality, reliability, and tape-out requirements.
- Good communication skills and the ability to work independently as well as within a collaborative engineering environment.