We are looking for a Senior Mask Layout Engineer on the Fab Tapeout and Validation Team. As a Senior Mask Layout Engineer, you’ll be part of a cross-functional team whose mission is to lead IonQ on its journey to build the world’s best quantum computers to solve the world’s most complex problems. 

In this role, you will be the owner of full-reticle tapeouts for use in trapped-ion quantum computers, which could include both photonic and analog electronic layers. In addition, you will help develop and maintain the internal PDK and circuit layout libraries, as well as write scripts to automate the layout of masks for tapeouts. You will also have the opportunity to work closely with the photonic and ion trap design and testing teams to help develop new and game-changing quantum technology to enable scalable quantum computing, memory, and networking.

The Fab Tapeout and Validation Team is a remote-friendly team and this role can be performed remotely or in-person at IonQ’s College Park, MD or Bothell, WA campuses. 

Responsibilities:

• Conduct Python-based layout for full-reticle tapeouts with commercial foundries
• Develop and maintain internal component PCell and automated circuit layout libraries
• Interface with designers, test engineers, packaging engineers, and foundry team to define layout rules and component designs 
• Implement physical verification checks of layouts, including DRC and LVS
• Develop detailed documentation of tapeouts and lead layout reviews with other team members 
• Work with cross-functional teams to understand circuit requirements and make recommendations to improve design, layout, and test workflows

You’d be a good fit with:

• Bachelor’s degree in Photonics, Physics, Electrical Engineering, or related field, or equivalent practical experience
• Knowledge of semiconductor manufacturing processes and techniques
• Excellent programming and software skills, including development in an IDE, proficiency with version control software, shell scripting, and code documentation
• 2+ years of experience with Python-based mask layout software packages such as Luceda IPKISS, GDSFactory, or Klayout
  
  

You’d be a great fit with:

• M.S. or Ph.D. in Photonics, Physics, Electrical Engineering, or related field
• 5+ years experience in generating layout files for complex semiconductor flows with custom elements, such as MEMS, integrated photonics, or superconducting circuits
• Past ownership of full-reticle tapeouts with commercial foundries
• Experience with commercial simulation, verification, and layout environments such as Synopsys, Cadence, and Ansys
• Familiarity with photonic and/or analog electronic device principles including design, test, and fabrication
• Proficiency in physical verification including DRC, LVS, and ERC
• Experience with semiconductor and/or photonic workflows for tapeout with commercial foundries
• Excellent verbal and written communication skills
• A meticulous attention to detail and excellent track record of documenting requirements, implementation plan, and tracking progress
• Ability to work independently, prioritizing tasks and managing time effectively in a deadline-oriented environment

Location: The Fab Tapeout and Validation Team is a remote-friendly team and this role can be performed remotely or in-person at IonQ’s College Park, MD or Bothell, WA campuses. 
Travel: Up to 10%
Job ID: 1303

The approximate base salary range for this position is $110,336 - $144,459.  The total compensation package includes base, bonus, and equity.

We are looking for a Senior Technical Program Manager who is a key interface with our foundry partners and multiple internal cross-functional teams. The mission of this role is to track activities and wafers which include the traps used by IonQ on its journey to build the world’s best quantum computers to solve the world’s most complex problems. As our TPM for Fab Operations, you will play a pivotal role in realizing this vision by being one of the crucial interfaces between design, layout, fabrication, and test, with particular emphasis on the collaboration with our external fab partner. Your expertise will directly impact the delivery and performance of fundamental building blocks of our quantum computers.

Responsibilities:

• Collect and track requirements and related documentation, aligning the internal team requests, mapping intercept points and deliveries
• Track the status of wafers and chips in the fab and in test environments, making sure that measurements are completed timely and that feedback is provided on schedule, in time for learning to be implemented on next iterations and taking into account interdependencies 
• Highlight schedule risks and provide visibility of slipping items, bottlenecks, and showstoppers; propose solutions to mitigate schedule impact and bring deliveries back on track
• Coordinate with design, layout, fab, and test teams the flow of information and samples to optimize learning cycle time, prioritizing critical items
• Plan for f2f meetings and technical workshops with internal teams and/or external partners in the US or abroad
• Track expenses and compare to budget for all fab-related activities, highlighting discrepancies or outliers; prepare Purchase Orders as needed
• Critically analyze, synthesize, and present program status to cross-functional teams, directly informing key program decisions and updates
• Develop, finalize, and communicate clear and realistic project timelines, identifying key milestones, potential risks, and definitive completion dates.
• Forge strong partnerships with design and systems teams to collaboratively track activities, needs, and timelines
• Collaborate effectively with the procurement team to establish favorable terms for recurring purchases and strategic framework agreements.
• Thoroughly document the schedule of actual vs planned program status, driving lesson learnt and mitigation paths
  
  

You’d be a good fit with: 

• Master's or higher in Engineering or relevant field/discipline
• 5+ years working in a fast-paced new product introduction (NPI) team to deliver novel products within a multi-functional engineering team over multiple timezones
• Expertise in tracking a wide range of manufacturing activities, with complex schedule and interdependencies
• Hands-on advanced experience in Office Timeline, Smartsheet, Excel macros
• Strong understanding of manufacturing concepts, experience managing accelerated timelines, coordinating multiple parallel manufacturing campaigns, and effectively navigating conflicting priorities 
• Experience with procurement flows (quote, POs)
• Exceptional written and verbal communication skills, with the ability to articulate complex timelines to diverse audiences. 

You’d be a great fit with:

• 5+ years of experience working within a commercial semiconductor foundry 
• Experience working with ion trapping and/or photonic devices

Location: This role is based at our College Park, MD office, with the option to work a few days a week remotely.
Travel: Up to 25% to other site locations.
Job ID:  1265

The approximate base salary range for this position is $110,336 - $144,459. The total compensation package includes base, bonus, and equity.

Location: This role can work onsite or hybrid in San Francisco Bay Area, CA.  
Travel: Up to 10%
Job ID:  1560

The Role: 

We are looking for a Principal Cybersecurity Architect to own the security posture strategy for our Network Security Posture Management (NSPM) platform. You’ll work at the intersection of network security, compliance, and platform engineering — defining how the platform assesses, measures, and enforces security posture across large, heterogeneous network environments.

In this role, your primary focus is designing and codifying security posture assessment rules that map network device configurations and behaviors against established security standards — and building the framework that makes it easy to onboard new standards as they emerge. You bring deep NSPM expertise, a strong understanding of network security principles, and the ability to translate complex compliance requirements into actionable, automatable rules that operate at scale across thousands of devices.

Responsibilities:

• Design and own the security posture assessment rule framework, defining how device configurations, network behaviors, and access controls are evaluated against security standards including NIST CSF, CIS Benchmarks, ISO 27001, FISMA, and FedRAMP.
• Build and maintain a scalable rule authoring and lifecycle management system that allows new security standards and custom organizational policies to be onboarded, versioned, and deployed without platform re-architecture.
• Continuously monitor the evolving threat and compliance landscape — translating emerging standards, regulatory changes, and new CVEs into updated posture assessment rules that keep the platform current and defensible.
• Define the risk scoring and prioritization model that aggregates individual posture findings into a coherent, actionable security posture score at the device, segment, and enterprise level.
• Collaborate with platform engineering teams to ensure posture assessment rules execute efficiently at scale across large network device fleets, with well-defined APIs for rule ingestion, evaluation, and results delivery.
• Engage with enterprise customers and internal stakeholders to understand their compliance requirements, translating them into platform capabilities and serving as the authoritative security subject matter expert for the product.
• Partner with Product and Engineering to shape the NSPM roadmap, ensuring security posture capabilities remain ahead of the regulatory curve and deliver measurable value to network security and compliance teams.
• Mentor engineers and security analysts on posture rule design, threat modeling, and compliance mapping, establishing rigorous review processes that ensure accuracy and defensibility of every assessment rule shipped.

Requirements:

• 12+ years of experience in cybersecurity, network security, or security architecture, with at least 5 years in a senior or principal capacity focused on network security posture, compliance, or policy enforcement at scale.
• Deep, hands-on experience with Network Security Posture Management (NSPM) platforms and tools, with a demonstrable track record of designing and operationalizing posture assessment rules across large enterprise networks.
• Comprehensive knowledge of major security standards and frameworks including NIST CSF, CIS Benchmarks, ISO 27001, FISMA, and FedRAMP, with the ability to interpret control requirements and translate them into precise, automatable assessment rules.
• Strong understanding of network device security — including firewall policy analysis, routing protocol security, access control, and configuration hardening across multi- vendor environments (Cisco, Juniper, Palo Alto, Fortinet).
• Proven ability to operate across both strategic and technical dimensions — engaging executive stakeholders on compliance risk while working closely with engineering teams on rule design, data modeling, and platform integration.

Preferred Qualifications:

• Industry certifications such as CISSP, CISM, CCNP Security, or equivalent credentials that demonstrate deep, validated expertise in network security and information security management.
• Prior experience at a network security vendor, MSSP, or large enterprise security team, with direct exposure to how security posture policies are enforced across complex, multi- vendor network infrastructures.
• Familiarity with Zero Trust architecture principles and their practical application to network segmentation, device trust, and least-privilege access enforcement in enterprise environments.
• Experience contributing to or authoring security standards, CIS Benchmark profiles, or DISA STIGs, or participation in industry working groups focused on network security policy and compliance.
• Understanding of CVE lifecycle management, SBOM analysis, and vulnerability correlation as they apply to network device firmware and software supply chain risk assessment.

The approximate base salary range for this position is $248,557 - $325,425. The total compensation package includes base, bonus, equity, and a range of benefit options found on our career site.

We are looking for a Senior Cloud Infrastructure Engineer. In this role, you will be building and operating quantum computers, which requires lots of classical computers — from high-performance computing clusters to VMs and containerized services, we rely on on-prem and cloud-based computers every day. We also build out all of the avenues that code gets from laptops and workspaces onto those classical computers. As a Senior Infrastructure Engineer, you’ll help build and maintain this critical infrastructure. 

Responsibilities:

• Help build out, automate, and maintain our on-premises and cloud-based infrastructure 
• Contribute to expanding our Observability platform (built on Grafana stack) 
• Help develop and implement our digital security capabilities for both our cloud infrastructure and on-prem facilities
• Provision infrastructure in the cloud and on-prem as needed
• Build and maintain CI/CD pipelines, enabling developer acceleration
• Monitor systems to analyze and improve performance, security, and reliability
• Operationalize our global fleet and development services 
• Collaborate closely with software and hardware engineers to continuously improve how we do things

You’d be a good fit with:

• Bachelor’s degree in Computer Science, IT or equivalent practical experience -- untraditional backgrounds are welcome and encouraged!
• 6+ years experience in technical infrastructure and software development
• 3+ years of experience in Linux system administration
• 3+ years experience in Kubernetes
• Expert-level knowledge with a programming language of your choice
• Strong written and verbal communication skills

You’d be a great fit with:

• 5+ years experience with Kubernetes or other containerization technologies
• 5+ years of software engineering experience
• 3+ years experience with Terraform
• 3+ years experience with VM-based virtualization
• Prior experience running bare-metal Kubernetes clusters
• Prior experience provisioning physical servers and network equipment
• Prior experience scaling and securing distributed applications

Location: This role will be based at our office in College Park, MD, or Bothell, WA, and can work remotely up to 3 days per week. 
Travel: Up to 15%
Job ID:  1437

The approximate base salary range for this position is $145,920 - $191,047. The total compensation package includes base, bonus, and equity.

Location: This role is based at our College Park, MD office, with the option to work a few days a week remotely.
Travel: Up to 15%, domestic or international.
Job ID: 1492

The Role: 

We are looking for an Optomechanical engineer to join our Photonic Metrology team. As an optomechanical engineer , you’ll be part of a cross-functional team whose mission is to lead IonQ on its journey to build the world’s best quantum computers to solve the world’s most complex problems. 

In this role, you will be responsible for designing and validating optical and mechanical assemblies to support integrated photonics metrology. The ideal candidate is someone who is detail-oriented and a creative problem solver.

Responsibilities:

• Design, Assemble and align optical components, fiber arrays, micro‑optics, and mechanical fixtures used in photonic test stations
• Integrate motion stages, nanopositioners, and precision alignment hardware into complete metrology platforms
• Generate detailed drawings, BOMs, and documentation for fabrication and assembly
• Document findings and present results to cross‑functional teams including photonics, electronics, and manufacturing engineering
• Perform tolerance analysis, thermal‑mechanical assessments, and alignment strategy development

Requirements:

• Bachelors or Masters Degree in Mechanical Engineering, Optical Engineering, related field or equivalent experience
• Strong proficiency in SolidWorks for 3D modelling and mechanical design
• Experience with Zemax for optical simulation and optical design

Preferred Qualifications:

• Familiarity with motion control systems, automation, or active alignment algorithms.
• Experience assembling and aligning optical systems and fiber‑optic components.
• Experience with thermal/structural or vibration analysis

The approximate base salary range for this position is $95,945 - $125,616. The total compensation package includes base, bonus, equity, and a range of benefit options found on our career site.

The mission of the QPU Testing team is to improve quantum computer performance through validation of QPU (quantum processing unit) designs and verification of individual QPUs produced by the manufacturing team. We own the creation and execution of test plans that we develop with stakeholders across the Quantum Computing organization. We are looking for a Staff Physicist to join the QPU Testing team as our Scientific Validation lead. In this role, you will ensure our testing accurately captures performance characteristics which are important to the Science team. You will also serve as a trusted internal authority on physics-related test validity, rigor, and interpretation.

You will help to turn scientific questions and risk areas into concrete, executable test plans, including testing with and without ions, then communicate results, interpretation, and actionable feedback to stakeholders. This role is central to maintaining a trusted testing roadmap and ensuring tight feedback between development and testing.

Responsibilities:

• Drive creation and evolution of validation test plans, procedures, and acceptance criteria, aligned to science priorities.
• Translate scientific requirements into practical, executable test coverage and readiness standards for QPU testing platforms.
• Provide physics triage for complex, ambiguous system issues, defining next diagnostics and escalation paths.
• Execute and validate testing campaigns, including hands-on operation and troubleshooting of a trapped-ion system.
• Communicate results and recommendations clearly across scientific and cross-functional stakeholders.

You’d be a good fit with: 

• PhD in experimental atomic/AMO physics (or closely related field) and 5+ years of industry experience post-PhD.
• Hands-on experience operating a trapped-ion experiment (minimum requirement).
• Demonstrated ability to independently define next steps, prioritize work, and execute with minimal supervision.
• Strong experimental fundamentals (optics/lasers, vacuum, control systems) and comfort debugging complex experimental systems.
• Ability to translate scientific goals into test plans and acceptance criteria, and to communicate results clearly to both scientific and cross-functional stakeholders.

You’d be a great fit with:

• Deep trapped-ion background (e.g., PhD research focused on trapped-ion quantum computing and/or extensive trapped-ion apparatus experience).
• Track record owning end-to-end validation strategy (metrics to procedures to execution to reporting) for complex platforms.
• Experience working in highly collaborative, cross-disciplinary teams and influencing testing priorities across org boundaries.
• Strong Python-based experiment control and/or analysis workflows.

Location: This role is based onsite at our headquarters in College Park, MD.
Travel: 10%
Job ID: 1358

The approximate base salary range for this position is $126,887 - $166,127. The total compensation package includes base, bonus, and equity.

Location: This position can work onsite or hybrid from San Francisco Bay Area. 
Travel: Up to 15%, domestic or international.
Job ID: 1558

The Role: 

We are looking for a Senior Staff Software Architect to lead the design and evolution of our next-generation Network Monitoring Platform. You’ll be part of a cross-functional team whose mission is to lead IonQ on its journey to build the world’s best quantum computers to solve the world’s most complex problems.

In this role, you will own the end-to-end architecture of a high-scale, data-intensive network monitoring platform — from data modeling and ingestion pipelines to cloud-native deployment. You are a hands-on technical leader who writes production code, drives critical architectural decisions, and has deep experience building systems that monitor large fleets of devices at scale. The ideal candidate brings strong Go and/or Rust expertise and thrives at the intersection of systems engineering and distributed data platforms.

Responsibilities:

• Architect cloud-native ingestion and processing pipelines capable of handling telemetry from hundreds of thousands of devices, leveraging streaming platforms and time-series storage at scale.
• Define and own the platform’s unified YANG-based data model, spanning device configuration state, operational telemetry, and topology relationships across heterogeneous network environments, serving as the authoritative schema from which ingestion pipelines, storage structures, and API contracts are derived.
• Write and review production-quality code in Go and/or Rust for performance-critical platform components including collectors, aggregators, and real-time processing engines.
• Define and enforce data partitioning, sharding, and retention strategies to sustain high-volume device event streams while meeting latency and durability requirements.
• Lead the design of cloud-native deployment patterns (Kubernetes, service mesh, autoscaling) to ensure the platform operates reliably at global scale across multi-cloud environments.
• Evaluate and drive adoption of purpose-fit technologies — time-series databases, graph stores, stream processors — with a focus on operational scalability and long-term maintainability.
• Partner with Product and Engineering to translate monitoring requirements into platform capabilities, ensuring architectural decisions are reflected in roadmap milestones and engineering specifications.
• Mentor senior engineers through architecture reviews, coding standards, and hands-on technical guidance, raising the bar for platform quality and engineering practices.

Requirements:

• 12+ years of experience in software or platform architecture, with at least 5 years leading architecture for large-scale, data-intensive distributed systems.
• Substantial experience building and operating device monitoring systems at scale — with direct exposure to telemetry ingestion pipelines, fleet management, and real-time alerting across large device populations.
• Proven hands-on coding ability; production experience with Go and/or Rust is strongly preferred for this role.
• Deep expertise in data modeling for high-volume systems, including schema design, time-series storage (InfluxDB/Timescale), event streaming (Kafka/Kinesis), and graph data models for network topology.
• Solid understanding of cloud-native application design — including containerization, Kubernetes orchestration, microservices, and cloud infrastructure across AWS, GCP, or Azure.

Preferred Qualifications:

• Proficiency in both Go and Rust, with a track record of shipping production services in at least one of these languages.
• Background in network management platforms or network equipment vendors (e.g., Juniper, Cisco, Nokia), with familiarity with telemetry protocols such as gNMI, NETCONF, or SNMP.
• Experience designing multi-tenant SaaS platforms where data isolation, schema evolution, and scalability across customer tiers are first-class concerns.
• Contributions to open-source infrastructure or observability projects, or published technical writing on distributed systems and data engineering topics.
• Familiarity with techniques relevant to high-throughput data collection.

The approximate base salary range for this position is $216,136 - $282,978. The total compensation package includes base, bonus, equity, and a range of benefit options found on our career site.