About The Role

As our team grows Cerebras is looking for a world class physical design engineer. We are looking for a strong learner who can learn how we do PD and integration of our wafer scale design.
As a member of our tight knit physical design team, you will perform a variety of physical design tasks such as synthesis, place and route, timing and block closure / sign off. You will be involved in all aspects of physical design and implementation. You will work closely with the RTL team and with full-chip integration of these blocks.

Skills and Qualifications

• 7+ years of physical design/verification experience.
• Strong experience in block/subsystem timing closure.
• Strong ability to learn and grow with the team.
• Strong knowledge of block level and full-chip physical verification methodology.
• Expert at optimizing for the best power/performance and area.
• Experience with the complete physical design flow. Knowledge of Synopsys tool suite is a plus.
• Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues.
• Expert with IR/EM analysis and resolution.
• Good understanding of full chip floor-planning and integration. 
• Strong ability in scripting languages like Tcl and Python. Ability to make flow enhancements.
• Demonstrated ability to work with RTL teams to optimize for physical design.
• Ability to take on a leadership role after ramping up on wafer scale design

About The Role 

As an ML QA Lead, you ensure quality of Cerebras SW across all supported ML workloads and workflows. You will be part of MIQ (ML Integration and Quality) team that will focus on SW components feature testing, ML training accuracy and performance, pre deployment/production validation, validating customer workloads and workflows.

As part of this role, you will influence the best testing practice, good debugging methodology, effective cross team communication and advocate for world-class products.

Responsibilities

• Drive quality of various software and hardware components of Cerebras solution to ensure accuracy, performance and usability of model trainings.
• Bring good testing methodology, effective communication and strong debugging skills to the team.
• Demand the highest quality from all components within the Cerebras environment.
• Ability to automate workflows, setup testbeds and build tools to effectively monitor and debug issues.
• Implement creative ways to break Cerebras software and identify potential problems.
• Break down complex tasks into smaller tasks. Be a problem solver. Be a thought leader.
• Ability to work in a fast-paced environment and make the necessary prioritizations and judgements which affects productivity at a company level.

Skills & Qualifications

• 8 years of relevant industry experience in Software quality and testing areas.
• Experience testing AI/ML models and evaluation of the model quality.
• Stong automation and programming skills using one or more programming languages like Python, C++ or go.
• Experience in testing compute/machine learning/networking/storage systems within a large-scale enterprise environment.
• Experience in debugging issues across scale out deployment.
• Experience in putting together thorough test-plans.
• Experience working effectively across teams, including product development, product management, customer operations, and field teams.

Preferred Skills & Qualifications

• Knowledge of ML workflows and frameworks.
• Knowledge of basic storage and networking protocols.
• Hands-on experience with training LLMs.
• Hands-on experience working with containers, Kubernetes.

The Role:
In this exciting role, you will be responsible for bring up and optimizations of Cerebras’s Wafer Scale Engine (WSE). Suitable candidate will have experience delivering end to end solutions working closely with teams across chip design, system performance, software development and productization.

Responsibilities:

• On Wafer Scale Engines, develop and debug flows that embed well tested and deployable optimizations in production processes to reduce time and costs 
• Work on refining AI Systems across H/W-S/W design constraints such as di/dt, V-F characterization space, current and temperature limits in relation to optimizations for performance.
• Develop/Enhance infrastructure to enable silicon for real world workload testing
• Develop self-checking metrics, as well as instrumentation for debug and coverage
• Work with the silicon architects/designers, performance engineers and software engineers to enhance performance of Wafer Scale Engines.
• Work across domains such as, Software, Design, Verification, Emulation & Validation to refine and optimize performance and process.
• Work with CI/CD tools, git repositories, github, git actions/Jenkins, merge and release flows to streamline test and release.

Skills & Qualifications:

• BS/BE/B.Tech or MS/M.Tech in EE, ECE, CS or equivalent work experience
• 7-10+ years of industry experience
• 3-5 years of experience in Pre-silicon & Post Silicon ASIC hardware
• Good understanding of computer architecture and networking
• Excellent Coding in languages such as Python/Verilog/System Verilog and C
• Proficient in hardware/software codesign and layered architectures.
• Excellent debugging, analytical, and problem-solving skills
• Proficient in large scale testing and automation using pytest and python
• Good presentation skills to refine diverse information and put forth optimization strategies and results.
• Good interpersonal skills, ability & desire to work as a standout colleague
• Proven track record of working cross-functionally learning fast and driving issues to closure 

Preferred:

• Previous work in AI-ML with 100+ CPU core & communication fabric-based design.
• Familiarity with in-line testing and diagnostics using CPU memory and execution with self-checking.
• Knowledge of chip defect profiles and mitigation strategies across the hardware and software stack
• Familiarity in creating test and s/w infrastructure at large scale
• Working across global time zones 

Location:

Sunnyvale, California.

Bangalore, India

Toronto, Canada 

The base salary range for this position is $175,000 to $275,000 annually.  Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.

About the Role

In this role, you will be building a world class UI-based large-scale cluster management portal. This portal will act as one stop for all operations and maintenance of cerebras clusters – such as cluster bringup deployment (day0/1/2), job management, health management to name a few. Cerebras AI clusters may have 1000’s of

Wafer-scale accelerator systems, several 1000’s of high-end servers, and several 1000’s of networking ports including switches.

Responsibilities

• Be the primary engineering face and owner of UI and integrating to the backend through standard best practices.
• Heavily partner with product management and end users of this tool to build a world class tool.
• Provide strong technical leadership for this tool development.
• Actively work with variety of engineering teams that needs interaction in backend.
• Build UI experience that is cohesive and seamless across all operations and maintenance activities.
• Ability to build and mentor a small team of engineers for this tool.

Skills & Qualifications

• 6+ years of demonstrated technical excellence in UI development and backend integration.
• 5+ years of professional software engineering experience with modern front-end frameworks such as React, Angular, or Vue.
• 5+ years of technical engineering experience with coding in languages including, but not limited to, C++, TypeScript, JavaScript, or Python.
• 2+ years of back-end development experience using technologies like Node.js, Python or Go with a proven track record of designing scalable APIs and microservices.
• Expertise in HTML, CSS, JavaScript/TypeScript, and responsive design principles to deliver polished, accessible, and high-performance user interfaces.
• Experience with cloud platforms such as AWS, Azure, or GCP.
• Experience in CI/CD pipelines for deploying and maintaining production-grade applications.
• Proven track record of delivering product, launching and deploying solutions in production.
• Excellent communication, articulation, collaboration and stakeholder management.
• Tough decision-making skills with data and trade-off analysis.
• Outstanding sense for product and user journeys, out-of-box thinker.
• Outstanding road map and schedule execution skills under tight timeline and budgets.

About The Role 

As a Research Engineer on the Inference ML team at Cerebras Systems, you will adapt today's most advanced language and vision models to run efficiently on our flagship Cerebras architecture. You'll work alongside ML researchers and engineers to design, prototype, validate, and optimize models, gaining end-to-end exposure to cutting-edge inference research on the world's fastest AI accelerator. 

You will focus on pushing the frontier of speculative decoding, large-model pruning and compression, sparse attention, and sparsity-driven techniques to deliver low-latency, high-throughput inference at scale. 

Responsibilities 

• Implement and adapt transformer-based models (NLP and/or vision) to run on Cerebras hardware
• Assist in optimizing models for inference performance (latency, throughput)
• Run experiments, analyze results, and support model improvements
• Help bring up and validate models on the Cerebras system
• Debug and troubleshoot model or system issues with guidance from senior team members
• Support profiling and performance analysis using internal tools
• Collaborate with cross-functional teams (ML, software, hardware) on model integration

Minimum Qualifications 

• Bachelor’s or Master’s degree in Computer Science, Engineering, or a related field
• 1–3 years of experience in software engineering or machine learning in a similar capacity (internships count)
• Experience with Python and at least one ML framework (e.g., PyTorch, Transformers, vLLM or SGLang)
• Understanding of deep learning concepts (e.g., neural networks, transformers)
• Experience with Generative AI and Machine Learning systems
• Strong programming skills in Python and/or C++

Preferred Qualifications 

• Experience with speculative decoding, neural network pruning and compression, sparse attention, quantization, sparsity, post-training techniques, and inference-focused evaluations. 
• Exposure to large language models or computer vision models
• Experience running experiments or tuning models
• Familiarity with tools like PyTorch, Hugging Face Transformers, or similar
• Basic understanding of performance concepts (e.g., latency, throughput)
• Experience working in Linux environments

The Role 

We are seeking a highly skilled and motivated Manufacturing Bring-up Engineer to join our team. As the Manufacturing Bring-up Engineer you will support our system level bring-up process execution, implementation, and evolution in the manufacturing pipeline. This is a high visibility role that requires strong technical expertise, coordination, and collaboration to deliver our product from manufacturing to the customer. 

Responsibilities 

• Support the Cerebras manufacturing bring-up process execution to configure, test, and validate system performance prior to customer shipment 

• Collaborate cross-functionally with Asic, SW, Diagnostics, and QA teams to further automate and streamline the workflow for optimal manufacturing efficiency 

• Troubleshoot and resolve technical issues during system bring-up across Asic, SW, and QA domains 

• Design and implement efficient processes to manage and track system bring-up status and progress 

• Track and report on critical bring-up metrics to drive continuous improvement  

• Implement further SW automation and efficiencies to effectively scale the manufacturing bring-up process in support of the manufacturing roadmap 

Skills & Qualifications 

• BS or MS in EE, ECE, CS or equivalent work experience 

• 3+ years of industry experience in an operations environment 

• Experience in hardware bring-up and the debug of complex systems 

• Working knowledge and experience in Asic bringup and test processes 

• Working knowledge of scripting in languages such as Python and/or Perl 

• Proven experience in system bring-up and validation of complex computer systems or equivalent technologies 

• Understanding of computer system architecture and hardware components  

• Proficiency in scripting and automation tools for system bringup  

• Excellent problem-solving and communication skills with the ability to work collaboratively in a fast-paced environment 

• Very strong coordination and collaboration skills to manage a business-critical workflow directly in support of customer demand 

Preferred: 

• Familiarity in creating test and s/w infrastructure at large scale 

• Working across global time zones  

Location 

Bangalore, India/Toronto, Canada/ Sunnyvale, California.

The base salary range for this position is $170,000 to $230,000 annually.  Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.

About The Role

Cerebras Systems is a pioneer in large-scale AI Supercomputers. These multi-exaflop supercomputers are deployed in some of the biggest datacenters. These supercomputers are built using our Wafer-Scale Cluster technology - a cluster of several Wafer Scale Engine (WSE) chips. The Cluster engineering team is responsible for delivering software that are all-things related to cluster.

Responsibilities

• Automate bare-metal configuration of networking, OS, and application software in large clusters of Cerebras WSE, servers, and switches.
• Additional push button workflows for cluster upgrades, downgrades, and security patching with key metrics to minimize downtime on clusters.
• An orchestration and scheduler system for resource allocation, job submission C placements for a multi-user environment on a cluster.
• Seamless support for both on-premise and cloud mode deployment and operations.
• A robust system for monitoring, detecting and handling failures for a variety of resources on the clusters (including High Availability of clusters).
• Broad cluster and job monitoring and visualization capabilities, along with alerting systems.
• User facing tools to monitor the status of jobs and collect metrics.
• Administrator facing tools to manage and operate large clusters.

Skills & Qualifications

• Strong track record of software architecture, system design and development.
• Strong track record of development in distributed cluster.
• Strong understanding of Kubernetes (K8s) software ecosystem, Prometheus and Grafana.
• Strong development skills in GoLang, Python, bash.
• Strong debugging skills with distributed systems.
• Strong skill to develop tests for the new features and regress old features.

The Role:
In this exciting role, you will be responsible for bring up and optimizations of Cerebras’s Wafer Scale Engine (WSE). Suitable candidate will have experience delivering end to end solutions working closely with teams across chip design, system performance, software development and productization.

Responsibilities:

• On Wafer Scale Engines, develop and debug flows that embed well tested and deployable optimizations in production processes to reduce time and costs 
• Work on refining AI Systems across H/W-S/W design constraints such as di/dt, V-F characterization space, current and temperature limits in relation to optimizations for performance.
• Develop/Enhance infrastructure to enable silicon for real world workload testing
• Develop self-checking metrics, as well as instrumentation for debug and coverage
• Work with the silicon architects/designers, performance engineers and software engineers to enhance performance of Wafer Scale Engines.
• Work across domains such as, Software, Design, Verification, Emulation & Validation to refine and optimize performance and process.
• Work with CI/CD tools, git repositories, github, git actions/Jenkins, merge and release flows to streamline test and release.

Skills & Qualifications:

• BS/BE/B.Tech or MS/M.Tech in EE, ECE, CS or equivalent work experience
• 7-10+ years of industry experience
• 3-5 years of experience in Pre-silicon & Post Silicon ASIC hardware
• Good understanding of computer architecture and networking
• Excellent Coding in languages such as Python/Verilog/System Verilog and C
• Proficient in hardware/software codesign and layered architectures.
• Excellent debugging, analytical, and problem-solving skills
• Proficient in large scale testing and automation using pytest and python
• Good presentation skills to refine diverse information and put forth optimization strategies and results.
• Good interpersonal skills, ability & desire to work as a standout colleague
• Proven track record of working cross-functionally learning fast and driving issues to closure 

Preferred:

• Previous work in AI-ML with 100+ CPU core & communication fabric-based design.
• Familiarity with in-line testing and diagnostics using CPU memory and execution with self-checking.
• Knowledge of chip defect profiles and mitigation strategies across the hardware and software stack
• Familiarity in creating test and s/w infrastructure at large scale
• Working across global time zones 

Location:
Bangalore, India

Toronto, Canada

Sunnyvale, California.

For Sunnyvale: The base salary range for this position is $175,000 to $275,000 annually.  Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.

About The Role

As a Kernel Engineer on our team, you will develop high-performance software solutions at the intersection of hardware and software, developing high-performance software for cutting-edge AI and HPC workloads. Your focus will be on implementing, optimizing, and scaling deep learning operations to fully leverage our custom, massively parallel processor architecture.

You will be part of a world-class team responsible for the design, performance tuning, and validation of foundational ML and HPC kernels. This includes building a library of parallel and distributed algorithms that maximize compute utilization and push the boundaries of training efficiency for state-of-the-art AI models. Your work will be critical to unlocking the full potential of our hardware and accelerating the pace of AI innovation.

Responsibilities 

• Develop design specifications for new machine learning and linear algebra kernels and mapping to the Cerebras WSE System using various parallel programming algorithms.
• Develop and debug kernel library of highly optimized low level assembly instruction and C-like domain specific language routines to implement algorithms targeting the Cerebras hardware system.
• Develop and debug high-performance kernel routines in low-level assembly and a custom C-like (CSL) language, implementing algorithms optimized for the Cerebras hardware system.
• Using mathematical models and analysis to measure the software performance and inform design decisions.
• Develop and integrate unit and system testing methodologies to verify correct functionality and performance of kernel libraries.
• Study emerging trends in Machine Learning applications and help evolve Kernel library architecture to address computational challenges of the start-of-the-art Neural Networks.
• Interact with chip and system architects to optimize instruction sets, microarchitecture, and IO of next generation systems.

Skills & Qualifications 

• Bachelor’s, Master’s, PhD, or foreign equivalent in Computer Science, Computer Engineering, Mathematics, or a related field. 
• Proven experience leading technical teams, including mentoring engineers, setting technical direction, and driving execution. 
• Strong understanding of hardware architecture concepts and willingness to dive into new system architectures. 
• Proficiency in C++ and Python; experience with low-level systems programming. 
• Familiarity with library/API development best practices and performance optimization. 
• Excellent debugging skills across complex, layered software stacks. 

Preferred Skills & Qualifications 

• Experience leading teams in kernel development, performance optimization, or low-level systems programming. 
• Strong background in parallel algorithms and distributed memory systems. 
• Hands-on experience with accelerators such as GPUs, FPGAs, or other custom hardware. 
• Familiarity with machine learning workloads and frameworks like TensorFlow and PyTorch. 
• Understanding of HPC kernels and strategies for optimizing them on modern architectures.