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Sr. Multimedia System Architect

Ambiq Micro, Inc. · Austin, Texas, United States

Engineering Austin HQ Posted Apr 26, 2026

Company Overview

Ambiq is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions.

Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 290 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.

Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.

We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.

At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve.

If that's you, join us — the intelligence everywhere revolution starts here.

This role will be on-site 5 days a week in NW Austin.

Scope 

This role will be on-site 5 days a week in NW Austin.

As the Sr Multimedia System Architect at Ambiq, you will drive the architectural definition of various aspects of Ambiq’s low-power SoCs, with a specific focus on multimedia technologies, including graphics, display, video, imaging, and AI.

This is a critical function at Ambiq that supports the delivery of the world’s lowest-power electronic devices, enabling ubiquitous AI at the edge. This is a cross-functional position working with software and hardware engineering teams, applications engineering, and field teams to ensure alignment to product requirements, logical and physical design constraints, power and performance targets, and overall system architecture. This role will encompass high-level architectural specification, low-level microarchitecture, process-node-dependent analysis, power/performance modeling, and use-case definition.

Specific Responsibilities

Architecture specifications, including flow diagrams/sequences, power/performance models, and pseudocode
Customer interaction is needed to ensure alignment on key multimedia features and competitive product positioning 
Microarchitecture specifications (as applicable) and support to enable software and hardware design
Support for use case and test case development
Integration specifications to support system interfaces and external power management requirements/interfaces
Work with the FPGA team to bring up critical multimedia features
Work with software architecture to define multimedia flows, APIs, and hardware abstraction layers
Work with the physical design team to ensure robust/optimal implementation
Work with the design team to debug issues using RTL and gate-level simulation

Expectations for a successful candidate are as follows:

Work with Ambiq’s Marketing, Advanced Development, architecture, and engineering teams to drive development of new ultra-low power multimedia architectures on Ambiq Micro’s technology and product roadmaps
Develop high-level specifications and drive power/performance modeling and analysis
Analyze low-power multimedia technology and applications to identify opportunities for extending Ambiq’s low-power leadership
Define Ambiq’s multimedia and AI technology roadmap, including external and internal IP assessment, definition, and integration
Work with the engineering teams to transition the architecture specification into Ambiq Micro’s products
Work with systems, solutions, and software teams to ensure robust interfaces and support key product use cases
Support post-silicon analysis and efficient delivery of multimedia functionality to customers for mass production

Requirements

The candidate should be comfortable with independent specification, analysis, and development from high-level concepts through design and validation, as well as collaborative development with software and hardware engineering. A deep knowledge of graphics accelerators, graphics processing, display controllers and panel interfaces, image signal processors, video encoding/decoding, image sensors, or neural network accelerators specifically targeting wearable, IoT and mobile systems are critical, along with specific experience delivering low-power architectures to market. A working knowledge of SoC architecture, fabric/interconnect technologies, power management, and advanced process nodes is preferred. The candidate should be comfortable with complete system dataflows and modeling to guide hardware and software analysis and development.

Specific Experience

Minimum of 8 years of graphics, display, video, imaging or neural networks or similar architecture and design experience targeting wearable/IoT and mobile products
Experience developing novel multimedia architectures from idea to specification to design to post-silicon validation
Working knowledge of low-power modern mobile consumer electronic systems and embedded graphics, imaging or neural network processing required
Experience in embedded display technologies and low-power interfaces required
Experience in advanced process technologies is highly desirable
BS in Electrical Engineering, Computer Engineering or Computer Science (must have)
MS or PhD (preferred)
Individual contributor role, but some management/team lead experience is nice-to-have
Must have experience creating architectural specifications for System-on-Chip or similar complex hardware devices
Must communicate well (verbal and written)

Must be currently authorized to work in the United States for any employer. We do not sponsor or take over sponsorship of employment visas (now or in the future) for this role.

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Senior Director - System Architecture

Ambiq Micro, Inc. · Austin, Texas, United States

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Engineering Austin HQ Posted Apr 20, 2026

Company Overview

Ambiq is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions.

Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 290 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.

Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.

We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.

At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve.

If that's you, join us — the intelligence everywhere revolution starts here.

This role will be on-site 5 days a week in NW Austin.

Scope

The Sr Director of System Architecture will be responsible as the lead architect for developing next-generation ultra-low-power, AI-based SoC architectures for future Ambiq products. The candidate will own the development and coordination of new product architectures with the Marketing, Advanced Development, and Engineering teams. This position will report directly to the VP of Architecture. Areas of interest include: low-power embedded microprocessor and microcontroller-based System on Chip (SoC), interconnect technologies, memory technologies and topologies, clocking, power management, as well as preferred familiarity with 2D and 3D graphics accelerators and display controller technologies, video and image processing, and Neural Network processors/accelerators/NPUs. The candidate will have sufficient experience with system-level design, hardware/software partitioning, power, and performance modeling/tradeoffs.

Expectations for a successful candidate are as follows:

Work with Ambiq’s Marketing, Advanced Development, architecture, and engineering teams to drive development of new ultra-low power AI System on Chip (SoC) architectures on Ambiq Micro’s technology and product roadmaps
Develop high-level specifications and drive power/performance modeling and analysis
Analyze low power interconnect, memory and hardware accelerator technologies and applications to identify opportunities for extending Ambiq’s low power leadership
Support definition of Ambiq’s technology roadmap including external and internal IP assessment, definition, and integration
Work with the engineering teams to transition architecture specification into Ambiq Micro’s products
Work with systems, solutions, and software teams to ensure robust interfaces and support key product use cases
Support post-silicon analysis and efficient delivery of Ambiq products to customers for mass production

Specific Responsibilities

As the Sr Director of System Architecture at Ambiq, you will lead architecture definition of various Ambiq low power AI SoC’s from initial concept to mass production.

This is a critical functional at Ambiq to support delivering the world’s lowest power electronic devices to enable ubiquitous AI at the edge. This is a cross-functional position working with software and hardware engineering teams, applications engineering and field teams to ensure alignment to product requirements, logical and physical design constraints, power and performance targets and overall system architecture. This role will encompass high level architecture specification, low level microarchitecture, process node dependent analysis, power/performance modeling, analysis, and use case definition.

Architecture specifications including flow diagrams/sequences, power/performance models and pseudocode
Customer interaction as needed to ensure alignment on key features and competitive product positioning
Microarchitecture specifications (as applicable) and support to enable software and hardware design
Support for use case and test case development
Integration specifications to support system interfaces and external power management requirements/interfaces
Work with FPGA team to bringup critical SoC features
Work with software architecture to define flows, APIs and hardware abstraction layers
Work with physical design team to ensure robust/optimal implementation
Work with design team to debug issues using RTL and gate level simulation

Education and Experience:

The candidate should be comfortable with independent specification, analysis and development from high level concepts through design and validation as well as collaborative development with software and hardware engineering. A deep knowledge of embedded systems and microprocessor/microcontroller based AI System on Chip (SoC) specifically targeting wearable, IoT and mobile systems is critical along with specific experience delivering low power architectures to market. A working knowledge of SoC architecture, fabric/interconnect technologies, power management and advanced process nodes is required. Additionally, experience with wireless technologies and SoCs specifically Bluetooth, WiFi, NFC and GPS is preferred. The candidate should be comfortable with full system dataflows and modeling to guide hardware and software analysis and development.

Specific Experience

Minimum of 15 years of microprocessor/microcontroller based System on Chip or similar architecture and design experience targeting wearable/IoT and mobile products
Experience developing novel low power architectures from idea to specification to design to post-silicon validation
Working knowledge of low power modern mobile consumer electronic systems required
Experience in advanced process node technologies highly desirable
BS in Electrical Engineering, Computer Engineering or Computer Science (must have)
MS or PhD (strongly preferred)
Individual contributor role but strong technical and team leadership experience is desired.
Must have experience creating architectural specifications for System-on-Chip or similar complex hardware devices
Must communicate well (verbal and written)

**Must be currently authorized to work in the United States for any employer. We do not sponsor or take over sponsorship of employment visas (now or in the future) for this role.

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Apply to Ambiq Micro, Inc.

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Sr. Director - SoC Front End Engineering

Ambiq Micro, Inc. · Austin, Texas, United States

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Engineering Austin HQ Posted Apr 4, 2026

Company Overview

Ambiq is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions.

Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 290 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.

Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.

We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.

At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve.

If that's you, join us — the intelligence everywhere revolution starts here.

This role will be on-site 5 days a week in NW Austin.

Ambiq is seeking a Senior Director of Front-End Engineering to lead the design and implementation of our Edge AI MCU portfolio — driving the digital design, integration, and verification of ultra-low-power SoCs purpose-built for machine learning at the edge.

This is a hands-on, strategic leadership role responsible for building and scaling a world-class engineering organization that delivers breakthrough performance-per-microwatt. The ideal candidate combines deep technical acumen with people leadership excellence and has a proven record of bringing advanced SoCs from architecture to production.

Key Responsibilities

Technical Leadership

Own and drive the front-end design of Ambiq’s Edge AI MCU platforms — including CPU subsystems, neural accelerators, security, memory, and peripheral integration.
Lead architecture definition, RTL design, and subsystem integration focused on power-optimized AI compute and real-time performance.
Develop and enforce world-class design methodologies across RTL, verification (UVM), and static checks (lint, CDC, DFT readiness).
Partner with Architecture and Physical Design teams to ensure seamless PPA optimization and first-silicon success.
Evaluate and deploy next-generation EDA tools, design automation, and verification infrastructure to accelerate tapeout readiness.

Execution & Delivery

Drive design execution for multiple MCU programs concurrently, from concept through production tapeout.
Define and track program milestones, deliverables, and risk management plans with cross-functional stakeholders.
Establish design review frameworks and sign-off criteria ensuring predictable, high-quality execution.

People & Organization Leadership

Lead and grow a team of front-end engineers across design, verification, and integration disciplines.
Build a culture of technical excellence, collaboration, and accountability.
Mentor senior technical staff and create clear pathways for career growth and technical leadership.

Cross-Functional Collaboration

Collaborate closely with system architects, analog/mixed-signal, and validation teams to co-optimize hardware and software performance.
Partner with Product Management to translate application requirements (vision, voice, sensing) into silicon-level specifications.
Interface with Operations, Test, and Product Engineering to ensure DFT, yield, and manufacturability goals are achieved.

Qualifications

Required

20+ years of experience in semiconductor front-end design and verification, with 15+ years in a leadership capacity managing multi-disciplinary teams.
Proven track record of delivering MCU, SoC, or ASIC products into high-volume production.
Expertise in low-power digital design, including multi-voltage domains, power gating, and clock management.
Strong hands-on understanding of SystemVerilog, UVM, and synthesis/STA methodologies.
Familiarity with ARM Cortex-M/R/A or RISC-V architectures and on-chip interconnects (AHB/AXI).
Excellent communication and leadership skills; proven ability to lead complex, cross-site teams.
Education: BS/MS in Electrical or Computer Engineering required; Ph.D. preferred.

Preferred

Experience with subthreshold or near-threshold design techniques and power modeling.
Knowledge of EDA flows at advanced process nodes (16nm and below).

What Success Looks Like

First-pass silicon success across multiple Edge AI MCU programs.
Demonstrable improvements in design productivity, quality, and predictability.
Market-leading metrics enabling industry-best energy efficiency.
A cohesive, motivated team operating at high technical and cultural standards.

**Must be currently authorized to work in the United States for any employer. We do not sponsor or take over sponsorship of employment visas (now or in the future) for this role.

Ready to apply?

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Sr. Staff Engineer - Timing Methodology

Ambiq Micro, Inc. · Austin, Texas, United States

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Engineering Austin HQ Posted Mar 19, 2026

Company Overview

Ambiq is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions.

Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 290 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.

Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.

We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.

At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve.

If that's you, join us — the intelligence everywhere revolution starts here.

Scope 

As a Sr. Staff Engineer - Timing Methodology, you will play a critical role in transforming our cutting-edge designs into silicon reality. You will be responsible for all aspects of timing closure from defining methodology, developing flows, closing timing at the block level and timing convergence at SOC level as well.

Responsibilities:

In-depth expertise on Timing Methodology and Timing closure both at block level and SOC level in modern Finfet and multi-patterning based process technologies using Cadence Tempus or Synopsys Primetime.
Own all aspects of timing convergence, including Signoff to build timing correlation, PVTRc corner definition, timing margining, extraction, signoff timing analysis, glitch noise analysis, timing ECOs and interplay and tradeoff with power.
Own, define and drive constraints in collaboration with RTL and IP Vendors.Have in-depth understanding of all timing collaterals for different type of Ips, namely, hard IP, Stdcell and Memory etc.
Partner with post-si bringup and testing to ensure pre-si timing correlates well to post-si.
Collaborate closely with RTL designers, DFT and other stakeholders to achieve best in class PPA.
Continuously improve timing analysis methodologies and scripts to enhance efficiency and flow consistency. Stay at the forefront of advancements in STA and new process nodes

Requirements

Master's degree in Electrical Engineering or Computer Engineering (or a related field)
Minimum of 8 years of experience in Timing Analysis and convergence.
Proven expertise in static timing analysis using industry-standard timing tools like Primetime (Synopsys) or Tempus (Cadence).
In-depth understanding of digital circuit design principles and concepts
Strong proficiency with industry-standard EDA tools (e.g., Synopsys, Cadence)
Excellent analytical and problem-solving skills
Ability to work effectively in a team environment and communicate complex technical concepts clearly
Experience with scripting languages (e.g., TCL, Python)
Experience with PnR tools like Fusion Compiler (Synopsys) and Innovus (Cadence) is a plus.

Must be currently authorized to work in the United States for any employer. We do not sponsor or take over sponsorship of employment visas (now or in the future) for this role.

Ready to apply?

Apply to Ambiq Micro, Inc.

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Ambiq Micro, Inc.

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