As a Senior Embedded Software Engineer, you will own critical subsystems within our embedded stack, and your architectural decisions will shape the product. You'll bridge hardware and high-level applications across Embedded Linux, RTOS (Zephyr/FreeRTOS), and bare-metal environments — and you'll be the technical point of contact for product, hardware, cloud, and safety teams when those subsystems intersect. 

What You'll Do

• Own Critical Subsystems: Architect and implement C/C++ software for safety-critical embedded systems where reliability is non-negotiable. Your decisions will influence the product's long-term architecture.
• Drive Platform Architecture: Architect Embedded Linux user-space applications and real-time firmware for FreeRTOS/Zephyr devices. Design for failure modes, future scale, and platform reuse — not just the current product.
• Own Safety Compliance: Own the safety compliance posture of your subsystem. Partner with the safety team to embed IEC 61508 rigor into design and code without slowing development velocity.
• Architect CI/CD: Architect and evolve our GitLab CI/CD pipelines for firmware. Set the bar for automated testing, deterministic builds, and release confidence.
• Hardware Bring-Up & Debugging: Lead bring-up of new hardware. Diagnose complex bugs across the hardware/software boundary using JTAG, GDB, logic analyzers, and oscilloscopes.
• Cross-Team Influence: Serve as the primary technical point of contact for product, QE, hardware, and cloud teams on subsystem design, integration, and trade-offs.

What You Bring

• Experience: 6+ years of hands-on embedded software development, including 2+ years working on safety-critical or regulated products.
• Core Languages: Expert proficiency in C and C++, including modern C++ patterns and safe memory management at scale.
• OS Depth: Deep experience with Embedded Linux (including BSP and low-level architecture) and proficiency with at least one RTOS (Zephyr or FreeRTOS).
• Low-Level Linux: Working knowledge of Board Support Packages (BSP) and device drivers — you've debugged below the kernel boundary, not just above it.
• Connectivity: Strong fluency with IP networking and standard interfaces (UART, SPI, I2C, USB, CAN).
• Tooling: Proficient with Python for scripting/automation. Experience architecting CI/CD workflows for firmware (GitLab preferred).
• Debugging: Expert with oscilloscopes, logic analyzers, JTAG, and GDB. You can localize hard bugs across the hardware/software boundary independently.
• Safety & Quality: Experience working under or implementing functional safety standards (IEC 61508, ISO 26262, DO-178C, or equivalent).
• Education: B.S. in Computer Engineering, Electrical Engineering, Computer Science, or equivalent experience.

Bonus Points

• Experience with wireless stacks (BLE, ISM, Wi-Fi).
• Background in regulated industries (Medical, Automotive, Aerospace, Industrial).
• Contributions to open-source embedded or RTOS projects.

How You'll Show Up — The FORT Blueprint at this Level

• Accomplish the Impossible: You proactively automate manual toil and find creative paths through ambiguous architectural problems.
• Own Your Priorities: You're accountable for project milestones and the long-term health of your subsystem — not just the next ticket.
• Think Out Loud: You lead architectural design reviews and communicate complex trade-offs clearly to engineers and non-engineers alike.
• Build Together: You run retrospectives and post-mortems, mentor more junior engineers, and align technical goals across hardware, firmware, SIT, and cloud teams.

About Us

We are on a mission to accomplish the impossible and build a safer future of autonomous and robotic machines. We are looking for a growth-minded and dynamic Infrastructure Engineer - Hardware-In-the-Loop (HIL) who embodies our values of excellence, ownership, collaboration, and effective communication.

Role Overview

We are seeking a Senior Engineer focused on building and scaling HIL test infrastructure and automation platforms. This role goes beyond test execution — you will design multi-bench systems, CI/CD-driven workflows, and reliable lab infrastructure to enable efficient, repeatable validation of Fort products.

Responsibilities

• Design and scale Hardware-in-the-Loop (HIL) benches for system and device-level validation
• Build infrastructure for multi-bench orchestration (scheduling, parallel execution, resource management)
• Build and manage DevOps workflows for test infrastructure, including pipeline automation, environment provisioning, and artifact management.
• Design and integrate CI/CD pipelines for hardware-based testing
• Build containerized (like Docker) environments for reproducible test execution
• Develop systems to control hardware programmatically (power, connectivity, devices)
• Improve lab infrastructure, fixtures, and test environments for scalability and reliability
• Build logging, metrics, and observability systems for debugging and traceability
• Collaborate with firmware, cloud, and hardware teams to resolve system-level issues
• Mentor engineers and drive best practices for scalable test infrastructure

Qualifications

• Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, Computer Science, or related discipline preferred
• 5+ years of experience in embedded systems, robotics, or hardware-software systems
• Strong experience with HIL/SIL systems or test infrastructure
• Proficiency in Python for automation/framework development
• Experience designing automation systems at scale (multi-device, multi-environment, or distributed systems)
• Strong experience with CI/CD systems (GitLab, Jenkins, or similar), including pipeline design and automation workflows
• Experience with containerization technologies (Docker) and building reproducible development and test environments
• Familiarity with DevOps practices and scalable system design
• Experience with embedded communication protocols (Ethernet, CAN, BLE, Wi-Fi)
• Strong debugging skills across hardware and software systems
• Ability to design modular, maintainable systems and work cross-functionally

Preferred

• Experience with distributed systems or orchestration platforms
• Experience with cloud/logging tools (Azure, Grafana, etc.)
• Knowledge of safety standards (IEC 61508, ISO 26262)
• Hands-on hardware/fixture design experience
• Interest in applying AI/ML in daily engineering workflows