About Akuna: 

Akuna Capital is an innovative trading firm with a strong focus on collaboration, cutting-edge technology, data driven solutions, and automation. We specialize in providing liquidity as an options market-maker – meaning we are committed to providing competitive quotes that we are willing to both buy and sell. To do this successfully, we design and implement our own low latency technologies, trading strategies, and mathematical models. 

Our Founding Partners first conceptualized Akuna in their hometown of Sydney. They opened the firm’s first office in 2011 in the heart of the derivatives industry and the options capital of the world – Chicago. Today, Akuna is proud to operate from additional offices in Sydney, Shanghai, London, and Singapore. 

What you’ll do as a Senior FPGA Engineer at Akuna: 

We are looking for Senior FPGA Engineers to accelerate various portions of our trading platform. Members of the Hardware Development team will work with cutting-edge FPGA technology and high-performance computing architectures – owning projects end-to-end and making Akuna’s systems faster and smarter. In this role, you will: 

• Own projects - driving project progression from inception, requirements, architecture, design entry, timing closure and verification
• Partner closely with the Low Latency, Trading and other teams to foster and develop ideas that performance 
• Develop and maintain RTL in Verilog/SystemVerilog
• Write and maintain verification environments
• Design optimization for timing closure
• Develop and maintain project documentation 

Qualities that make great candidates: 

• 10+ years of experience in FPGA or ASIC digital logic design – network traffic experience a strong plus
• Deep Verilog/SystemVerilog or VHDL skills
• Solid grasp of static timing analysis, synthesis, and place-and-route tools  
• Familiarity with algorithms, data structures, and verification/unit testing workflows
• Python and Bash scripting fluency
• Enthusiasm for collaboration with other FPGA team members as well as members from software and trading teams
• Open mindedness for novel development approaches and architectures
• Bachelor’s degree in Computer or Electrical Engineering, or related field; master’s degree a plus 
• The ability to react quickly and accurately to rapidly changing market conditions, including the ability to quickly and accurately respond and/or solve math and coding problems are essential functions of the role

In addition to technical skillsets, Akuna values the unique perspectives people can bring to the table to collaboratively solve complex problems and drive Akuna forward. We want everyone to feel empowered to apply. We welcome your application and encourage you to take the first steps toward your future with us!

In accordance with Illinois Equal Pay Act, the minimum base salary starts at $145,000. Exact compensation offered may vary based on many factors including, but not limited to, the candidate’s experience, qualifications, and skill set. This role is also eligible for a discretionary performance bonus as part of the total compensation package and includes a comprehensive benefits package that may encompass employer-paid medical, dental, vision, retirement contributions, paid time off, and other benefits. The minimum base salary herein was determined in good faith by Akuna Capital LLC.

At Optiver we pride ourselves on being real engineers, not just coders. Our engineers work closely with traders to identify the business problems we face and determine how they should be solved. We apply a disciplined and scientific approach. We engineer simple, well-architected solutions that meet the dynamic needs of our traders. Our passion is to solve problems which really matter to the business, and we take pride in the quality of our solutions.

Hardware Engineers at Optiver build hardware-based trading systems ranging from low latency algorithms to high bandwidth computation. They are responsible for owning all aspects of the development process from ideation to implementation creating bespoke solutions to our complex trading problems. Their systems have little room for failure which add to the stability of the market, not detract from it. Working in close collaboration with software engineers and traders, hardware engineers deeply understand our trading problems and create dynamic, well-architected systems that make an impact in a matter of days and weeks rather than months and years.

What you’ll do: 

• Accelerate network infrastructure and trading system components with high-speed hardware designs.
• Research new low-latency techniques and platforms and identify opportunities for integration with our trading system.
• Work in a multidisciplinary team of traders, software developers, and infrastructure engineers.
• Leverage the best hardware available or build in-house versions to ensure our FPGAs can interface with cutting edge server hardware.
• Manage relationships with 3rd party vendors.

What you’ll get:

You’ll join a culture of collaboration and excellence, surrounded by curious thinkers and creative problem-solvers. Motivated by a passion for continuous improvement, you’ll thrive in a supportive, high-performing environment alongside talented colleagues, collectively tackling some of the toughest challenges in the financial markets.

In addition, you’ll receive:

• The opportunity to work alongside best-in-class professionals from over 40 different countries
• A highly competitive compensation package
• Global profit-sharing pool and performance-based bonus structure
• 401(k) match up to 50%
• Comprehensive health, mental, dental, vision, disability, and life coverage
• 25 paid vacation days alongside market holidays
• Extensive office perks, including breakfast, lunch and snacks, regular social events, clubs, sporting leagues and more

Who you are:

• A Bachelor’s degree in CE, EE, CS, or related technical field.
• Experience designing, coding, testing, and verifying FPGAs and/or ASICs.
• Experience coding in VHDL, Verilog, SystemVerilog as well as C or C++.
• Experience with RTL synthesis, writing timing, area, and other relevant constraints.
• Experience with digital simulators and self-checking test benches.
• Experience supporting post-silicon bring-up and debugging a plus.
• Ability to work closely with software developers to rapidly deliver integrated systems.

Who we are:

At Optiver, our mission is to improve the market by injecting liquidity, providing accurate pricing, increasing transparency, and stabilising the market no matter the conditions. With a focus on continuous improvement, we prioritise safeguarding the health and efficiency of the markets for all participants. As one of the largest market making institutions, we are a respected partner on 100+ exchanges across the globe.

Optiver Chicago’s culture parallels the energetic city we’re immersed in. Home to the Chicago Board of Trade, Chicago Board Options Exchange, and Chicago Mercantile Exchange, Chicago has established itself as the trading capital of the US. Active on leading US exchanges, Optiver’s Chicago office trades a wide range of products from listed derivatives to cash equities, ETFs, bonds and foreign exchange

Our differences are our edge. Optiver does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, physical or mental disability, or other legally protected characteristics.

Optiver is looking to add FPGA Engineers to its Automated Trading Systems (ATS) team. ATS solve a variety of problems with high degrees of difficulty: managing scarce bandwidth resources, responding to market events with extremely low latency, and automatically pricing diverse sets of financial instruments with near-zero error tolerance. We build systems with little room for failure which add to the stability of the market, not detract from it. These systems must be simple, flexible, and well-architected so they can quickly be changed to meet the dynamic needs of our traders. We already have a team of great engineers, but we need more.

Optiver Hardware Engineers:

• Accelerate network infrastructure and trading system components with high speed hardware designs.
• Research new low-latency techniques and identify opportunities for integration with our trading system.
• Work in a multidisciplinary team of traders, software developers, and infrastructure engineers.
• Leverage the best hardware available, ensuring our FPGAs can interface with cutting edge server hardware.

What you'll need:

• A Bachelor’s degree in CE, EE, CS, or related technical field
• Experience designing FPGAs in VHDL or Verilog. We use VHDL.
• Experience coding in VHDL, Verilog, SystemVerilog, C, or C++
• Experience with digital simulators and self-checking test benches a plus
• Ability to work closely with software developers to rapidly deliver integrated systems.

Who we are:

Optiver is a tech-driven trading firm and leading global market maker. As one of the oldest market making institutions, we are a trusted partner of 70+ exchanges across the globe. Our mission is to constantly improve the market by injecting liquidity, providing accurate pricing, increasing transparency and acting as a stabilising force no matter the market conditions. With a focus on continuous improvement, we participate in the safeguarding of healthy and efficient markets for everyone who participates.

Based in ‘The Domain’ neighborhood, Optiver’s Austin office serves as the firm’s innovation nucleus, with a strong focus on quantitative research, software and hardware engineering initiatives. With tech innovation an integral part of our core business, the booming city proved an ideal backdrop for our heavy investment into machine learning, research infrastructure and big data computing. What’s more, with world-class music, food and art scenes, as well as countless scenic outdoor activities, the quality of life for Austin Optiverians is second to none.

We are deploying machine learning directly onto custom hardware – and we want you to help drive it from the ground up. This is an initiative where you'll have the rare opportunity to architect solutions from scratch, influence technical research direction, and see your work drive real impact in one of the most demanding computing environments in the world.

We build the hardware, the software, and the infrastructure, so when you hit a bottleneck, you can fix it - there's no vendor to wait on and no abstraction layer you're not allowed to touch. If you've ever wanted to push the boundaries of what's computationally possible, this role is for you. We're looking for researchers and experienced engineers from any background. Trading experience is a bonus, not a prerequisite.

Your Core Responsibilities

• Architect and co-design ML models with traders, quant researchers, and software engineers, treating hardware constraints (latency budgets, resource limits, numerical precision) as first-class design inputs
• Shape our custom hardware roadmap by translating ML model requirements into concrete architectural decisions
• Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions from proof-of-concept through production
• Track and evaluate emerging research in neural architecture search, machine learning systems and quantization methods, and determine what translates to measurable improvements in our systems

Your Skills and Experience

• Solid understanding of hardware constraints and design trade-offs (e.g., pipelining, resource utilization, fixed-point arithmetic) that shape how ML models can be efficiently mapped onto FPGAs or custom ASICs
• Experience with hardware fundamentals, whether through VHDL/SystemVerilog development, HLS tools, or ML-to-hardware frameworks like hls4ml, FINN, or Vitis AI
• Understanding of machine learning fundamentals – neural network architectures, inference optimization, quantization techniques, ML frameworks such as PyTorch/TensorFlow
• Proficiency in Python, C++, or similar languages for tooling, testing, and simulation
• Strong communication skills and ability to work collaboratively across disciplines with both technical and non-technical teams

Nice to Have

• Exposure to ML compiler infrastructure such as MLIR, TVM, XLA, or similar tools for lowering and optimizing models for hardware targets
• Background in latency-sensitive or resource-constrained systems including high-frequency trading, particle physics data acquisition, real-time signal processing, or similar domains
• Familiarity with functional verification methodologies (for example SystemVerilog, UVM, Cocotb)
• Advanced degree (MS or PhD) in EE, CS, Physics, or related field, or equivalent depth through industry or research experience

Please only apply to one of our Job Postings. At the bottom of the application questions below you'll have the option to indicate if there are any other roles here at Radix that you might be interested in. Please do not submit multiple applications for different positions.  

As part of the FPGA team, you’ll work with cutting-edge technology to improve performance and latency of our systems. As a member of a small and dynamic team, you’ll not only work to solve production issues but also come to the table with new and innovative ideas for automated trading.

Job Functions:

• Design and build new scalable systems
• Maintaining FPGA code
• Use Python for unit testing
• Use model-sim for simulation
• Debug and fix FPGA issues
• Innovate and design solutions that will overcome current limitations 

Key Capabilities:

• PhD in Electrical Engineering, Computer Architecture, or another closely-related engineering discipline (in the progress of obtaining or has obtained)
• Experience coding in VHDL/verilog
• Proficiency with Python for unit testing
• Used Xilnix and/or Altera FPGAs
• Familiar with Modelsim
• Previously worked on large FPGA stratix V or/and Virtex ultra-scale+ is a plus
• Knowledge of networking protocols:IP,/TCP/UDP etc.
• Highly analytical mindset
• Excellent communication skills, both written and oral
• Results oriented, highly flexible, team player
• Can tackle new things without a lot of help; fast learner
• Driven and self-guided
• Ability to function independently and take ownership
• Ability to multitask and iterate quickly towards a better solution

We are deploying machine learning directly onto custom hardware – and we want you to help drive it forward. This PhD internship is an opportunity to work on research that has direct impact on IMC's work tackling open problems at the frontier of low-latency ML inference and hardware acceleration.

You'll work alongside IMC engineers in one of the most demanding low-latency computing environments in the world. You'll own a focused research project from start to finish, present your findings to the team, and leave behind a prototype or benchmark that we can build on.

Your Core Responsibilities

• Architect and develop an ML focused research project based on a real-world trading environment
• Work hands-on with hardware engineers to implement, verify, and deploy ML inference solutions
• Track and evaluate emerging research in neural architecture search, machine learning systems and quantization methods, and determine what translates to measurable improvements in our systems
• Present your project to the team, deepening our collective understanding of an area of ML acceleration
• Gain hardware design fundamentals from skilled RTL developers and learn how they apply to our industry
• Build skills to evaluate research not only from an academic perspective, but through real-world performance constraints, engineering costs, and industry impact

Your Skills and Experience

• Currently enrolled in a PhD program in Electrical Engineering, Computer Science, Physics, or a related field
• Solid understanding of hardware constraints and design trade-offs (e.g., pipelining, resource utilization, fixed-point arithmetic) that shape how ML models can be efficiently mapped onto FPGAs or custom ASICs
• Experience with hardware fundamentals, whether through VHDL/SystemVerilog development, HLS tools, or ML-to-hardware frameworks like hls4ml, FINN, or Vitis AI
• Understanding of machine learning fundamentals – neural network architectures, inference optimization, quantization techniques, ML frameworks such as PyTorch/TensorFlow
• Proficiency in Python or similar languages for tooling, testing, and simulation
• Strong communication skills and ability to work collaboratively across disciplines with both technical and non-technical teams

You may submit one application per role each year.  We strongly encourage you to focus on applying to a single role that best matches your skills and interests.  Though you may apply to multiple roles, please note that each application will be evaluated based on the specific criteria established for that particular role. If you have already applied for this position during the current recruitment season and were not selected, you may reapply when the next recruitment season begins in 2027.

The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information.

Base Salary: $225,000

Are you excited by the idea of applying your hardware development expertise to power ultra-low-latency trading systems? Do you want to explore new architectures that push the limits of performance and help take some of our most sophisticated trading strategies to the next level? If so, we encourage you to read on! 

At CTC, we’re looking for a Senior FPGA Engineer to join our FPGA development team to do just that and more. As a member, you'll work closely with other specialists, traders, and quants to design and build the next generation of end-to-end trading systems. While helping craft our development environment and processes, you’ll architect solutions, influence design choices across teams, and see your work translate into real-time impact. 

Responsibilities

• Partner with a skilled team to define and implement a pragmatic architectural vision with a focus on ultra-low-latency and reliability. 
• Collaborate with senior technology leaders to continuously improve our trading platform design. 
• Build a deep understanding of trading workflows, quantitative models, and system performance needs while working with a multidisciplinary team. 
• Develop an implementation roadmap in partnership with Quant and Trading to deliver incremental improvements in trading performance and long-term architectural innovation. 
• Lead design implementation efforts, contribute to team code reviews, and champion best practices around performance, logic, standard methodologies and maintainability issues to ensure code-level consistency and scalability. 

Qualifications

• Proven experience and expertise with FPGA development. 
• Advanced proficiency using HDLs, with an emphasis on SystemVerilog or VHDL. 
• Comfortable working in Python and/or C++ for developing tools, testbenches, and integrations. 
• Demonstrated understanding of computer architectures. 
• Enthusiasm for applying modern, agile design and testing practices. 

Nice to Have 

• Experience in financial markets or trading environments. 
• Knowledge of common networking protocols like TCP/UDP and multicast.