SPACE SYSTEMS

At Rocket Lab, we’re not just launching rockets — we're building the future of space. Our Space Systems team builds everything from complete spacecraft, precision payloads to the components and subsystems that allow them to thrive in space, like solar panels, flight software, star trackers, optical systems, separation systems, radios, and more.

Our Space Systems team has enabled more than 1,700 missions, ranging from interplanetary exploration, in-space manufacturing to national security and defense initiatives. The team has built spacecraft, payloads, and components for missions to the Moon and Mars, working with partners including NASA, the Space Development Agency, and the U.S. Space Force. Whether it’s a single high-performance spacecraft, constellation, or the vertically integrated components that help them get to space — our world class Space Systems team is empowering some of the boldest and most ambitious space missions.

SENIOR FPGA ENGINEER II

Rocket Lab’s Optical Systems division solves mission-critical space domain and Intelligence, Surveillance, and Reconnaissance (ISR) challenges for Department of Defense (DoD) and Intelligence Community (IC) customers. Our vision is to revolutionize the space-based payload market with innovative and novel designs for space, terrestrial, and airborne environments. Building on more than 20 years of electro-optical and infrared systems innovation from Geost, Optical Systems delivers solutions to the warfighter for responsive, scalable sensing solutions across all orbital domains.

You will be a Senior FPGA Engineer II based at our Rocket Lab Optical Systems worksites in Long Beach, CA; Littleton, CO; Phoenix, AZ; Albuquerque, NM; Chantilly, VA; and Tucson, AZ. You will design Xilinx FPGAs in VHDL to support Tranche 3 of the Space Development Agency’s Proliferated Warfighter Space Architecture (PWSA).

WHAT YOU’LL GET TO DO

• Work with the hardware design team on requirements.
• Complete FPGA logic design, coding, simulation, and testing.
• Support hardware and software development teams in bring-up and test of products.
• Provide subject-matter expertise regarding design and automated test development procedures to customers and production support team.
• Perform research and analysis of data, such as customer proposed specifications, datasheets, or manuals to determine design approach and/or feasibility.
• Execute debugging of the design in the lab.
• Perform synthesis, implementation, and timing analysis.

YOU’LL BRING THESE QUALIFICATIONS AS SENIOR FPGA ENGINEER II:

• Bachelor’s degree in computer engineering or electrical engineering or equivalent discipline with 8+ years of experience
• Experience in FPGA firmware design with VHDL.
• Ability to obtain and maintain an U.S. Government Security Clearance

THESE QUALIFICATIONS WOULD BE NICE TO HAVE: 

• Experience with Xilinx/AMD Versal architecture
• Experience with FPGAs and embedded systems in a radiation environment, including SEU/SEL impact and mitigation.
• Experience in FPGA- or ASIC-based image processing algorithms.
• Experience in both creating IP from scratch in RTL and integrating existing IP into RTL and block designs.
• Familiarity with C, Python or MATLAB and/or experience translating algorithms from a scripted language to HDL.
• Experience with software interfaces including interrupts and DMA.
• Experience with DDR4, Aurora, and high-speed transceiver design and verification.
• Familiarity with AXI Stream and AXI Memory Mapped interfaces.
• PCB design and schematic capture and layout with tools such as Altium Designer.

ADDITIONAL REQUIREMENTS:

• Specific vision abilities required by this job include close vision, distance vision, peripheral vision, depth perception, and the ability to focus
• Regularly required to sit, use hands and fingers, operate computer keyboard and controls, and communicate verbally and in writing
• Must be physically able to commute to buildings

SPACE SYSTEMS

At Rocket Lab, we’re not just launching rockets — we're building the future of space. Our Space Systems team builds everything from complete spacecraft, precision payloads to the components and subsystems that allow them to thrive in space, like solar panels, flight software, star trackers, optical systems, separation systems, radios, and more.

Our Space Systems team has enabled more than 1,700 missions, ranging from interplanetary exploration, in-space manufacturing to national security and defense initiatives. The team has built spacecraft, payloads, and components for missions to the Moon and Mars, working with partners including NASA, the Space Development Agency, and the U.S. Space Force. Whether it’s a single high-performance spacecraft, constellation, or the vertically integrated components that help them get to space — our world class Space Systems team is empowering some of the boldest and most ambitious space missions.

SENIOR FPGA ENGINEER II

Rocket Lab’s Optical Systems division solves mission-critical space domain and Intelligence, Surveillance, and Reconnaissance (ISR) challenges for Department of Defense (DoD) and Intelligence Community (IC) customers. Our vision is to revolutionize the space-based payload market with innovative and novel designs for space, terrestrial, and airborne environments. Building on more than 20 years of electro-optical and infrared systems innovation from Geost, Optical Systems delivers solutions to the warfighter for responsive, scalable sensing solutions across all orbital domains.

You will be a Senior FPGA Engineer II based at our Rocket Lab Optical Systems worksites in Long Beach, CA; Littleton, CO; Phoenix, AZ; Albuquerque, NM; Chantilly, VA; and Tucson, AZ. You will design Xilinx FPGAs in VHDL to support Tranche 3 of the Space Development Agency’s Proliferated Warfighter Space Architecture (PWSA).

WHAT YOU’LL GET TO DO

• Work with the hardware design team on requirements.
• Complete FPGA logic design, coding, simulation, and testing.
• Support hardware and software development teams in bring-up and test of products.
• Provide subject-matter expertise regarding design and automated test development procedures to customers and production support team.
• Perform research and analysis of data, such as customer proposed specifications, datasheets, or manuals to determine design approach and/or feasibility.
• Execute debugging of the design in the lab.
• Perform synthesis, implementation, and timing analysis.

YOU’LL BRING THESE QUALIFICATIONS AS SENIOR FPGA ENGINEER II:

• Bachelor’s degree in computer engineering or electrical engineering or equivalent discipline with 8+ years of experience
• Experience in FPGA firmware design with VHDL.
• Ability to obtain and maintain an U.S. Government Security Clearance

THESE QUALIFICATIONS WOULD BE NICE TO HAVE: 

• Experience with Xilinx/AMD Versal architecture
• Experience with FPGAs and embedded systems in a radiation environment, including SEU/SEL impact and mitigation.
• Experience in FPGA- or ASIC-based image processing algorithms.
• Experience in both creating IP from scratch in RTL and integrating existing IP into RTL and block designs.
• Familiarity with C, Python or MATLAB and/or experience translating algorithms from a scripted language to HDL.
• Experience with software interfaces including interrupts and DMA.
• Experience with DDR4, Aurora, and high-speed transceiver design and verification.
• Familiarity with AXI Stream and AXI Memory Mapped interfaces.
• PCB design and schematic capture and layout with tools such as Altium Designer.

ADDITIONAL REQUIREMENTS:

• Specific vision abilities required by this job include close vision, distance vision, peripheral vision, depth perception, and the ability to focus
• Regularly required to sit, use hands and fingers, operate computer keyboard and controls, and communicate verbally and in writing
• Must be physically able to commute to buildings

SPACE SYSTEMS

At Rocket Lab, we’re not just launching rockets — we're building the future of space. Our Space Systems team builds everything from complete spacecraft, precision payloads to the components and subsystems that allow them to thrive in space, like solar panels, flight software, star trackers, optical systems, separation systems, radios, and more.

Our Space Systems team has enabled more than 1,700 missions, ranging from interplanetary exploration, in-space manufacturing to national security and defense initiatives. The team has built spacecraft, payloads, and components for missions to the Moon and Mars, working with partners including NASA, the Space Development Agency, and the U.S. Space Force. Whether it’s a single high-performance spacecraft, constellation, or the vertically integrated components that help them get to space — our world class Space Systems team is empowering some of the boldest and most ambitious space missions.

SENIOR FPGA ENGINEER II

Rocket Lab’s Optical Systems division solves mission-critical space domain and Intelligence, Surveillance, and Reconnaissance (ISR) challenges for Department of Defense (DoD) and Intelligence Community (IC) customers. Our vision is to revolutionize the space-based payload market with innovative and novel designs for space, terrestrial, and airborne environments. Building on more than 20 years of electro-optical and infrared systems innovation from Geost, Optical Systems delivers solutions to the warfighter for responsive, scalable sensing solutions across all orbital domains.

You will be a Senior FPGA Engineer II based at our Rocket Lab Optical Systems our headquarters in Long Beach, CA and at our worksites in Littleton, CO; Phoenix, AZ; Albuquerque, NM; Chantilly, VA; and Tucson, AZ. You will design Xilinx FPGAs in VHDL to support Tranche 3 of the Space Development Agency’s Proliferated Warfighter Space Architecture (PWSA).

WHAT YOU’LL GET TO DO

• Work with the hardware design team on requirements.
• Complete FPGA logic design, coding, simulation, and testing.
• Support hardware and software development teams in bring-up and test of products.
• Provide subject-matter expertise regarding design and automated test development procedures to customers and production support team.
• Perform research and analysis of data, such as customer proposed specifications, datasheets, or manuals to determine design approach and/or feasibility.
• Execute debugging of the design in the lab.
• Perform synthesis, implementation, and timing analysis.

YOU’LL BRING THESE QUALIFICATIONS AS SENIOR FPGA ENGINEER II:

• Bachelor’s degree in computer engineering or electrical engineering or equivalent discipline with 8+ years of experience
• Experience in FPGA firmware design with VHDL.
• Ability to obtain and maintain an U.S. Government Security Clearance

THESE QUALIFICATIONS WOULD BE NICE TO HAVE: 

• Experience with Xilinx/AMD Versal architecture
• Experience with FPGAs and embedded systems in a radiation environment, including SEU/SEL impact and mitigation.
• Experience in FPGA- or ASIC-based image processing algorithms.
• Experience in both creating IP from scratch in RTL and integrating existing IP into RTL and block designs.
• Familiarity with C, Python or MATLAB and/or experience translating algorithms from a scripted language to HDL.
• Experience with software interfaces including interrupts and DMA.
• Experience with DDR4, Aurora, and high-speed transceiver design and verification.
• Familiarity with AXI Stream and AXI Memory Mapped interfaces.
• PCB design and schematic capture and layout with tools such as Altium Designer.

ADDITIONAL REQUIREMENTS:

• Specific vision abilities required by this job include close vision, distance vision, peripheral vision, depth perception, and the ability to focus
• Regularly required to sit, use hands and fingers, operate computer keyboard and controls, and communicate verbally and in writing
• Must be physically able to commute to buildings

SPACE SYSTEMS

At Rocket Lab, we’re not just launching rockets — we're building the future of space. Our Space Systems team builds everything from complete spacecraft, precision payloads to the components and subsystems that allow them to thrive in space, like solar panels, flight software, star trackers, optical systems, separation systems, radios, and more.

Our Space Systems team has enabled more than 1,700 missions, ranging from interplanetary exploration, in-space manufacturing to national security and defense initiatives. The team has built spacecraft, payloads, and components for missions to the Moon and Mars, working with partners including NASA, the Space Development Agency, and the U.S. Space Force. Whether it’s a single high-performance spacecraft, constellation, or the vertically integrated components that help them get to space — our world class Space Systems team is empowering some of the boldest and most ambitious space missions.

SENIOR FPGA ENGINEER II

Rocket Lab’s Optical Systems division solves mission-critical space domain and Intelligence, Surveillance, and Reconnaissance (ISR) challenges for Department of Defense (DoD) and Intelligence Community (IC) customers. Our vision is to revolutionize the space-based payload market with innovative and novel designs for space, terrestrial, and airborne environments. Building on more than 20 years of electro-optical and infrared systems innovation from Geost, Optical Systems delivers solutions to the warfighter for responsive, scalable sensing solutions across all orbital domains.

You will be a Senior FPGA Engineer II based at our Rocket Lab Optical Systems worksites in Long Beach, CA; Littleton, CO; Phoenix, AZ; Albuquerque, NM; Chantilly, VA; and Tucson, AZ. You will design Xilinx FPGAs in VHDL to support Tranche 3 of the Space Development Agency’s Proliferated Warfighter Space Architecture (PWSA).

WHAT YOU’LL GET TO DO

• Work with the hardware design team on requirements.
• Complete FPGA logic design, coding, simulation, and testing.
• Support hardware and software development teams in bring-up and test of products.
• Provide subject-matter expertise regarding design and automated test development procedures to customers and production support team.
• Perform research and analysis of data, such as customer proposed specifications, datasheets, or manuals to determine design approach and/or feasibility.
• Execute debugging of the design in the lab.
• Perform synthesis, implementation, and timing analysis.

YOU’LL BRING THESE QUALIFICATIONS AS SENIOR FPGA ENGINEER II:

• Bachelor’s degree in computer engineering or electrical engineering or equivalent discipline with 8+ years of experience
• Experience in FPGA firmware design with VHDL.
• Ability to obtain and maintain an U.S. Government Security Clearance

THESE QUALIFICATIONS WOULD BE NICE TO HAVE: 

• Experience with Xilinx/AMD Versal architecture
• Experience with FPGAs and embedded systems in a radiation environment, including SEU/SEL impact and mitigation.
• Experience in FPGA- or ASIC-based image processing algorithms.
• Experience in both creating IP from scratch in RTL and integrating existing IP into RTL and block designs.
• Familiarity with C, Python or MATLAB and/or experience translating algorithms from a scripted language to HDL.
• Experience with software interfaces including interrupts and DMA.
• Experience with DDR4, Aurora, and high-speed transceiver design and verification.
• Familiarity with AXI Stream and AXI Memory Mapped interfaces.
• PCB design and schematic capture and layout with tools such as Altium Designer.

ADDITIONAL REQUIREMENTS:

• Specific vision abilities required by this job include close vision, distance vision, peripheral vision, depth perception, and the ability to focus
• Regularly required to sit, use hands and fingers, operate computer keyboard and controls, and communicate verbally and in writing
• Must be physically able to commute to buildings

SPACE SYSTEMS

At Rocket Lab, we’re not just launching rockets — we're building the future of space. Our Space Systems team builds everything from complete spacecraft, precision payloads to the components and subsystems that allow them to thrive in space, like solar panels, flight software, star trackers, optical systems, separation systems, radios, and more.

Our Space Systems team has enabled more than 1,700 missions, ranging from interplanetary exploration, in-space manufacturing to national security and defense initiatives. The team has built spacecraft, payloads, and components for missions to the Moon and Mars, working with partners including NASA, the Space Development Agency, and the U.S. Space Force. Whether it’s a single high-performance spacecraft, constellation, or the vertically integrated components that help them get to space — our world class Space Systems team is empowering some of the boldest and most ambitious space missions.

SENIOR FPGA ENGINEER II

Rocket Lab’s Optical Systems division solves mission-critical space domain and Intelligence, Surveillance, and Reconnaissance (ISR) challenges for Department of Defense (DoD) and Intelligence Community (IC) customers. Our vision is to revolutionize the space-based payload market with innovative and novel designs for space, terrestrial, and airborne environments. Building on more than 20 years of electro-optical and infrared systems innovation from Geost, Optical Systems delivers solutions to the warfighter for responsive, scalable sensing solutions across all orbital domains.

As a Senior FPGA Engineer II based at our Rocket Lab Optical Systems worksites in Chantilly, VA, you will support Tranche 3 of the U.S. Space Development Agency's (SDA) Proliferated Warfighter Space Architecture (PWSA) by designing FPGAs for spacecraft payloads.

WHAT YOU’LL GET TO DO

• Work with the hardware design team on requirements.
• Complete FPGA logic design, coding, simulation, and testing.
• Support hardware and software development teams in bring-up and test of products.
• Provide subject-matter expertise regarding design and automated test development procedures to customers and production support team.
• Perform research and analysis of data, such as customer proposed specifications, datasheets, or manuals to determine design approach and/or feasibility.
• Execute debugging of the design in the lab.
• Perform synthesis, implementation, and timing analysis.

YOU’LL BRING THESE QUALIFICATIONS AS SENIOR FPGA ENGINEER II:

• Bachelor’s degree in computer engineering or electrical engineering or equivalent discipline with 8+ years of experience
• Experience in FPGA firmware design with VHDL.
• Ability to obtain and maintain an U.S. Government Security Clearance

THESE QUALIFICATIONS WOULD BE NICE TO HAVE: 

• Experience with Xilinx/AMD Versal architecture
• Experience with FPGAs and embedded systems in a radiation environment, including SEU/SEL impact and mitigation.
• Experience in FPGA- or ASIC-based image processing algorithms.
• Experience in both creating IP from scratch in RTL and integrating existing IP into RTL and block designs.
• Familiarity with C, Python or MATLAB and/or experience translating algorithms from a scripted language to HDL.
• Experience with software interfaces including interrupts and DMA.
• Experience with DDR4, Aurora, and high-speed transceiver design and verification.
• Familiarity with AXI Stream and AXI Memory Mapped interfaces.
• PCB design and schematic capture and layout with tools such as Altium Designer.

ADDITIONAL REQUIREMENTS:

• Specific vision abilities required by this job include close vision, distance vision, peripheral vision, depth perception, and the ability to focus
• Regularly required to sit, use hands and fingers, operate computer keyboard and controls, and communicate verbally and in writing
• Must be physically able to commute to buildings

SPACE SYSTEMS

At Rocket Lab, we’re not just launching rockets — we're building the future of space. Our Space Systems team builds everything from complete spacecraft, precision payloads to the components and subsystems that allow them to thrive in space, like solar panels, flight software, star trackers, optical systems, separation systems, radios, and more.

Our Space Systems team has enabled more than 1,700 missions, ranging from interplanetary exploration, in-space manufacturing to national security and defense initiatives. The team has built spacecraft, payloads, and components for missions to the Moon and Mars, working with partners including NASA, the Space Development Agency, and the U.S. Space Force. Whether it’s a single high-performance spacecraft, constellation, or the vertically integrated components that help them get to space — our world class Space Systems team is empowering some of the boldest and most ambitious space missions.

SENIOR FPGA ENGINEER II

Rocket Lab’s Optical Systems division solves mission-critical space domain and Intelligence, Surveillance, and Reconnaissance (ISR) challenges for Department of Defense (DoD) and Intelligence Community (IC) customers. Our vision is to revolutionize the space-based payload market with innovative and novel designs for space, terrestrial, and airborne environments. Building on more than 20 years of electro-optical and infrared systems innovation from Geost, Optical Systems delivers solutions to the warfighter for responsive, scalable sensing solutions across all orbital domains.

You will be a Senior FPGA Engineer II based at our Rocket Lab Optical Systems worksites in Long Beach, CA; Littleton, CO; Phoenix, AZ; Albuquerque, NM; Chantilly, VA; and Tucson, AZ. You will design Xilinx FPGAs in VHDL to support Tranche 3 of the Space Development Agency’s Proliferated Warfighter Space Architecture (PWSA).

WHAT YOU’LL GET TO DO

• Work with the hardware design team on requirements.
• Complete FPGA logic design, coding, simulation, and testing.
• Support hardware and software development teams in bring-up and test of products.
• Provide subject-matter expertise regarding design and automated test development procedures to customers and production support team.
• Perform research and analysis of data, such as customer proposed specifications, datasheets, or manuals to determine design approach and/or feasibility.
• Execute debugging of the design in the lab.
• Perform synthesis, implementation, and timing analysis.

YOU’LL BRING THESE QUALIFICATIONS AS SENIOR FPGA ENGINEER II:

• Bachelor’s degree in computer engineering or electrical engineering or equivalent discipline with 8+ years of experience
• Experience in FPGA firmware design with VHDL.
• Ability to obtain and maintain an U.S. Government Security Clearance

THESE QUALIFICATIONS WOULD BE NICE TO HAVE: 

• Experience with Xilinx/AMD Versal architecture
• Experience with FPGAs and embedded systems in a radiation environment, including SEU/SEL impact and mitigation.
• Experience in FPGA- or ASIC-based image processing algorithms.
• Experience in both creating IP from scratch in RTL and integrating existing IP into RTL and block designs.
• Familiarity with C, Python or MATLAB and/or experience translating algorithms from a scripted language to HDL.
• Experience with software interfaces including interrupts and DMA.
• Experience with DDR4, Aurora, and high-speed transceiver design and verification.
• Familiarity with AXI Stream and AXI Memory Mapped interfaces.
• PCB design and schematic capture and layout with tools such as Altium Designer.

ADDITIONAL REQUIREMENTS:

• Specific vision abilities required by this job include close vision, distance vision, peripheral vision, depth perception, and the ability to focus
• Regularly required to sit, use hands and fingers, operate computer keyboard and controls, and communicate verbally and in writing
• Must be physically able to commute to buildings

About Akuna: 

Akuna Capital is an innovative trading firm with a strong focus on collaboration, cutting-edge technology, data driven solutions, and automation. We specialize in providing liquidity as an options market-maker – meaning we are committed to providing competitive quotes that we are willing to both buy and sell. To do this successfully, we design and implement our own low latency technologies, trading strategies, and mathematical models. 

Our Founding Partners first conceptualized Akuna in their hometown of Sydney. They opened the firm’s first office in 2011 in the heart of the derivatives industry and the options capital of the world – Chicago. Today, Akuna is proud to operate from additional offices in Sydney, Shanghai, London, and Singapore. 

What you’ll do as a Senior FPGA Engineer at Akuna: 

We are looking for Senior FPGA Engineers to accelerate various portions of our trading platform. Members of the Hardware Development team will work with cutting-edge FPGA technology and high-performance computing architectures – owning projects end-to-end and making Akuna’s systems faster and smarter. In this role, you will: 

• Own projects - driving project progression from inception, requirements, architecture, design entry, timing closure and verification
• Partner closely with the Low Latency, Trading and other teams to foster and develop ideas that performance 
• Develop and maintain RTL in Verilog/SystemVerilog
• Write and maintain verification environments
• Design optimization for timing closure
• Develop and maintain project documentation 

Qualities that make great candidates: 

• 10+ years of experience in FPGA or ASIC digital logic design – network traffic experience a strong plus
• Deep Verilog/SystemVerilog or VHDL skills
• Solid grasp of static timing analysis, synthesis, and place-and-route tools  
• Familiarity with algorithms, data structures, and verification/unit testing workflows
• Python and Bash scripting fluency
• Enthusiasm for collaboration with other FPGA team members as well as members from software and trading teams
• Open mindedness for novel development approaches and architectures
• Bachelor’s degree in Computer or Electrical Engineering, or related field; master’s degree a plus 
• The ability to react quickly and accurately to rapidly changing market conditions, including the ability to quickly and accurately respond and/or solve math and coding problems are essential functions of the role

In addition to technical skillsets, Akuna values the unique perspectives people can bring to the table to collaboratively solve complex problems and drive Akuna forward. We want everyone to feel empowered to apply. We welcome your application and encourage you to take the first steps toward your future with us!

In accordance with Illinois Equal Pay Act, the minimum base salary starts at $145,000. Exact compensation offered may vary based on many factors including, but not limited to, the candidate’s experience, qualifications, and skill set. This role is also eligible for a discretionary performance bonus as part of the total compensation package and includes a comprehensive benefits package that may encompass employer-paid medical, dental, vision, retirement contributions, paid time off, and other benefits. The minimum base salary herein was determined in good faith by Akuna Capital LLC.

ABOUT THE TEAM

The Battlespace Awareness (BA) team develops state-of-the-art radar systems, deployed to tackle the most significant security challenges of America and its allies. Working across hardware, software, and firmware; in both the RF and digital domains; the team delivers radar architectures that enable advanced surveillance, reconnaissance, and targeting in the contemporary and future battlespace. The Radar team is responsible for all aspects of radar system development; from concepts and architectures through to fielding and sustainment. In this role, you will work closely with an interdisciplinary technical team to define radar architectures, design solutions, build prototypes, perform testing, and mature the prototypes into products.
 

ABOUT THE JOB

We are looking for a Senior FPGA Engineer to join our rapidly growing team in Costa Mesa, CA. In this role, you will be the technical lead for FPGA development supporting our airborne radar products, establishing the foundation for FPGA design processes and best practices. You will be responsible for translating algorithmic requirements into FPGA implementations, leading signal processing design efforts, and collaborating with our Fort Collins team to ensure seamless integration across projects. This will require expertise in FPGA design, signal processing, RTL development (SystemVerilog/VHDL), and Xilinx toolchains. If you are a self-directed technical leader who thrives on establishing new capabilities and can take an algorithm document and independently drive it through to hardware implementation, then this role is for you.
 

WHAT YOU'LL DO

• Lead FPGA architecture, design, and verification efforts for airborne radar systems from concept through production
• Translate signal processing algorithms into efficient, high-performance FPGA implementations on Xilinx SOC/FPGA platforms
• Establish and drive robust FPGA design processes, coding standards, and verification methodologies for the airborne products team
• Collaborate with the Battlespace Awareness engineering team to ensure design consistency and knowledge transfer across sites
• Design and implement digital signal processing chains for radar systems, including data acquisition, filtering, and real-time processing
• Perform timing analysis, resource optimization, and debugging of complex FPGA designs
• Develop and maintain design documentation, including architecture specifications, design reviews, and verification plans
• Mentor and guide other engineers as the team scales FPGA capabilities 

REQUIRED QUALIFICATIONS

• Bachelors degree in electrical engineering, electronics engineering, computer engineering or related field.
• 12+ years of professional experience in FPGA design and development
• Strong expertise in RTL design using SystemVerilog and/or VHDL
• Demonstrated experience with Xilinx FPGA devices and development tools (Vivado, Quartus, etc.)
• Proven experience in digital signal processing implementation on FPGAs
• Self-directed technical leadership with ability to independently drive projects from requirements to implementation
• Experience with FPGA verification methodologies and simulation tools
• Strong understanding of timing closure, resource optimization, and FPGA design constraints
• Eligible to obtain and maintain an active U.S. Secret security clearance 

PREFERRED QUALIFICATIONS

• Experience with radar systems or software-defined radio development
• Familiarity with high-speed interfaces (PCIe, Ethernet, JESD204B, etc.)
• Experience with Xilinx Zynq UltraScale+, Altera AgileX, or RFSoC platforms
• Knowledge of embedded software development for FPGA SoC platforms
• Experience with MATLAB and algorithm-to-hardware workflows
• Understanding of RF systems and digital front-end design
• Familiarity with DO-254 or similar hardware design standards for airborne systems
• Experience with version control (Git) and continuous integration workflows
• Background in aerospace or defense systems development

Senior Hardware Engineer

Aliso Viejo, CA

Sony Interactive Entertainment’s Cloud Gaming Engineering and Infrastructure (CGEI) division is leading the Cloud Gaming revolution, putting console-quality video games on any device, from TVs to consoles to mobile devices and beyond.

Our Hardware & Systems Engineering team is looking for a Senior Hardware Engineer to join an innovative team of hardware engineers specialized in custom scale-out computing development. The ideal candidate complements this team and brings technical leadership to team members and partners.

Responsibilities

• Work with local and remote partners to create custom computing hardware by owning the design cycles for scale-out gaming hardware
• Work with external partners and suppliers to design and execute to hardware specifications
• Work with developers in partner software and firmware departments to create system-level solutions that integrate with existing and novel rack-, datacenter, and global-level system architectures.
• End-to-end PCBA design, including schematic- and VHDL-based design and layout oversight
• Hands-on laboratory work, including new hardware bringup and laboratory management

Qualifications

• BSEE required, MSEE or PhD preferred
• 5+ years of proven hardware design and technical leadership
• Experience with Jira and Confluence in both waterfall and Agile environments
• Excellent written and verbal communication skills
• Ability to articulate technical information in a clear and concise manner at all levels, from executive staff to engineers
• Strong cross-team collaboration and interpersonal skills with a variety of roles including engineering, product management, and support
• Strong understanding of digital electrical design
• Deep knowledge of high-speed protocols, including PCIe link and transport, DDR5/6, Ethernet, USB4
• Proven experience with broadly-used electrical design tools
• Experience building, debugging, and troubleshooting novel high-performance hardware systems

 Skills & Knowledge

• Experience with FPGA/CPLD design, including commensurate knowledge of standard and vendor-specific tooling
• Working experience in Perl, TCL, Python, Linux environments and/or C/C++
• Understanding of computer architecture, interconnects, FPGAs and storage technology
• Experience developing test code (firmware, software test code) for prototypes and early validation platforms and commensurate knowledge of integrated development environments (IDEs)
• Experience leading technical work in small workgroups

Voyager is an innovative defense, national security, and space technology company committed to advancing and delivering transformative, mission-critical solutions. We tackle the most complex challenges to unlock new frontiers for human progress, fortify national security, and protect critical assets, leading in the race for technological and operational superiority from the ground to space. 

Forge the Future: Join Voyager Technologies 

The future belongs to those who build it. At Voyager Technologies, we’re building technologies that protect lives, expand frontiers, and prepare us for what’s next. And we’re doing that with people who are wired to solve, build, adapt, and lead. These roles are not for the faint of heart.  

You’ll help lay the foundation for humanity's future. Join a culture where innovation thrives, curiosity is rewarded, and impact is real. We’re a company of doers, thinkers, and builders, united by purpose and grounded in reality. 

If you want to put your skills to work where the stakes are real and the mission is bigger than any one person, forge the future with Voyager. 

Voyager’s Advanced Technologies Group is defining the future of the company and critical space and defense markets. The FPGA Engineer is a hands-on role responsible for the design, integration, and qualification of complex systems supporting these novel technology development efforts. The role emphasizes high-velocity design and technical leadership for in-space computing systems. The engineer provides technical direction and works closely with other engineering functions to ensure system architectures meet performance, safety, and mission assurance standards.

The position reports to the Vice President of Technology Development and is part of the Engineering department based in Long Beach, CA. This role can be hybrid.

In this role, the essential functions are:

• Designing and testing complex, high speed, FPGA (mostly Xilinx) designs implementing high-throughput algorithms.
• Designing and testing embedded applications using the Xilinx Zynq family.
• Developing architectures compatible with embedded Linux environments.
• Designing and supporting top-level system simulations.
• Translating system requirements into FPGA architectures.
• Implementing and documenting FPGA designs using HDL (VHDL, System Verilog, etc.).
• Supporting systems integration and Test Engineering to produce functional designs.
• Implementing and contributing to the architecture of current and next generation multi-megapixel camera systems, interfacing with the Camera Link and SpaceWire standards.
• Designing systems capable of handling Imager data and Image processing (Embedded Camera Development).
• Creating test plans to assure integrated performance meets specification.

If your experience aligns with our basic qualifications and you are inspired by our mission, we’d like to connect. If you don’t see the right role right now, Join Our Talent Community and stay connected as we continue to build what’s next. 

• Minimum BSEE.
• 5+ years of experience with firmware design, integration, & test (preferably with the Xilinx family)
• Capable of multi-tasking; working on multiple projects & supporting production activities
• Strong technical background; capable of coming up-to-speed quickly on new technologies.
• Good communication, with the ability to work both individually and collaboratively in a team environment.
• Strong documentation skills
• Great problem-solving skills a must.

The good faith base salary range for this role is $135,000-$185,000 at the time of this posting. Where you fall within the range depends on your experience, skills, and location. This range reflects base salary only and does not include benefits or bonus/incentive. This range may be adjusted in the future.

Voyager offers a highly competitive total compensation package designed to support the well-being, growth, and success of our employees. Employees benefit from a flexible and comprehensive rewards program that supports both professional and personal well-being.  

• Flexible Time Off (FTO), empowering employees to take the time they need to recharge and maintain a healthy work-life balance
• Comprehensive medical, dental, and vision coverage for employees and their families, with a significant portion of premiums covered by the company, and many benefits paid at 100% for employees
• Flexible, affordable gym memberships with 12,700+ options nationwide, including 24 Hour Fitness, EoS Fitness, Crunch Fitness, Anytime Fitness, Blink Fitness, Chuze Fitness, and more! No long-term contracts and FREE on-demand workout videos before you enroll
• 401(k) retirement plan with a company match of up to 4% to help you build long-term financial security
• Company wellness programs that support physical and mental well-being
• Additional voluntary benefits and employee support resources
• The opportunity to work alongside a highly talented team in an innovative, mission-driven environment

Voyager is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, protected veteran status, or other characteristics protected by law.  

Minority/Female/Disabled/Veteran 

To conform to U.S. Government export regulations, including the International Traffic in Arms Regulations (ITAR) (22 CFR Parts 120-130) and the Export Administration Regulations (EAR) (15 CFR Parts 730-774), applicants for this position must be a U.S. Person: a US Citizen, a lawful permanent resident of the U.S., or a protected individual as defined by 8 U.S.C. § 1324b(a)(3). Applicants must be eligible to obtain any required export authorizations from the U.S. Department of State or the U.S. Department of Commerce.

The statements contained in this job description are intended to describe the general content and requirements for performance of this job. It is not intended to be an exhaustive list of all job duties, responsibilities, and requirements. This job description is not an employment agreement or contract. Management has the exclusive right to alter the scope of work within the framework of this job description at any time without prior notice. 

ABOUT THE TEAM 

Anduril AIRS provides high-performance cooled infrared imaging solutions, encompassing IDCAs, modules, and cameras. We achieve this through state-of-the-art technologies, advanced designs, and vertically integrated manufacturing processes. Our core strength lies in delivering customized, mission-critical imaging capabilities to system integrators and instrumentation manufacturers facing unique, challenging, and complex thermal imaging needs.

ABOUT THE JOB

The AIRS team is seeking a Senior Firmware Engineer to design a new product lines. In this role, you will work closely with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products.

WHAT YOU’LL DO

• Lead FPGA architecture, standards, development and review processes
• FPGA Development: Designing, architecting, simulating, and integrating VHDL designs into FPGAs or Systems on Chip (SoC) for optimized performance, resource utilization, and power efficiency.
• Hardware/Software Integration: Collaborating with multidisciplinary teams (electrical engineers, software engineers, systems engineers) to ensure seamless integration of the firmware with the overall system, including processor bring-up and board support packages.
• Testing and Validation: Developing robust test benches in VHDL/Verilog and utilizing lab tools such as oscilloscopes and logic analyzers for rigorous testing and validation of designs against functional specifications and performance requirements.
• Optimization: Optimizing the algorithms for hardware acceleration, including MIPS optimization and efficient use of on-chip bus protocols like AXI or AXI-Stream. 

REQUIRED QUALIFICATIONS

• Education: A Bachelor's in Electrical Engineering, Computer Engineering, or a related technical field is typically required.
• Experience: 10+ years of experience developing HDL firmware for FPGA devices 
• Hardware Description Languages: Expertise in VHDL and/or Verilog/SystemVerilog is essential for RTL (Register Transfer Level) design.
• FPGA Tools: Experience with industry-standard FPGA design tools such as Xilinx Vivado or Intel Quartus.
• Debugging Skills: Strong hardware/software debugging skills using standard lab equipment.
• Version Control: Proficiency with version control systems (e.g., Git) for collaborative development.
• Eligible to obtain and maintain an active U.S. Secret security clearance

PREFERRED QUALIFICATIONS 

• Demonstrated experience designing with multi-gigabit SERDES, DDR memory busses, Ethernet MAC and PHY interfaces, FPGAs, and common communication busses like SPI and I2C
• Embedded software development experience with the use of timers, interrupts, hardware peripherals such as SPI controllers and ADCs
• Knowledge of embedded Linux development, including device trees, hardware drivers, bootloaders, and basic Unix/Linux tools
• Familiar with common programming languages like Python and MATLAB
• Familiarity with infrared image sensor technology

About Epirus

Epirus is a high-growth technology company dedicated to overcoming the asymmetric challenges inherent to the future of national security. Epirus' flagship product, Leonidas, is a software-defined system built using intelligent power management techniques that allow power-hungry systems to do more with less.  

Job Summary: This is an exciting role in an innovative company. The ideal candidate for the position is someone who has experience developing high-performance real-time, autonomous software systems to rapidly develop next-generation products.  Employ your expertise by developing software systems that support functions such as autonomous target tracking, agile electronic beam-forming, and real-time hardware control.

Responsibilities: 

• Design and implement software of embedded devices and systems from requirements to production and deployment 
• Design, develop, code, test, and debug system software 
• Build real-time control software for a variety of projects 
• Analyze and enhance the efficiency, stability and scalability of system resources 
• Direct software QA and optimize I/O performance 
• Interface with hardware design and development 
• Assess third-party and open-source software 
• Lead teams to create minimum viable products from an idea 
• Derive software frameworks and architectures to accelerate development 
• Mentor peers to advance team velocity

Basic Qualifications:

• 5+ years of development in C and C++ 
• 3+ years working with embedded systems 
• Additional experience with one or more modern systems language(s): Python, Java, VHDL, Verilog, Go, Rust, etc. 
• Versed in multithreaded design (concurrency primitives, resource management, etc.) 
• Competent in computer science concepts (algorithms, data structures, object-oriented programming, etc.) 
• Strong foundations in mathematics and linear algebra 
• Adequate knowledge of reading schematics and data sheets for components 
• Bachelor’s degree in computer science or a similar discipline, Master’s degree preferred
• This is an on-site position; availability to work in our HQ in Torrance is required

Preferred Skills and Experience:

• 2+ years of experience with Xilinx FPGA and Embedded Cortex CPU architectures 
• Experience building software for real-time operating environments with specific latency requirements 
• Experience with Embedded Linux and/or software integration with FPGA firmware 
• Knowledge or experience with digital signal processing (DSP) or radio frequency (RF) technologies 
• User experience with DevOps Pipeline tools 
• Experience with Docker or Helm  
• Scrum Master Certification 
• Desire to mentor new hires 
• Exposure or interest in sensor fusion, machine learning, or AI

ITAR REQUIREMENTS: 

• To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.  

At Epirus, you’ll work with technical peers and great people—and get first crack at some of the defining technology challenges of our time. Here, “impossible” is just a challenge. We're a diverse, fast-growing team of change-makers fueling the future of energy with revolutionary solutions. Join us and rewrite the rules. 

Voyager is an innovative defense, national security and space technology company committed to advancing and delivering transformative, mission-critical solutions. We tackle the most complex challenges to unlock new frontiers for human progress, fortify national security, and protect critical assets to lead in the race for technological and operational superiority from ground to space. 

Forge the Future: Join Voyager Technologies 

The future belongs to those who build it. At Voyager Technologies, we’re building technologies that protect lives, expand frontiers and prepare us for what’s next. And we’re doing that with people who are wired to solve, build, adapt and lead. These roles are not for the faint of heart.  

You’ll help lay the foundation for humanity's future. Join a culture where innovation thrives, curiosity is rewarded, and impact is real. We’re a company of doers, thinkers and builders, united by purpose and grounded in reality. 

If you want to put your skills to work where the stakes are real and the mission is bigger than any one person, forge the future with Voyager. 

The FPGA Engineer for our Products line is responsible for assisting in the design of cutting-edge components for space and national security applications including Software Defined Radios, Digital Processing Systems, Space Rated Cameras, Star Trackers and Laser Communications.

The position reports to the VP of Product Design and is part of the Engineering department. This role is onsite and based in San Diego, CA. 

In this role, the essential functions are:

• Designing and testing complex, high speed, FPGA (mostly Xilinx) designs implementing high-throughput algorithms.
• Designing and testing embedded applications using the Xilinx Zynq family.
• Developing architectures compatible with embedded Linux environments.
• Designing and supporting top-level system simulations.
• Translating system requirements into FPGA architectures.
• Implementing and documenting FPGA designs using HDL (VHDL, System Verilog, etc.).
• Supporting systems integration and Test Engineering to produce functional designs.
• Implementing and contributing to the architecture of current and next generation multi-megapixel camera systems, interfacing with the Camera Link and SpaceWire standards.
• Designing systems capable of handling Imager data and Image processing (Embedded Camera Development).
• Creating test plans to assure integrated performance meets specification.

If your experience aligns with our basic qualifications and you are inspired by our mission, we’d like to connect. If you don’t see the right role right now, Join Our Talent Community and stay connected as we continue to build what’s next. 

• Bachelor’s degree in Electrical Engineering
• 5+ years of experience with firmware design, integration, & test (preferably with the Xilinx family)
• Experience with implementing and documenting FPGA designs using HDL (VHDL, System Verilog, etc.).
• Experience with lab equipment
• Experience drafting comprehensive technical documentation
• Capable of multi-tasking; working on multiple projects & supporting production activities
• Strong technical background; capable of coming up-to-speed quickly on new technologies.
• Good communication, with the ability to work both individually and collaboratively in a team environment.

The good faith base salary range for this role is $125,000 - $185,000 at the time of this posting. Where you fall within the range depends on your experience, skills, and location. This range reflects base salary only and does not include benefits or bonus/incentive. This range may be adjusted in the future.

Voyager offers a highly competitive total compensation package designed to support the well-being, growth, and success of our employees. Employees benefit from a flexible and comprehensive rewards program that supports both professional and personal well-being.  

• Unlimited Flexible Time Off (FTO), empowering employees to take the time they need to recharge and maintain a healthy work-life balance
• Comprehensive medical, dental, and vision coverage for employees and their families, with a significant portion of premiums covered by the company and many benefits paid at 100% for employees
• Flexible, affordable gym memberships with 12,700+ options nationwide including 24 Hour Fitness, EoS Fitness, Crunch Fitness, Anytime Fitness, Blink Fitness, Chuze Fitness and more! No long term contracts and FREE on-demand workout videos before you enroll
• 401(k) retirement plan with a company match of up to 4% to help you build long-term financial security
• Company wellness programs that support physical and mental well-being
• Additional voluntary benefits and employee support resources
• The opportunity to work alongside a highly talented team in an innovative, mission driven environment

Voyager is an Equal Opportunity Employer. Employment decisions are made without regard to race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, protected veteran status or other characteristics protected by law.  

To conform to U.S. Government export regulations, including the International Traffic in Arms Regulations (ITAR) (22 CFR Parts 120–130) and the Export Administration Regulations (EAR) (15 CFR Parts 730–774), applicants for this position must be a U.S. Person: a US Citizen, a lawful permanent resident of the U.S., or a protected individual as defined by 8 U.S.C. § 1324b(a)(3). Applicants must be eligible to obtain any required export authorizations from the U.S. Department of State or the U.S. Department of Commerce.

Minority/Female/Disabled/Veteran 

The statements contained in this job description are intended to describe the general content and requirements for performance of this job. It is not intended to be an exhaustive list of all job duties, responsibilities, and requirements. This job description is not an employment agreement or contract. Management has the exclusive right to alter the scope of work within the framework of this job description at any time without prior notice. 

ABOUT THE TEAM

Anduril's Space team is dedicated to expanding our AI-powered capabilities into the final frontier, enhancing Space Domain Awareness, Space Control, and Command and Control for U.S. military and allied partners. We're developing fully integrated hardware and software systems, including Lattice for Space Missions and modular payloads, to address growing threats in space and ensure our Guardians maintain a decisive advantage in this contested warfighting domain.

ABOUT THE JOB

We are looking for a Sr. FPGA/SoC Engineer to join our rapidly growing team in Costa Mesa, CA. In this role, you will be responsible for developing FPGA/SoC firmware and overseeing 3rd party development. You will work with internal and external design teams to develop products for use in orbit. This will require architecture, RTL generation and debug.

WHAT YOU’LL DO

• Rapidly develop, test, and implement FPGA designs using Xilinx SoC/FPGA.
• Integrate third-party vendors IP, as necessary.
• Work with third-party developers to ensure timely product success
• Perform digital circuit design, VHDL/Verilog coding, synthesis, place and route, timing closure, simulation, and verification. 
• Participate in entire design life cycle: from requirements and concept, through design and hand on testing/board bring up.
• Implement a variety of signal types such as high speed comms (ethernet, serial), signal processing (analog, digital).
• Ensure designs meet all relevant safety and performance standards, with traceability back to top-level system requirements, as necessary.
• Investigate and resolve bugs found during hand on testing (at HDL level and system level).

REQUIRED QUALIFICATIONS

• 5 years of experience preferred in FPGA/HDL hardware design. Experience with Xilinx SoC (Versal) is highly preferred.
• Familiarity with design software like Vivado (preferred), ModelSim, or Quartus.
• Proficient in VHDL and/or Verilog.
• Ability to work in a fast-paced, challenging environment.
• Excellent problem-solving and organizational skills.
• Strong communication and teamwork skills.
• Experience in SoC hardware bring-up, preferably on ARM-based systems.
• Eligible to obtain and maintain an active U.S. Secret security clearance. 

PREFERRED QUALIFICATIONS

• Working knowledge of designing for safety-critical functions.
• FPGA interfaces and high speed busses.
• Experience with systems on a Chip (SoC).
• Low-level firmware (C/C++) development for bring-up and test.
• Experience writing HDL for Space applications.

WHAT IS AIS?

Anduril Intelligence Systems (AIS) is focused on positioning Anduril as a lead provider of specialized engineering and products for Intelligence Community (IC) customers. We work within the IC to understand their requirements, shape their concepts of operation, and deliver exquisite capability across their problem set. We aim to develop and deploy critically needed capabilities that address our customers’ most pressing national security requirements.

ABOUT THE JOB

We are looking for a Staff FPGA Engineer to join our rapidly growing team in Reston, Virginia. You will be responsible for rapidly developing, testing, and implementing FPGA designs on Xilinx SoC/FPGA platforms. This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation. 

WHAT YOU’LL DO

• Integrate third-party vendors IP, as necessary.
• Participate in entire design life cycle: from requirements and concept, through design and hand on testing/board bring up.
• Implement a variety of signal types such as high speed comms (ethernet, serial), signal processing (analog, digital).
• Ensure designs meet all relevant safety and performance standards, with traceability back to top-level system requirements, as necessary.
• Investigate and resolve bugs found during hand on testing (at HDL level and system level).

REQUIRED QUALIFICATIONS

• Bachelors degree in electrical engineering, electronics engineering, computer engineering or related field
• 8+ years of professional experience in FPGA design and development. Experience with Xilinx SoC is highly preferred
• Familiarity with design software like Vivado (preferred), ModelSim, or Quartus
• Proficient in VHDL and/or Verilog
• Ability to work in a fast-paced, challenging environment
• Excellent problem-solving and organizational skills
• Strong communication and teamwork skills
• Experience in SoC hardware bring-up, preferably on ARM-based systems
• Currently possesses and is able to maintain an active U.S. Secret security clearance

PREFERRED QUALIFICATIONS

• Working knowledge of designing for safety-critical functions.
• FPGA interfaces and high speed busses.
• Experience with systems on a Chip (SoC).
• Low-level firmware (C/C++) development for bring-up and test.

WHAT IS AIS?

Anduril Intelligence Systems (AIS) is focused on positioning Anduril as a lead provider of specialized engineering and products for Intelligence Community (IC) customers. We work within the IC to understand their requirements, shape their concepts of operation, and deliver exquisite capability across their problem set. We aim to develop and deploy critically needed capabilities that address our customers’ most pressing national security requirements.

ABOUT THE JOB

We are looking for a Staff FPGA Engineer to join our rapidly growing team in Reston, Virginia. You will be responsible for rapidly developing, testing, and implementing FPGA designs on Xilinx SoC/FPGA platforms. This requires strong skills in digital circuit design, VHDL/Verilog coding, and simulation. 

WHAT YOU’LL DO

• Integrate third-party vendors IP, as necessary.
• Participate in entire design life cycle: from requirements and concept, through design and hand on testing/board bring up.
• Implement a variety of signal types such as high speed comms (ethernet, serial), signal processing (analog, digital).
• Ensure designs meet all relevant safety and performance standards, with traceability back to top-level system requirements, as necessary.
• Investigate and resolve bugs found during hand on testing (at HDL level and system level).

REQUIRED QUALIFICATIONS

• Bachelors degree in Electrical Engineering, Electronics Engineering, Computer Engineering or related field
• 12+ years of professional experience in FPGA design and development. Experience with Xilinx SoC is highly preferred
• Familiarity with design software like Vivado (preferred), ModelSim, or Quartus
• Proficient in VHDL and/or Verilog
• Experience in SoC hardware bring-up, preferably on ARM-based systems
• Ability to work in a fast-paced, challenging environment
• Excellent problem-solving and organizational skills
• Strong communication and teamwork skills
• Currently possesses and is able to maintain an active U.S. Secret security clearance

PREFERRED QUALIFICATIONS

• Working knowledge of designing for safety-critical functions
• FPGA interfaces and high speed busses
• Experience with systems on a Chip (SoC)
• Low-level firmware (C/C++) development for bring-up and test

PsiQuantum’s mission is to build the first useful quantum computers—machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems. 

Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries. 

Our architecture and approach is based on silicon photonics. By leveraging the advanced semiconductor manufacturing industry—including partners like GlobalFoundries—we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photons don’t feel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure. 

In 2024, PsiQuantum announced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining—and that now is the time to scale. 

PsiQuantum also develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies—including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical—to prepare quantum solutions for real-world impact. 

Quantum computing is not an extension of classical computing. It represents a fundamental shift—and a path to mastering challenges that cannot be solved any other way. The potential is enormous, and we have a clear path to make it real. 

Come join us. 

Job Summary:

The mission of PsiQuantum's Principal Hardware Design Engineer role is to support the Electronics team by owning hardware designs integral to the underlying system of the quantum computer. This engineer will collaborate in cross-functional teams of thermal, mechanical, firmware, optical engineers. The designs will meet the requirements of the overall system architecture and physical framework of the quantum computer.

Responsibilities:

• Define, Design and deliver production ready high-speed embedded hardware systems.
• Design, create schematics, and oversee PCB layout of analog and digital circuitry consisting of but not limited to high-speed transceivers, 10+ Gbps electrical and optical data links, FPGA's, microcontrollers, clock distribution, and power distribution.
• Ensure signal integrity and EMI suppression is accounted for in all designs.
• Design and create test set-ups for testing of electro-optic modules.
• Characterize, optimize, and debug analog, digital, and electro-optic circuitry using equipment such as mixed signal & sampling oscilloscopes, vector network analyzers, signal generators, multimeters, DC power supplies.
• Develop software to drive measurements.
• Analyze data and extract key performance parameters.
• Maintain detailed documentation of hardware designs, test results, and design changes.
• Software tools:
  • Orcad Schematic Capture and Allegro PCB Layout
  • C++, Python, RTL (VHDL or Verilog)
  • Keysight PathWave ADS
  • Microsoft Office

Experience/Qualifications:

• 7 years of experience with a Master Degree.
• 9-12 years of experience with a B.S. Degree.
• Results oriented.
• Delivers on commitments.
• Attention to detail.
• Data-driven in decision-making.
• Strong problem-solving skills.
• Proven team player with an ability to work effectively across departments, sites, time zones in direct and matrix team environments.
• Excellent verbal and written communication skills with an ability to communicate effectively to a variety of audiences ranging from senior leadership and technical experts to entry-level staff.

PsiQuantum provides equal employment opportunity for all applicants and employees. PsiQuantum does not unlawfully discriminate on the basis of race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, gender expression, national origin, ancestry, citizenship, age, physical or mental disability, military or veteran status, marital status, domestic partner status, sexual orientation, genetic information, or any other basis protected by applicable laws.

Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to recruiting@psiquantum.com.

We are not accepting unsolicited resumes from employment agencies.

PsiQuantum’s mission is to build the first useful quantum computers—machines capable of delivering the breakthroughs the field has long promised. Since our founding in 2016, our singular focus has been to build and deploy million-qubit, fault-tolerant quantum systems. 

Quantum computers harness the laws of quantum mechanics to solve problems that even the most advanced supercomputers or AI systems will never reach. Their impact will span energy, pharmaceuticals, finance, agriculture, transportation, materials, and other foundational industries. 

Our architecture and approach is based on silicon photonics. By leveraging the advanced semiconductor manufacturing industry—including partners like GlobalFoundries—we use the same high-volume processes that already produce billions of chips for telecom and consumer electronics. Photonics offers natural advantages for scale: photons don’t feel heat, are immune to electromagnetic interference, and integrate with existing cryogenic cooling and standard fiber-optic infrastructure. 

In 2024, PsiQuantum announced government-funded projects to support the build-out of our first utility-scale quantum computers in Brisbane, Australia, and Chicago, Illinois. These initiatives reflect a growing recognition that quantum computing will be strategically and economically defining—and that now is the time to scale. 

PsiQuantum also develops the algorithms and software needed to make these systems commercially valuable. Our application, software, and industry teams work directly with leading Fortune 500 companies—including Lockheed Martin, Mercedes-Benz, Boehringer Ingelheim, and Mitsubishi Chemical—to prepare quantum solutions for real-world impact. 

Quantum computing is not an extension of classical computing. It represents a fundamental shift—and a path to mastering challenges that cannot be solved any other way. The potential is enormous, and we have a clear path to make it real. 

Come join us. 

Job Summary:

We are looking for a digital-hardware system-designer to join our System-Architecture team. You will work in a multi-technology environment and will contribute to shaping and defining the digital-logic systems which drive our photonic quantum computer.

Responsibilities:

• Gather and translate high-level abstract requirements into concrete hardware requirements.
• Devise and implement low-latency algorithms and methods to solve various time-critical tasks that take place in the data-plane of an optical quantum computer.
• Work with other digital-design experts to integrate algorithms into FPGAs.
• Collaborate closely with physicists and digital designers to arbitrate design choices and optimize designs to meet algorithmic performance while matching latency, throughput and footprint constraints.
• Write requirements and documentation.
• Implement cycle-accurate Python models to be integrated in discrete-time-event simulations.
• Implement SystemVerilog implementations matching Python models.
• Write behavioral tests for implementations in Python.

Experience/Qualifications:

• Bachelor's or master's degree in Electrical or Computer Engineering or related discipline.
• 5+ years of relevant work in digital design.
• Knowledge of SystemVerilog (or VHDL) for design and simulation.
• Experience working with FPGAs (Xilinx preferred) and associated tooling.
• Strong critical thinking skills to devise creative and analytical approaches to solving novel, loosely-defined complex problems.
• Team player with an ability to work effectively across departments and time-zones.
• Excellent verbal and written communication skills, with the ability to engage a variety of audiences.
• Experienced Python programmer who strives to write clear code in the context of a small team of contributors.
• Pro-active with the ability to work independently with limited direction, in a fast-moving start-up environment nice-to-have:
• Distributed system experience: involving event correlation from multiple sources, under real-time constraints.
• Experience with High Level Synthesis tools (e.g. Xilinx Vitis).
• Experience with Python for verification (Cocotb).
• Knowledge of photonics and linear optics is a plus.

Note: PsiQuantum will only reach out to you using an official PsiQuantum email address and will never ask you for bank account information as part of the interview process. Please report any suspicious activity to recruiting@psiquantum.com.

We are not accepting unsolicited resumes from employment agencies.

Job Summary

We are seeking a talented Signal Processing Engineer to design, develop, and optimize advanced digital signal processing (DSP) algorithms for on-chip and embedded implementation. In this role, you will create efficient, hardware-friendly algorithms that run directly on custom SoCs, enabling real-time processing with constraints on power, latency, area, and throughput. You will collaborate closely with the SoC, Firmware, and Machine Learning teams to translate high-level signal processing needs into production-ready solutions.

Key Responsibilities

• Design and develop signal processing algorithms for sensing neural activity in the cortex (e.g. spike detection), monitoring cortical electrode health, and more.
• Design and develop numerical algorithms, such as custom data compression to increase radio throughput.
• Develop fixed-point or quantized versions of algorithms optimized for constrained hardware.
• Implement and verify algorithms in high-level languages and transition them to hardware-friendly representations.
• Perform algorithm-to-architecture mapping: analyze trade-offs between accuracy, latency, power, and resource utilization on the SoCs.
• Collaborate with the digital design team to define micro-architectures for custom on-chip processing pipelines, including dataflow, pipelining, and parallelization.

Required Qualifications

• Education: BS, MS or PhD in Electrical Engineering, Computer Engineering, Signal Processing, or a related field.
• Experience: 3+ years in digital signal processing algorithm development or real-world products, with a focus on embedded or hardware-constrained implementations.
• Fluent in signal processing fundamentals (both analog and digital) and strong numerical capabilities.
• Familiarity with fixed-point arithmetic, quantization effects, and numerical precision trade-offs.
• Proficiency in Python and C for algorithm prototyping and simulation.

Preferred Qualifications

• Hands-on experience with Verilog/VHDL, or transitioning algorithms to RTL.
• Experience with dedicated DSP cores or accelerators.
• Track record of optimizing for power/area/latency in resource-constrained environments.

Base Salary Range:

 $121,000 - $230,500

About Graphcore 

At Graphcore, we’re building the future of AI compute.

We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale.

As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem.

To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world.

We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence.

Job Summary 

We are seeking a Director of Silicon Logical Design to lead and scale our Logical Design group within the Silicon department. This role is accountable for the overall strategy, technical direction, execution quality and team development for Graphcores microarchitecture and RTL design efforts. 

The Director will be responsible for ensuring that our logical design methodologies, architectures and RTL implementations meet world class standards for performance, power, area, and schedule. This leader will partner closely with Architecture, Physical Design, Verification, DFT and Program Management teams to ensure successful, predictable silicon delivery aligned with Graphcores long term product roadmap. 

The Team 

The Logical Design team deliver the micro-architecture and RTL that realise our advanced chip architectures. As Director, you will guide this multi site team, strengthen cross functional collaboration, and drive the evolution of our design flows and capabilities. 

Responsibilities and Duties 

Leadership & Strategy 

• Define and execute the strategic roadmap for Logical Design, ensuring alignment with Graphcores silicon and product strategy. 

• Lead, grow and mentor a high performing RTL/micro architecture design organisation. 

• Establish and implement best in class design methodologies, documentation standards and quality metrics. 

• Drive continuous improvement across team structure, workflows, tooling, and design processes. 

Technical Ownership 

• Provide technical oversight of micro architecture specification and RTL development across all major blocks and subsystems. 

• Guide architectural feasibility studies, contribute to architectural trade offs and micro architecture definition. 

• Oversee the integration of third party IP, complex application specific blocks, and high performance custom designs. 

• Ensure robust design sign off through high quality linting, synthesis, CDC/RDC, timing closure and coverage metrics. 

Cross-Functional Collaboration 

• Partner closely with Physical Design, Verification, DFT, Architecture and Program Management teams to ensure cohesive planning and execution. 

• Foster strong communication across teams and global sites, ensuring alignment on priorities, risks and deliverables. 

• Support silicon bring-up and debug efforts by providing expert guidance and deep understanding of RTL behaviour and architecture. 

Execution & Delivery 

• Own delivery of high quality, on schedule RTL for multiple parallel silicon programs. 

• Establish scalable project planning and tracking practices, including resource planning and risk mitigation. 
• Champion design automation and infrastructure improvements to accelerate productivity and improve design quality. 

Essential Skills & Experience 

• Degree in Computer Science, Electrical Engineering or a related field; advanced degree preferred. 

• Extensive experience in digital logical design, micro-architecture and RTL development for large scale, high performance silicon projects. 

• Proven success leading and developing technical teams in a semiconductor environment. 

• Deep expertise in SystemVerilog or VHDL and familiarity with modern digital design flows. 

• Strong ability to diagnose and resolve complex design issues, including via scripting/programming (Python, Tcl, etc.). 

• Demonstrated excellence in cross functional leadership and communication across global teams. 

• Strong organisational skills with ability to manage multiple priorities and drive execution in fast-paced environments. 

Desirable Experience 

• Processor or accelerator micro architecture. 

• High-speed serial interfaces and complex, high bandwidth IP blocks. 

• Arithmetic pipeline design and floating point datapaths. 

• Advanced synthesis, timing analysis, power analysis, and logical equivalence checking. 

• Design-for-test methodologies. 

• Power integrity and silicon device level understanding. 

• Experience with silicon bring-up and post-silicon validation. 

• Program planning and multi-project execution leadership. 

Position Overview 

We are seeking a Senior FPGA Verification Engineer with 4–8 years of experience to design, develop, and execute comprehensive verification strategies for complex FPGA designs. This role requires strong hands-on expertise in System Verilog and UVM, testbench architecture, and cross-functional collaboration with design and system teams. 

 Key Responsibilities: 

• Develop and maintain System Verilog/UVM-based verification environments for FPGA block-level and top-level designs  
• Create and execute verification plans, directed and constrained-random test scenarios, assertions, and functional coverage  
• Perform simulation-based verification of FPGA designs using industry-standard simulators  
• Drive debug and root-cause analysis of functional issues and work closely with FPGA RTL designers
• Integrate and maintain VIPs, scoreboards, checkers, and reference models  
• Support FPGA bring-up, validation, and debug activities on FPGA platforms and evaluation boards  
• Review FPGA RTL, verification code, and test plans to ensure quality and completeness  
• Mentor junior engineers and contribute to FPGA verification best practices
• Support regression runs, coverage closure, and release signoff 

Qualifications 

Education:  

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field 

Experience: 

4–8 years of hands-on experience in functional verification 

Preferred Qualifications:  

• Familiarity with cadence tools like Xcelium 
• Familiarity with Xilinx Vivado 
• Experience with hardware/software co-verification  
• Knowledge of high-speed interfaces (AXI, AXIStream, DDR, SPI)  

Soft Skills: 

• Strong analytical and debugging skills  
• Ability to work effectively in cross-functional teams  
• Excellent written and verbal communication skills  
• Self-driven with the ability to own verification tasks end-to-end  
• High attention to detail and commitment to quality 

Technology Stack: 

• Languages: System Verilog, Verilog, VHDL (working knowledge)  
• Verification Methodology: UVM  
• Simulation Tools: Xcelium, Questa, VCS  
• FPGA Tools: Xilinx Vivado  
• Debug Tools: SimVision  
• Scripting: Python, Tcl, Shell  
• Version Control: Git   

Physical Requirements 

• Ability to work in a standard office environment  
• Ability to use a computer for extended periods  
• Occasional lab work for FPGA bring-up and debug 

This job description may not be inclusive to the duties and responsibilities listed. Additional tasks may be assigned to the employee from time to time or the scope of the job may change as needed by business demands. 

Essential Duties & Responsibilities

• Collaborate with Solutions Architects and Algorithm Engineers to develop and optimize C++ applications for real-time operational mission data processing signal chains.
• Work with remote sensing data providers (e.g. EO/IR, hyper-spectral, etc.) to characterize data and tune signal processing chains to optimize for specific data/targets.
• Contribute to the development of a robust, repeatable, and adaptable signal processing architecture.
• Engineer solutions for low Size, Weight, and Power (SWaP) deployments such as Versal ACAP devices.
• Ensure all solutions are thoroughly designed, documented, and tested.
• Use and contribute to CI/CD pipelines to encode quality within the Software Development Life Cycle.
• Collaborate with team members and leads to achieve project milestones.
• Adhere to applicable corporate and DoD processes & standards to ensure quality, compliance, and security.

Required Skills & Experience 

• Secret clearance (ability to obtain Secret clearance, i.e. U.S. Citizenship required)
• 8+ years’ experience in high performance C++ applications software engineering within Linux environments
• Bachelor's degree in Computer Science, Computer Engineering, or a related field with equivalent experience
• Knowledge of embedded systems and hardware acceleration concepts
• Ability to document and communicate software designs
• Familiarity with version control systems such as Git
• Excellent problem-solving skills and attention to detail
• Ability to work independently and as part of a team
• Strong communication and collaboration skills
• A passion for learning and staying current with industry trends

Desired Skills & Experience 

• Experience with Xilinx/AMD Versal ACAP platforms or similar (highly desired)
• Experience with Vitis Unified Software Platform and Vivado Design Suite
• Familiarity with FPGA design and hardware description languages (VHDL/Verilog)
• Experience translating complex algorithms into production software solutions
• Experience with DoD/DoW projects
• Current US Secret security clearance
• Strong Continuous integration/Continuous delivery techniques (CI/CD)
• Experience in other programming languages such as Python, Java, or JavaScript
• Experience in AI assisted software development tools and techniques

Application Deadline:  July 13, 2026

#CJPost

#LI-onsite

The Role

The software team at K2 strives to blur the lines between the various types of software development and encourages team members to get into parts of the stack they may not otherwise have experience with. This spectrum includes HDL programming (VHDL, SystemVerilog), embedded software on microcontrollers (Rust, C++), operating systems (Rust, C++, C), application software on flight computers (Rust, C++), GNC algorithms (Rust, C++),  to test systems (Python), and many things inbetween. By doing this, we create a stronger team with more capable engineers. For now, this does not include front-end, artificial intelligence, or machine learning development.

As a part of the team, you will be responsible for the development and verification of FPGA firmware used to fly some of the largest spacecraft that have ever been flown. You will be able to write mission-critical code that controls propulsion systems, attitude control systems, RF systems, and power systems to ensure safe and reliable operation of the vehicle. In your first 6 months you will work with your team to develop core pieces of the FPGA architecture such as the strategies for fault tolerance, real-time control, high-speed data routing, and telemetry downlink. In your first year you will implement larger and more complex FPGA systems and begin verifying your code using both software and hardware in the loop simulators. In your first two years you will operate your code on multiple spacecraft, demonstrating robust performance in demanding missions. 

Responsibilities

• Own the architecture and implementation of critical programmable logic systems across the spacecraft that support vehicle networking, RF systems, and real-time control of all spacecraft subsystems
• Implement these architectures in RTL using VHDL and SystemVerilog
• Verify and validate FPGA designs using a mix of simulation, bench-testing, and Hardware In The Loop testbeds
• Support integration, test, and troubleshooting efforts for FPGA designs across all levels of the spacecraft development and manufacturing
• Develop the tools and infrastructure to support rapid, high-reliability FPGA solutions across all subsystems

Qualifications

• Bachelor's degree in computer science, computer engineering, electrical engineering, math, or a STEM discipline or 3+ years of professional experience in software development
• 3+ years working with complex FPGA designs spanning digital, mixed signal, or RF applications
• Development experience with VHDL or SystemVerilog

Nice to Have

• Experience integrating logic onto Xilinx SoC platforms
• Experience with digital signal processing (DSP) fundamentals and implementing complex DSP logic and software defined radios on FPGAs
• Experience implementing high-speed SERDES interfaces such as Ethernet, PCIe, and JESD204C.
• Experience with standard bus and streaming protocols such as AXI and AXI-Stream
• Experience with evaluating and integrating vendor/third party IP
• Experience with common scripting languages such as Python, TCL, and Bash
• Experience with Linux systems programming and driver development
• Experience with continuous integration and continuous delivery systems
• Experience building or working with hard real-time embedded systems (bare-metal or RTOS)
• Basic knowledge of electronics, computer architecture, and control systems
• Experience with software verification and testing methods
• Experience with software and network performance analysis and debugging

Compensation and Benefits:

• Base salary range for this role is $120,000 – $225,000 + equity in the company
• Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
• Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

The Role

The software team at K2 strives to blur the lines between the various types of software development and encourages team members to get into parts of the stack they may not otherwise have experience with. This spectrum includes GNC algorithms (Rust, C++), application software on flight computers (Rust, C++), to embedded software on microcrontrollers (Rust, C++),to operating systems (Rust, C++, C), to HDL programming (VHDL, SystemVerilog), to test systems (Python), and many things inbetween. By doing this, we create a stronger team with more capable engineers. For now, this does not include front-end, artificial intelligence, or machine learning development.

As a part of the team, you will be responsible for the development and verification of the software used to fly some of the largest spacecraft that have ever been flown. You will be able to write mission-critical code that controls propulsion systems, attitude control systems, and power systems to ensure safe and reliable operation of the vehicle. In your first 6 months you will developcore pieces of the software architecture including the strategies for fault tolerance, real-time control, and telemetry downlink. In your first year you will implement larger software systems  and begin verifying your code using both software and hardware in the loop simulators. In your first two years you will operate your code on multiple spacecraft, demonstrating robust performance in demanding missions.

Responsibilities

• Create software architecture for real-time, fault tolerant control of a 20kW+ spacecraft
• Develop software applications for control of spacecraft subsystems, including propulsion, guidance/attitude control, thermal, power, and communications systems
• Design and implement state machines for robust operation of the spacecraft
• Create and utilize robust tools to allow for rapid deployment of quality code
• Perform data analysis and anomaly investigation to identify and resolve software bugs
• Support integration and testing of the spacecraft subsystems
• Build and maintain infrastructure to increase reliability when developing and testing software 

Qualifications

• Bachelor's degree in computer science, computer engineering, electrical engineering, math, or a STEM discipline or 5+ years of professional experience in software engineering 
• Development experience in Rust, C/C++, Python, VHDL, SystemVerilog

Nice to Have

• Experience with spacecraft flight software development
• Fluency with Linux systems programming and driver development
• Experience with continuous integration and continuous delivery systems
• Experience building or working with hard real-time embedded systems (bare-metal or RTOS)
• Basic knowledge of electronics, computer architecture, and control systems
• Experience developing or working with state machines
• Experience with software verification and testing methods
• Experience with software and network performance analysis and debugging
• Experience with implementing Extended Kalman Filters for inertial sensors
• Experience with fault tolerant software design and implementation
• Experience defining and creating test systems for both hardware-in-the-loop and hardware-out-of-the-loop

Compensation and Benefits:

• Base salary range for this role is $160,000 - $200,000 + equity in the company
• Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
• Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

The Role

The software team at K2 strives to blur the lines between the various types of software development and encourages team members to get into parts of the stack they may not otherwise have experience with. This spectrum includes GNC algorithms (Rust, C++), application software on flight computers (Rust, C++), to embedded software on microcrontrollers (Rust, C++),to operating systems (Rust, C++, C), to HDL programming (VHDL, SystemVerilog), to test systems (Python), and many things inbetween. By doing this, we create a stronger team with more capable engineers. For now, this does not include front-end, artificial intelligence, or machine learning development.

As a part of the team, you will be responsible for the development and verification of the software used to fly some of the largest spacecraft that have ever been flown. You will be able to write mission-critical code that controls propulsion systems, attitude control systems, and power systems to ensure safe and reliable operation of the vehicle. In your first 6 months you will developcore pieces of the software architecture including the strategies for fault tolerance, real-time control, and telemetry downlink. In your first year you will implement larger software systems  and begin verifying your code using both software and hardware in the loop simulators. In your first two years you will operate your code on multiple spacecraft, demonstrating robust performance in demanding missions.

Responsibilities

• Create software architecture for real-time, fault tolerant control of a 20kW+ spacecraft
• Develop software applications for control of spacecraft subsystems, including propulsion, guidance/attitude control, thermal, power, and communications systems
• Design and implement state machines for robust operation of the spacecraft
• Create and utilize robust tools to allow for rapid deployment of quality code
• Perform data analysis and anomaly investigation to identify and resolve software bugs
• Support integration and testing of the spacecraft subsystems
• Build and maintain infrastructure to increase reliability when developing and testing software 

Qualifications

• Bachelor's degree in computer science, computer engineering, electrical engineering, math, or a STEM discipline or 10+ years of professional experience in software engineering 
• Development experience in Rust, C/C++, Python, VHDL, SystemVerilog

Nice to Have

• Experience with spacecraft flight software development
• Fluency with Linux systems programming and driver development
• Experience with continuous integration and continuous delivery systems
• Experience building or working with hard real-time embedded systems (bare-metal or RTOS)
• Basic knowledge of electronics, computer architecture, and control systems
• Experience developing or working with state machines
• Experience with software verification and testing methods
• Experience with software and network performance analysis and debugging
• Experience with implementing Extended Kalman Filters for inertial sensors
• Experience with fault tolerant software design and implementation
• Experience defining and creating test systems for both hardware-in-the-loop and hardware-out-of-the-loop

Compensation and Benefits:

• Base salary range for this role is $200,000 - $240,000 + equity in the company
• Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
• Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

WHAT YOU’LL DO

• Technical lead for electrical engineering team, creating embedded compute solutions for vehicle management, DSP, and networking.
• Own the full PCB development cycle of host boards for FPGAs / SoCs / SoMs (Developing requirements, schematic capture, board layout, bring-up, test, and integration).
• Develop and improve workflows throughout the FPGA / HDL design cycle (Architecture, functional block definition, simulation, system testing, HDL library standardization).
• Collaborate with internal stakeholders to develop a strategy for developing and rolling out your compute solutions across Anduril in a scalable manner.
• Create, maintain and communicate product development schedules with sufficient detail to ensure that all assigned personnel are aware of their tasks and deadlines.

REQUIRED QUALIFICATIONS

• Bachelor’s Degree in Electrical Engineering or equivalent
• 15+ years of experience designing, testing and troubleshooting complex board designs in military, automotive or similar hardware.
• Experience with leading an Electrical Engineering team focused on Digital Design
• Proficiency in an HDL language (VHDL, Verilog)
• Familiarity with common MCU, CPU, FPGA devices and technologies.
• Familiarity with standard interfaces such as Ethernet, CAN, I2C, SPI, PCIe, USB, etc.
• Experience in design for signal integrity / power integrity.
• Knowledge of modern analog and digital electronics and electronic circuits.
• Competence with test equipment such as oscilloscopes, logic analyzers, thermal chambers, current-probes, and automation of tests.
• Proficient with Altium Designer or equivalent electronic design automation design tool
• Eligible to obtain and maintain an active U.S. Top Secret security clearance

PREFERRED QUALIFICATIONS

• Understanding and familiarity with DO-254, DO-178C, DO-160, DO-311A
• Understanding and familiarity with MIL-STD-810, MIL-STD-704, MIL-STD-461
• Expertise in computer networking
• Experience with implementing enhanced security measures

ABOUT THE TEAM 

The Anduril Imaging team develops state-of-the-art imaging systems across both hardware and software, deployed to tackle the most significant security challenges of America and its allies.  The team is heavily involved in utilizing computer vision, perception, electro-optical, infrared, and sensor data to give our war fighters and allies an advantage.   

ABOUT THE JOB 

The Imaging team is seeking a Firmware Engineer to help design a new product lines. In this role, you will work closely with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products. 

WHAT YOU’LL DO 

• FPGA architecture, standards, development and review processes 
• FPGA Development: Designing, architecting, simulating, and integrating VHDL designs into FPGAs or Systems on Chip (SoC) for optimized performance, resource utilization, and power efficiency. 
• Hardware/Software Integration: Collaborating with multidisciplinary teams (electrical engineers, software engineers, systems engineers) to ensure seamless integration of the firmware with the overall system, including processor bring-up and board support packages. 
• Testing and Validation: Developing robust test benches in VHDL/Verilog and utilizing lab tools such as oscilloscopes and logic analyzers for rigorous testing and validation of designs against functional specifications and performance requirements. 
• Optimization: Optimizing the algorithms for hardware acceleration, including MIPS optimization and efficient use of on-chip bus protocols like AXI or AXI-Stream.  

REQUIRED QUALIFICATIONS 

• Education: A Bachelor's in Electrical Engineering, Computer Engineering, or a related technical field is typically required. 
• Experience: 2+ years of experience developing HDL firmware for FPGA devices  
• Hardware Description Languages: Expertise in VHDL and/or Verilog/SystemVerilog is essential for RTL (Register Transfer Level) design. 
• FPGA Tools: Experience with industry-standard FPGA design tools such as Xilinx Vivado or Intel Quartus. 
• Debugging Skills: Strong hardware/software debugging skills using standard lab equipment. 
• Version Control: Proficiency with version control systems (e.g., Git) for collaborative development. 
• Eligible to obtain and maintain an active U.S. Secret security clearance 

PREFERRED QUALIFICATIONS  

• Demonstrated experience designing with multi-gigabit SERDES, DDR memory busses, Ethernet MAC and PHY interfaces, FPGAs, and common communication busses like SPI and I2C 
• Embedded software development experience with the use of timers, interrupts, hardware peripherals such as SPI controllers and ADCs 
• Knowledge of embedded Linux development, including device trees, hardware drivers, bootloaders, and basic Unix/Linux tools 
• Familiar with common programming languages like Python and MATLAB 
• Familiarity with infrared image sensor technology 

ABOUT THE TEAM

Anduril’s Electronic Warfare (EW) team is seeking experienced generalist embedded software engineers to build out the software ecosystem supporting a next-generation electronic warfare platform. As an Embedded software engineer, you’ll develop high-performance implementations of numerical algorithms, collaborate with digital systems engineers to enable maximum-performance interfaces between next-gen RF hardware and software, work with DSP and RFML engineers to rapidly deploy bleeding-edge capabilities to our customers, and collaborate with the wider software organization to deliver seamless integration of electronic warfare products with the Anduril Lattice system-of-systems suite. You will apply state-of-the-art software construction techniques to ensure the timely delivery of correct mission-critical code.

WHAT YOU'LL DO

• Work with digital systems engineers and systems programmers to develop high-performance hardware/software interfaces.
• Develop and maintain infrastructure and tools that enable DSP and RFML engineers to rapidly deploy algorithms and models to our assets.
• Develop high-performance implementations of numerical algorithms for generating, manipulating, and visualizing RF data.
• Develop correct, high-reliability software for controlling our electronic warfare assets, seamlessly integrated with the Anduril Lattice ecosystem.
• Utilize infrastructure providing deterministic builds and configuration management for deployment, guaranteeing software traceability and minimizing the maintenance burden of our products.

REQUIRED QUALIFICATIONS

• 7+ years professional experience in software engineering
• Experience (professional or in the setting of an open source community) working with typed functional programming languages (Haskell or Rust)
• Experience with software-defined digital radio systems
• Willingness to travel up 30%
• Eligible to obtain and maintain an active U.S. Top Secret SCI security clearance

PREFERRED QUALIFICATIONS

• Experience with MATLAB, especially C code generation.
• Experience with Linux kernel module development
• Experience with FPGA development (Verilog, VHDL, etc.), especially Xilinx devices and tools.
• Experience with graphics programming (OpenGL, DirectX, Vulkan, etc.)
• Experience with Nix/NixOS

ABOUT THE TEAM

The Electronic Warfare (EW) team is responsible for developing high-reliability radios, embedded processing, and power systems for software defined radio platforms. Working across hardware, software, and mission autonomy, the team delivers EW-critical electronics, PCB assemblies, and FPGA-based processing architectures that enable Anduril's next-generation autonomous electronic warfare platforms to operate in complex and contested environments. EW Electrical Engineers drive end-to-end development, from system architecture and circuit design to verification, integration, and test, ensuring scalable, mission-ready solutions that meet the performance, reliability, and survivability demands of the U.S. Military and modern EW warfare.

ABOUT THE JOB

We are looking for a Senior FPGA Engineer to join our rapidly growing team in Costa Mesa, CA. In this role, you will be responsible for the end-to-end design and verification of projects on the Xilinx SOC/FPGA platforms and helping to establish robust design processes. This will require expertise in SystemVerilog, FPGA, and Xilinx. If you are someone who has supported rapid software defined radio development, then this role is for you.

WHAT YOU'LL DO

• Work with software, and electrical, engineers to bring up state of the art boards for software defined radios.
• Integrate, and test, VHDL DSP Modules into larger system.
• Design custom, and optimized, HDL for software defined radios.
• Develop drivers for custom RF component boards (PLLs, mixed signal front ends, etc)

REQUIRED QUALIFICATIONS

• Strong experience with DSP implementation for embedded devices and/or software defined radios.
• Experience leading a team of FPGA engineers in the development of new custom PCB's and custom FPGA modules
• Experience with bring-up of high speed digital interfaces (PCIE,JESD,etc).
• HDL design experience using VHDL or Verilog.
• Experience with Linux development environment and tools (e.g. Git, gcc, etc)
• Eligible to obtain and maintain an active U.S. Secret security clearance

PREFERRED QUALIFICATIONS

• Experience with embedded Linux driver development.
• Experience with Linux development environment and tools (e.g. Git, gcc, etc)
• Exposure to Wireless comms or Radar systems
• Experience with RF test equipment (Spec An, Sig Gens, Oscilloscope, etc)
• Experience with Xilinx AI Engines or NVDIA CUDA

WHAT YOU’LL DO

• Lead an electrical engineering team in creating embedded compute solutions for vehicle management, DSP, and networking
• Own the full PCB development cycle of host boards for FPGAs / SoCs / SoMs (Developing requirements, schematic capture, board layout, bring-up, test, and integration)
• Develop and improve workflows throughout the FPGA / HDL design cycle (Architecture, functional block definition, simulation, system testing, HDL library standardization)
• Collaborate with internal stakeholders to develop a strategy for developing and rolling out your compute solutions across Anduril in a scalable manner
• Create, maintain and communicate product development schedules with sufficient detail to ensure that all assigned personnel are aware of their tasks and deadlines.

REQUIRED QUALIFICATIONS

• Bachelor’s Degree in Electrical Engineering or equivalent
• 7+ years of experience designing, testing and troubleshooting complex board designs in military, automotive or similar hardware.
• Experience with leading an Electrical Engineering team focused on Digital Design
• Proficiency in an HDL language (VHDL, Verilog)
• Familiarity with common MCU, CPU, FPGA devices and technologies.
• Familiarity with standard interfaces such as Ethernet, CAN, I2C, SPI, PCIe, USB, etc.
• Experience in design for signal integrity / power integrity.
• Knowledge of modern analog and digital electronics and electronic circuits.
• Competence with test equipment such as oscilloscopes, logic analyzers, thermal chambers, current-probes, and automation of tests.
• Proficient with Altium Designer or equivalent electronic design automation design tool
• Eligible to obtain and maintain an active U.S. Top Secret security clearance

PREFERRED QUALIFICATIONS

• Understanding and familiarity with DO-254, DO-178C, DO-160, DO-311A
• Understanding and familiarity with MIL-STD-810, MIL-STD-704, MIL-STD-461
• Expertise in computer networking
• Experience with implementing enhanced security measures

ABOUT THE TEAM
Anduril’s Electronic Warfare (EW) team is seeking an experienced embedded software engineer to support next-generation electronic warfare platforms in production. As a Production Embedded software engineer, you’ll develop and maintain EW product software specific to a production environment, collaborate with manufacturing and test automation engineers to improve testability, and collaborate with the wider embedded software organization to ensure a seamless new product introduction.

WHAT YOU'LL DO

• Contribute to design reviews acting as an expert in Built In Test, design for test, and fault isolation and detection.
• Define Built In Test strategy and requirements for automated testing, supporting fault detection, isolation, and reporting.
• Develop and maintain production SW builds that enable testing and troubleshooting at board-level and unit-level RF test stations.
• Develop and regression test high-reliability software for controlling our electronic warfare assets, seamlessly integrated with production test automation.
• Utilize infrastructure providing deterministic builds and configuration management for production deployment, guaranteeing software traceability and minimizing the maintenance burden of manufacturing.

REQUIRED QUALIFICATIONS

• 7+ years professional experience in software engineering
• Experience (professional or in the setting of an open source community) working with typed functional programming languages (Haskell or Rust)
• Experience with Built In Test development
• Eligible to obtain and maintain an active U.S. Secret security clearance

PREFERRED QUALIFICATIONS

• Experience with software-defined digital radio systems
• Experience with MATLAB, especially C code generation.
• Experience with FPGA development (Verilog, VHDL, etc.), especially Xilinx devices and tools.
• Experience with graphics programming (OpenGL, DirectX, Vulkan, etc.)
• Experience with Nix/NixOS
• Experience with Linux boot stages
• Basic understanding of RF test equipment, such as signal generators, spectrum analyzers 

WHAT YOU’LL DO

• Lead an electrical engineering team in creating embedded compute solutions for vehicle management, DSP, and networking
• Own the full PCB development cycle of host boards for FPGAs / SoCs / SoMs (Developing requirements, schematic capture, board layout, bring-up, test, and integration)
• Develop and improve workflows throughout the FPGA / HDL design cycle (Architecture, functional block definition, simulation, system testing, HDL library standardization)
• Collaborate with internal stakeholders to develop a strategy for developing and rolling out your compute solutions across Anduril in a scalable manner
• Create, maintain and communicate product development schedules with sufficient detail to ensure that all assigned personnel are aware of their tasks and deadlines.

REQUIRED QUALIFICATIONS

• Bachelor’s Degree in Electrical Engineering or equivalent
• 7+ years of experience designing, testing and troubleshooting complex board designs in military, automotive or similar hardware.
• Experience with leading an Electrical Engineering team focused on Digital Design
• Proficiency in an HDL language (VHDL, Verilog)
• Familiarity with common MCU, CPU, FPGA devices and technologies.
• Familiarity with standard interfaces such as Ethernet, CAN, I2C, SPI, PCIe, USB, etc.
• Experience in design for signal integrity / power integrity.
• Knowledge of modern analog and digital electronics and electronic circuits.
• Competence with test equipment such as oscilloscopes, logic analyzers, thermal chambers, current-probes, and automation of tests.
• Proficient with Altium Designer or equivalent electronic design automation design tool
• Eligible to obtain and maintain an active U.S. Top Secret security clearance

PREFERRED QUALIFICATIONS

• Understanding and familiarity with DO-254, DO-178C, DO-160, DO-311A
• Understanding and familiarity with MIL-STD-810, MIL-STD-704, MIL-STD-461
• Expertise in computer networking
• Experience with implementing enhanced security measures

ABOUT THE TEAM

Anduril’s Electronic Warfare (EW) team is seeking experienced generalist embedded software engineers to build out the software ecosystem supporting a next-generation electronic warfare platform. As an Embedded software engineer, you’ll develop high-performance implementations of numerical algorithms, collaborate with digital systems engineers to enable maximum-performance interfaces between next-gen RF hardware and software, work with DSP and RFML engineers to rapidly deploy bleeding-edge capabilities to our customers, and collaborate with the wider software organization to deliver seamless integration of electronic warfare products with the Anduril Lattice system-of-systems suite. You will apply state-of-the-art software construction techniques to ensure the timely delivery of correct mission-critical code.

WHAT YOU'LL DO

• Work with digital systems engineers and systems programmers to develop high-performance hardware/software interfaces.
• Develop and maintain infrastructure and tools that enable DSP and RFML engineers to rapidly deploy algorithms and models to our assets.
• Develop high-performance implementations of numerical algorithms for generating, manipulating, and visualizing RF data.
• Develop correct, high-reliability software for controlling our electronic warfare assets, seamlessly integrated with the Anduril Lattice ecosystem.
• Utilize infrastructure providing deterministic builds and configuration management for deployment, guaranteeing software traceability and minimizing the maintenance burden of our products.

REQUIRED QUALIFICATIONS

• 2+ years professional experience in software engineering
• Experience with software-defined digital radio systems
• Eligible to obtain and maintain an active U.S. Top Secret SCI security clearance

PREFERRED QUALIFICATIONS

• Experience (professional or in the setting of an open source community) working with typed functional programming languages (Haskell, Scala, F#, OCaml, Rust, etc.)
• Experience with MATLAB, especially C code generation.
• Experience with Linux kernel module development
• Experience with FPGA development (Verilog, VHDL, etc.), especially Xilinx devices and tools.
• Experience with graphics programming (OpenGL, DirectX, Vulkan, etc.)
• Experience with Nix/NixOS

ABOUT THE TEAM

Anduril’s Electronic Warfare (EW) team is seeking experienced generalist embedded software engineers to build out the software ecosystem supporting a next-generation electronic warfare platform. As an Embedded software engineer, you’ll develop high-performance implementations of numerical algorithms, collaborate with digital systems engineers to enable maximum-performance interfaces between next-gen RF hardware and software, work with DSP and RFML engineers to rapidly deploy bleeding-edge capabilities to our customers, and collaborate with the wider software organization to deliver seamless integration of electronic warfare products with the Anduril Lattice system-of-systems suite. You will apply state-of-the-art software construction techniques to ensure the timely delivery of correct mission-critical code.

WHAT YOU'LL DO

• Work with digital systems engineers and systems programmers to develop high-performance hardware/software interfaces.
• Develop and maintain infrastructure and tools that enable DSP and RFML engineers to rapidly deploy algorithms and models to our assets.
• Develop high-performance implementations of numerical algorithms for generating, manipulating, and visualizing RF data.
• Develop correct, high-reliability software for controlling our electronic warfare assets, seamlessly integrated with the Anduril Lattice ecosystem.
• Utilize infrastructure providing deterministic builds and configuration management for deployment, guaranteeing software traceability and minimizing the maintenance burden of our products.

REQUIRED QUALIFICATIONS

• 7+ years professional experience in software engineering
• Experience (professional or in the setting of an open source community) working with typed functional programming languages (Haskell or Rust)
• Experience with software-defined digital radio systems
• Eligible to obtain and maintain an active U.S. Top Secret SCI security clearance

PREFERRED QUALIFICATIONS

• Experience with MATLAB, especially C code generation.
• Experience with Linux kernel module development
• Experience with FPGA development (Verilog, VHDL, etc.), especially Xilinx devices and tools.
• Experience with graphics programming (OpenGL, DirectX, Vulkan, etc.)
• Experience with Nix/NixOS

At Tenstorrent, we believe the future of computing must be open, which is why our interns don’t just watch from the sidelines - they help build the core of it. We provide a "code-to-career" pipeline where students collaborate with industry experts to solve high-stakes problems in RISC-V and AI hardware-software co-design. By joining us, you are taking an internship to democratize high-performance computers that are accessible to everyone. During this internship, you will bridge the gap between academic theory and industry practice  

This role is on-site, full time, based in Belgrade, Serbia.

Who You Are

• You are in your final year of undergraduate study, a recent graduate, or currently pursuing a master's degree in Computer Science or Electronics Engineering. 
• You enjoy tackling complex technical problems and naturally approach them with structured, analytical thinking. 
• You have written hardware in Verilog or VHDL and understand how HDL translates to physical logic. 
• You are genuinely curious about how processors and computer architectures work, not just in theory but at the implementation level. 
• You are comfortable working in C/C++ and can get things done with scripting languages such as Python, Perl, or Tcl. 
• Nice to have: experience in advanced digital hardware and system architecture (e.g., high‑frequency logic, processors/GPUs, SoCs and memory systems, real‑time hardware/firmware) and modern machine learning, including deep learning frameworks and models.

What We Need

• Architecture exploration and modeling.
• Implementation of Tenstorrent IP and SOC RTL logic in Verilog.
• Verification of Tenstorrent's IP and SOC logic using advanced verification methodologies.
• Low-level software development for hardware testing.

What You Will Learn

• Exposure to the complete RTL-to-GDSII flow. 
• Front-End Design & Logic Synthesis: Mastering Verilog/SystemVerilog to translate architectural specs into optimized hardware descriptions.
• Verification Methodologies: Developing robust testbenches and utilizing UVM (Universal Verification Methodology) and/or CocoTb to ensure "bug-free" silicon.
• Performance benchmark and optimizations
• Timing & Power Analysis: Performing Static Timing Analysis (STA) and power optimization to meet aggressive performance targets.
• Sign-off & Tape-out Readiness: Understanding the rigorous checks required to prepare a design for fabrication.

Hiring Timelines

This internship opportunity is available throughout our 2 terms with the following corresponding recruitment cycles:

• Summer/Fall Term: Aug-Jan work term, Apr–May recruit.
• Winter/Spring Term: Jan–June work term, Nov–Dec recruit.

Please note these timelines are for reference only. Actual timelines may vary.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

RISC-V CPU RTL owner will play a key role in developing next-generation CPU design. This position requires a deep understanding of CPU design including Architecture, RTL, Design Verification, Physical Design Flow. The ideal candidate will drive the unit specification, RTL design, and unit verification.

This role is Remote, based out of The United States.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Key Responsibilities:

• RISC-V CPU Unit Microarchitecture Specification: Define and develop microarchitecture specifications for the assigned unit (branch predictor, rename, instruction scheduling, vector execution, load/store, vector load/store support). The specification includes not only design, but also comprehensive analysis / strategy for verification and PPA (power, performance, area) closure.
• RISC-V CPU Core Unit RTL Design: The candidate will be responsible for the quality of RTL including design verification and PPA closure. This includes writing RTL, reviewing / refining unit verification environment, applying right RTL optimization to control PPA.
• AI Assisted Design Adaption: To maximize the team’s output, the candidate actively uses AI tools to accelerate the CPU design process.
• Mentoring Junior Engineers: depending on a seniority of the engineer, the engineer may mentor junior members in the team.

Qualifications:

• Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• Proven track record of designing high-performance CPU RTL for x86, Arm, POWER, SPARC, or RISC-V.
• Deep understanding of design verification strategy and trade-offs for verification methodology (simulation, formal, various checkers, etc…)
• Deep understanding of CPU microarchitecture and PPA trade-off.
• Basic understanding of RISC-V Architecture including V-extension is preferred.
• Proficiency in hardware description languages (HDLs) such as Verilog, SystemVerilog or VHDL.
• Excellent problem-solving abilities and analytical skills.
• Strong communication skills, with the ability to convey complex technical concepts to diverse audiences.
• Ability to work collaboratively in a team-oriented environment and across multiple disciplines.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent is leading the industry on state of art AI technology, having developed high performance RISC V CPUs from scratch and fostering a deep passion for building the best AI platforms. We are now extending this philosophy to our Open Chiplet Atlas initiative, an open ecosystem built to connect diverse partners around a shared architecture. This role sits at the front line of that effort, driving real adoption with customers and partners.

This role is remote, based out of Munich, Germany.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• Comfortable operating at the intersection of technology, ecosystem partners, and business strategy.
• A strong communicator who ensures alignment across technical, business, and partner teams.
• Proactive, adaptable, and capable of thriving in the ambiguity of building a new ecosystem.
• Driven by impact and motivated to shape the future of chiplet based computing platforms.

What We Need

• Bachelor’s degree in a technical field, for example, Engineering or Computer Science, or equivalent practical experience demonstrating deep technical understanding. An MBA is a strong plus.
• 5+ years of experience in technical marketing, technical support, and customer engagement within the semiconductor industry.
• Good understanding of chiplet or SoC architecture, silicon design flows, and system level tradeoffs.
• Experience with HDLs (Verilog/VHDL), industry standard ASIC SoC design tools and flows, familiarity with chip packaging technologies, and chiplets is a plus
• Familiarity with the semiconductor industry, including industry standards bodies, for example, PCI SIG or CXL Consortium, or interconnect protocols, for example, UCIe or AMBA. Experience working with open source hardware projects is a plus.
• Exceptional communication and presentation skills, with the ability to influence both technical and executive audiences.

What You Will Learn

• How an open chiplet ecosystem integrates diverse IP, designs, and software from multiple partners.
• The strategic balance of market requirements, partner needs, and technical tradeoffs, including performance, cost, and interoperability, for an open standard.
• Best practices for launching, managing, and scaling an industry wide compliance and certification program.
• Insights into emerging business models and technologies in heterogeneous computing and open hardware.
• How to build consensus and drive adoption across a diverse, global community of partners and customers.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

We are looking for a talented engineer to join our CPU design team to define and implement CPU system RTL. You’ll work to combine multiple cores, multiple clusters of cores, fabrics and subsystem components together, collaborating with DV, PD, architecture and performance teams to deliver a functional, timing, and power-converged design.

This role is hybrid, based out of Bengaluru, India.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• An experienced micro-architect who thrives in building CPU systems (multiple cores, multiple clusters of cores and subsystem components) from scratch.
• Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis.
• Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments.
• Background in microarchitecture definition, design specification, and performance-driven trade-off analysis.

What We Need

• 10+ years of industry experience with strong CPU systems RTL and microarchitecture background.
• Collaborate closely with DV, PD, architecture and performance engineers to meet functional, timing, and power goals.
• Use innovative techniques to optimize power, performance, and area while driving RTL experiments and evaluating results.
• Partner with validation and test teams to ensure robust pre-silicon and post-silicon execution.
• Enhance RTL design environment, tools, and methodologies to improve development efficiency.

What You Will Learn

• End-to-end exposure to CPU design from microarchitecture through timing and power convergence.
• How to design and optimize a custom RISC-V CPU system from first principles.
• Integration of open-source and industry-standard tools to improve RTL flows and results.
• Work in a deeply technical, highly collaborative team solving cutting-edge CPU design challenges.

Tenstorrent is accelerating the future of AI and high-performance compute by building industry-leading CPU and AI architectures. As an Automotive and Robotics SoC Architect, you will define scalable, top-down system architectures that unify our CPU and AI technologies for next-generation automotive applications. This senior technical role shapes the architectural direction of our automotive and robotics portfolio, ensuring our products meet the industry's highest expectations for performance, safety, reliability, and security. This position is central to how Tenstorrent delivers world-class automotive solutions and requires strong technical leadership, systems thinking, and cross-functional collaboration.

This role is remote, based out of North America.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• A systems thinker who can architect complex SoCs from concept to execution.
• A strong communicator who can articulate technical direction across engineering teams and external partners.
• Someone with deep knowledge of safety-critical systems and the unique needs of automotive environments.
• An innovator who can identify future use cases and propose next-generation architectural solutions.
• A leader who thrives in a highly technical, cross-functional, fast-moving environment.

What We Need

• Bachelor’s, Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or related field.
• Extensive experience designing complex SoCs, ideally in automotive applications.
• Proficiency in hardware description languages such as Verilog or VHDL.
• Experience with hardware/software co-design and co-verification.
• Knowledge of automotive safety standards (e.g., ISO 26262) and security principles.
• Someone comfortable with up to 25% international travel. 
• Experience with both cameras, sensors, and others is a plus.

What You Will Learn

• How cutting-edge CPU and AI architectures are adapted for automotive-grade environments.
• Best-in-class methodologies for safety-critical SoC design, verification, and system integration.
• How to translate emerging automotive use cases into scalable, future-proof SoC architectures.
• Approaches to hardware-level security, robustness, and cyber-resilience in automotive compute systems.
• Cross-functional collaboration strategies that drive innovation across architecture, software, DV, and product teams.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

We are seeking a highly motivated and passionate CPU Architect to join our processor architecture team, focusing on the CPU’s load-store unit. In this role, you will contribute to the design, analysis, and optimization of cutting-edge CPU architectures with an emphasis on a high-performance load-store unit. This is an excellent opportunity to work alongside world class architects in high-performance computing and processor design.

This role is Remote, based out of The United States.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Responsibilities:

• Drive the architecture, micro-architecture, design and optimization of the CPU load-store unit for Tenstorrent’s high-performance out-of-order RISCV CPUs
• Propose new implementations to optimize load-store PPA
• Perform simulations, modeling, and performance analysis of advanced CPU features and state-of-the-art data prefetchers
• Collaborate with hardware and software teams to optimize memory access patterns and system performance.
• Stay up to date with industry trends and emerging technologies in CPU architecture and the memory subsystem
• Support documentation and presentation of architectural decisions, trade-offs, and findings.

Experience & Qualifications:

• Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or Computer Science (or equivalent experience).
• Strong understanding of computer architecture fundamentals, including memory hierarchy, cache coherence, and data prefetching
• Familiarity with performance modeling and simulation tools (e.g., Gem5, SimpleScalar, or similar).
• Basic knowledge of hardware description languages (e.g., Verilog, VHDL) and system-level programming (C, C++).
• Problem-solving skills and ability to analyze complex system interactions.
• Excellent communication and teamwork abilities.
• Hands-on experience with performance profiling tools and benchmarking methodologies.
• Exposure to parallel processing architectures and multi-core systems.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

We are looking for a talented engineer to join our CPU design team to define and implement CPU system RTL. You’ll work to combine multiple cores, multiple clusters of cores, fabrics and subsystem components together, collaborating with DV, PD, architecture and performance teams to deliver a functional, timing, and power-converged design.

This role is hybrid, based out of Austin, TX, Fort Collins, CO or Santa Clara, CA.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• An experienced micro-architect who thrives in building CPU systems (multiple cores, multiple clusters of cores and subsystem components) from scratch.
• Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis.
• Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments.
• Background in microarchitecture definition, design specification, and performance-driven trade-off analysis.

What We Need

• 10+ years of industry experience with strong CPU systems RTL and microarchitecture background.
• Collaborate closely with DV, PD, architecture and performance engineers to meet functional, timing, and power goals.
• Use innovative techniques to optimize power, performance, and area while driving RTL experiments and evaluating results.
• Partner with validation and test teams to ensure robust pre-silicon and post-silicon execution.
• Enhance RTL design environment, tools, and methodologies to improve development efficiency.

What You Will Learn

• End-to-end exposure to CPU design from microarchitecture through timing and power convergence.
• How to design and optimize a custom RISC-V CPU system from first principles.
• Integration of open-source and industry-standard tools to improve RTL flows and results.
• Work in a deeply technical, highly collaborative team solving cutting-edge CPU design challenges.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

We are looking for a Staff Digital Design Engineer to help define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads. This role is ideal for engineers who thrive at the intersection of microarchitecture, RTL implementation, and performance-aware design.

This role is hybrid, based out of Toronto, Ottawa, Boston, or Austin. 

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• A digital design expert with a deep understanding of computer architecture and IP microarchitecture.
• Skilled in RTL development (Verilog/VHDL) and familiar with full ASIC flows.
• Comfortable optimizing for power, performance, and area (PPA) under aggressive design goals.
• A naturally collaborative and technical engineer — you thrive in spec definition, peer reviews, and team-wide planning.

What We Need

• Architecture and RTL implementation of Tenstorrent’s custom IP blocks and SoC components.
• Performance-aware design decisions for compute, interconnect, or memory-heavy blocks.
• Occasional contributions to validation using emulation, FPGA prototyping, or UVM flows.
• Strong synthesis and timing closure awareness to support backend teams.
• Prior experience in on-chip fabric and interconnect designs is an asset.

What You Will Learn

• How cutting-edge AI chips are built, from spec to silicon.
• What it takes to collaborate with teams designing novel processor and memory architectures.
• How to blend custom logic with standard SoC elements for power and scale.
• How cross-functional workflows come together across design, DV, physical, and firmware teams.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

We are looking for a Staff Digital Design Engineer to help define, build, and optimize high-performance chiplet based SoC architectures. This role is ideal for engineers who thrive at the intersection of microarchitecture, RTL implementation, and performance and power aware design.

This role is hybrid, based out of Tokyo.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

• A digital design expert with a deep understanding of computer architecture and IP microarchitecture.
• Skilled in RTL development (Verilog/VHDL) and familiar with full ASIC flows.
• Comfortable optimizing for power, performance, and area (PPA) under aggressive design goals.
• A naturally collaborative and technical engineer — you thrive in spec definition, peer reviews, and team-wide planning.
• Strong synthesis and timing closure awareness to support backend teams.

What We Need

• Proficiency in hardware description languages (HDLs) such as Verilog, SystemVerilog or VHDL.
• Architecture and RTL implementation of Tenstorrent’s custom IP blocks and SoC components.
• Performance-aware design decisions for compute, interconnect, or memory-heavy blocks.
• Occasional contributions to validation using emulation, FPGA prototyping, or UVM flows.
• Prior experience in on-chip fabric and interconnect designs and basic understanding of RISC-V Architecture and debug experience is preferable.

What You Will Learn

• How cutting-edge chiplet design are built, from spec to silicon.
• What it takes to collaborate with teams designing novel processor and memory architectures.
• How cross-functional workflows come together across design, DV, physical, and firmware teams.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a U.S. EAR Country Groups D:1, E1, or E2 country. 

Who we are

The role

The day-to-day

• Define the imaging architecture: You will select the optimal combination of lenses and sensors aligning requirements with our AI team to optimize algorithm performance, balancing technical trade-offs.

• You will guide & perform the implementation of low-level logic like FPGA programming, handling high-speed sensor interfaces and implementing hardware-based synchronization.

• Drive the Manufacturing Lifecycle: You will collaborate closely with external partners to transition your designs from prototype to production, defining validation tests and resolving challenges for complex opto-electronic assemblies.

• Hardware Bring-up & Debug: You will spend hands-on time in the lab bringing up prototypes, testing their performance under varying conditions and support their integration into our software stack.

• Image Quality Tuning: You will analyze application specific camera performance and tune your designs & low-level algorithms to maximize the value the sensor provides to our AI applications.

You should apply if you

• Have a Ph.D. or M.Sc. in Electrical Engineering, Computer Engineering, Applied Physics, Optical Engineering, related field or equivalent work experience.

• Have a professional track record of bringing complex opto-electronic systems from prototype to mass production.

• Have mastered Opto-Mechanical Design Challenges, e.g. thermal management for high-power sensors or precise mechanical mounting for optical alignment

• Possess a deep understanding of the "physics of imaging," ranging from lens selection and MTF characteristics to CMOS sensor architecture, quantum efficiency, and noise sources.

• Understand system-level synchronization, knowing how to utilize PTP, PPS, or hardware triggers (Hsync, Vsync) to perfectly align image capture with other sensors and compute modules.

• Are proficient in languanges like C/C++ or Rust for low-level firmware development or hardware-software interface debugging.

  Nice to Have

• Have brought hardware to life using Verilog, SystemVerilog, VHDL or similar, dealing with high-bandwidth data streams, video processing pipelines, and sensor interfaces on the lowest level.

• Hands-on experience designing and debugging PCBs for high-bandwidth image sensors, including managing signal integrity for MIPI CSI-2, LVDS, SLVS-EC links, or similar.

• Experience with Optical Design Software (e.g., Zemax, Code V, or equivalent) and a familiarity with ray tracing, lens curvature, or custom glass specification.

• Experience writing Linux Kernel Drivers or working with V4L2 or similar frameworks to interface with our sensors

• Exposure to Computer Vision or AI pipelines giving you an understanding of how the images you capture are consumed by Helsing’s downstream algorithms.

• Experience with thermal imaging designing, calibrating, and programming LWIR cameras.

Note: We operate in an industry where women, as well as other minority groups, are systematically under-represented. We encourage you to apply even if you don’t meet all the listed qualifications; ability and impact cannot be summarised in a few bullet points.

Join Helsing and work with world-leading experts in their fields 

• Helsing’s work is important. You’ll be directly contributing to the protection of democratic countries while balancing both ethical and geopolitical concerns

• The work is unique. We operate in a domain that has highly unusual technical requirements and constraints, and where robustness, safety, and ethical considerations are vital. You will face unique Engineering and AI challenges that make a meaningful impact in the world

• Our work frequently takes us right up to the state of the art in technical innovation, be it reinforcement learning, distributed systems, generative AI, or deployment infrastructure. The defence industry is entering the most exciting phase of the technological development curve. Advances in our field of world are not incremental: Helsing is part of, and often leading, historic leaps forward

• In our domain, success is a matter of order-of-magnitude improvements and novel capabilities. This means we take bets, aim high, and focus on big opportunities. Despite being a relatively young company, Helsing has already been selected for multiple significant government contracts

• We actively encourage healthy, proactive, and diverse debate internally about what we do and how we choose to do it. Teams and individual engineers are trusted (and encouraged) to practise responsible autonomy and critical thinking, and to focus on outcomes, not conformity. At Helsing you will have a say in how we (and you!) work, the opportunity to engage on what does and doesn’t work, and to take ownership of aspects of our culture that you care deeply about

What we offer

• A focus on outcomes, not time-tracking

• Competitive compensation and VSOP options

• Relocation support

• Social and education allowances

• Regular company events and all-hands to bring together employees as one team across Europe

• A hands-on onboarding program (affectionately labelled “Infraduction”), in which you will be building tooling and applications to be used across the company. This is your opportunity to learn our tech stack, explore the company, and learn how we get things done - all whilst working with other engineering teams from day one 

Helsing is an equal opportunities employer. We are committed to equal employment opportunity regardless of race, religion, sexual orientation, age, marital status, disability or gender identity. Please do not submit personal data revealing racial or ethnic origin, political opinions, religious or philosophical beliefs, trade union membership, data concerning your health, or data concerning your sexual orientation.

About Epirus

Epirus is a high-growth technology company dedicated to overcoming the asymmetric challenges inherent to the future of national security. Epirus' flagship product, Leonidas, is a software-defined system built using intelligent power management techniques that allow power-hungry systems to do more with less.  

Job Summary: This is an exciting role in an innovative company. The ideal candidate for the position is someone who has experience developing high-performance real-time, autonomous software systems to rapidly develop next-generation products.  Employ your expertise by developing software systems that support functions such as autonomous target tracking, agile electronic beam-forming, and real-time hardware control.

Responsibilities: 

• Design and implement software of embedded devices and systems from requirements to production and deployment 
• Design, develop, code, test, and debug system software 
• Build real-time control software for a variety of projects 
• Analyze and enhance the efficiency, stability and scalability of system resources 
• Direct software QA and optimize I/O performance 
• Interface with hardware design and development 
• Assess third-party and open-source software 
• Lead teams to create minimum viable products from an idea 
• Derive software frameworks and architectures to accelerate development 
• Mentor peers to advance team velocity

Basic Qualifications:

• 5+ years of development in C and C++ 
• 3+ years working with embedded systems 
• Additional experience with one or more modern systems language(s): Python, Java, VHDL, Verilog, Go, Rust, etc. 
• Versed in multithreaded design (concurrency primitives, resource management, etc.) 
• Competent in computer science concepts (algorithms, data structures, object-oriented programming, etc.) 
• Strong foundations in mathematics and linear algebra 
• Adequate knowledge of reading schematics and data sheets for components 
• Bachelor’s degree in computer science or a similar discipline, Master’s degree preferred
• This is an on-site position; availability to work in our HQ in Torrance is required

Preferred Skills and Experience:

• 2+ years of experience with Xilinx FPGA and Embedded Cortex CPU architectures 
• Experience building software for real-time operating environments with specific latency requirements 
• Experience with Embedded Linux and/or software integration with FPGA firmware 
• Knowledge or experience with digital signal processing (DSP) or radio frequency (RF) technologies 
• User experience with DevOps Pipeline tools 
• Experience with Docker or Helm  
• Scrum Master Certification 
• Desire to mentor new hires 
• Exposure or interest in sensor fusion, machine learning, or AI

ITAR REQUIREMENTS: 

• To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.  

At Epirus, you’ll work with technical peers and great people—and get first crack at some of the defining technology challenges of our time. Here, “impossible” is just a challenge. We're a diverse, fast-growing team of change-makers fueling the future of energy with revolutionary solutions. Join us and rewrite the rules. 

Senior Electrical Engineer  

Location: Sana Clara, CA

Role Summary:

We’re hiring a Senior Electrical Engineer – Mixed-Signal & Digital Systems to design and deliver the next generation of cavity ring-down spectroscopy (CRDS) instruments. In this role, you will own mixed-signal electronics, schematic capture, and PCB layout, applying best practices in grounding, shielding, and signal integrity. You will also handle incremental firmware maintenance in close partnership with the embedded software architect and consultants. Your work will directly influence the precision, stability, and scalability of systems used worldwide in environmental, industrial, and scientific applications.

Key Responsibilities:

• Design and validate mixed-signal circuits and PCBs for high-precision instrumentation
• Apply best practices in layout, grounding, shielding, and impedance control to minimize noise and interference
• Perform schematic capture and PCB layout in Altium (or equivalent) and run mixed-signal simulations in SPICE or similar tools
• Debug and validate designs in the lab using oscilloscopes, logic analyzers, VNAs, and other instrumentation
• Perform incremental maintenance of embedded firmware (e.g., driver updates, pin mappings, bring-up tweaks) in collaboration with the embedded architect
• Collaborate closely with optical, analog, and mechanical engineers to integrate electronics into complex systems
• Document designs, maintain revision control, and contribute to shared engineering standards

Qualifications:

• BS/MS in Electrical Engineering or related field
• 10+ years in mixed-signal circuit and PCB design for high-performance systems
• Proficiency in schematic capture and PCB layout tools (Altium preferred)
• Experience with mixed-signal simulation (SPICE or equivalent)
• Strong grounding, shielding, and signal integrity practices for noise-sensitive systems
• Familiarity with FPGA firmware (VHDL/Verilog) and embedded C/C++ for maintenance and bring-up
• Strong communication skills and ability to work in multidisciplinary teams

The base salary range for this full-time position is $170K to $180K. Our total compensation packages include base salary, bonus eligibility, and equity. Your base salary range and title will be determined based on the location, experience, qualification, skills, knowledge, level, and pay of employees in similar positions.

We offer a comprehensive benefit package including:

• Medical, Dental, and Vision insurance
• Flexible Spending Account (FSA) and Health Savings Account (HSA) plans
• Life, Short-Term Disability, and Long-Term Disability Insurance
• Paid Time Off and Paid Holidays
• Employee Referral Program
• 401K
• Social events (summer picnic, holiday party, team lunches, etc.)
• On-site Health & Wellness programs (fitness challenges, outdoor bootcamp, flu-shots, etc.)

About Picarro:

We are the world's leader in timely, trusted, and actionable data using enhanced optical spectroscopy. Our solutions are used in a wide variety of applications, including natural gas leak detection, ethylene oxide emissions monitoring, semiconductor fabrication, pharmaceutical, petrochemical, atmospheric science, air quality, greenhouse gas measurements, food safety, hydrology, ecology, and more. Our software and hardware are designed and manufactured in Santa Clara, California and are used in over 90 countries worldwide based on over 65 patents related to cavity ring-down spectroscopy (CRDS) technology and are unparalleled in their precision, ease of use, and reliability.

At Picarro, we are committed to fostering a diverse and inclusive workplace. All qualified applicants will receive consideration for employment without regard to race, sex, color, religion, national origin, protected veteran status, gender identity, social orientation, or disability. Posted positions are not open to third-party recruiters/agencies, and unsolicited resume submissions will be considered free referrals. 

At Picarro, we strive to ensure that all individuals, regardless of their abilities, have equal opportunities. If you are an individual with a disability and require reasonable accommodation to complete any part of the application process or are limited in the ability or unable to access or use this online application process and need an alternative method for applying, please contact Picarro, Inc. at disabilityassistance@picarro.com for assistance. 

Power Management Integrated Circuit (PMIC) Controls Engineer

About Claros 

Claros innovates at the intersection of power and compute. We build advanced semiconductor power management solutions that improve AI compute capacity, efficiency and reliability. Claros is an early-stage startup company located in Torrance, CA. If you are looking for challenging work and a strong technical environment with the collaborative & supportive culture, then Claros Tech is the company for you. We offer industry the best competitive pay & benefits and early-stage stock options. 

Location: Minimum of 3 days a week in the office in Torrance, CA.  

About the Team: 

We are open-minded, fast paced, problem solvers that value open dialogue and candor. Our passion is to challenge the status-quo and we embrace transformational thinking.  Our response is never “no, but….” instead “yes, if….”.  We are mindful of our personal and organizational blinders and try to build an environment where our team members are At Their Best. 

About The Role

Claros Inc. is seeking to hire an exceptional  Power Management Integrated Circuit (PMIC) Controls Engineer to join our ASIC team in Torrance, CA. Candidate must be self-motivated individual to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering PMICs (Low-dropout (LDO) linear voltage regulators, Switching regulators, DC-DC Buck Converters), ADC/DAC, PLL, Gate Drivers, and PMIC chip integration). As a Senior level  role you'll play a crucial role in system level strategies of Power management ICs from concepts into release to production, collaborating closely with other circuit designers, and leveraging sophisticated tools.  

What You Will Do

In this role, you will be responsible for developing the algorithms for power sequencing, voltage scaling and implementing control loops for stability for PMICs used in a range of applications. 

• Collaborate with other engineers to define and implement design methodologies and best practices for PMIC design and related areas. 
• Work with multi-disciplinary teams including control, systems, testing to implement new ideas and in writing the specifications, design, characterization, verification and documentation.  
• Summarize and interpret results of highly complex performance checks and review it with team. 
• Use problem solving skills, experience, and supervise the layout circuit designers. Guide them with floor planning and in resolving DRC/LVS errors.  
• Behavior and transistor level circuit design, simulation and verification of power management blocks including LDO, Switch Mode Power Supplies (buck, boost), voltage reference and other analog circuits meeting power, performance and area specifications. 
• Work closely with PCB layout engineers to ensure performance and quality of the designs.  
• Work with team on best packaging approach for design and test.  
• Datasheet drafting and reviews. 
• Work with product managers to develop the next generation of products. 

What You Bring

• Bachelor’s degree in electrical engineering with 3+ years of overall experience in analog/mixed signal IC Design. 
• Knowledge of semiconductor manufacturing processes and their impact on analog circuit design. Experience in designing circuits in High voltage (BCD) technology processes and FinFET technology (like 12nm and below) is preferred. 
• Strong background in Power Management and circuit design principles, Buck or switching cap based topology, power converter control theory (voltage mode/current mode, PWM/PFM), Mixed Signal Design, Gate Drivers, PLL & Clock Chip Design. 
• Must have released at least one full IC design from Concept to release to production. 
• Good knowledge in device physics and device reliability analysis. 
• Proficiency in using Cadence IC Design Tools. 
• Familiarity with industry standard interface protocols such as SPI, I2C, PMBus/SMBus. 
• Ability to document design techniques, test and verification methodology. 
• Conduct design reviews, analyze and debug circuits, and perform system-level testing to validate performance and ensure compliance with specifications. 
• Full chip integration and Top-Level Simulations. 
• Strong analytical and problem-solving skills, with the ability to debug complex issues. 
• Excellent communication and collaboration skills to work effectively in a team environment. 
• Ability to effectively prioritize and execute tasks in a high-pressure environment. 

What Is Helpful

• Master’s degree or higher.
• Digital control theory
• Experience using Matlab/simulink
• Knowledge in writing Verilog/VHDL modeling. 
• Experience with layout design, layout review, and layout versus schematic (LVS) verification. 

What We Offer

• Career track opportunity with potential for rapid advancement with strong performance as the firm grows.   
• 100% employer paid, comprehensive health care including medical, dental, and vision for you and your family.  
• Paid maternity and paternity for 14 weeks at employees' normal pay.  
• Unlimited PTO, with management approval.  
• Opportunities for professional development and continued learning.  
• Optional 401K, FSA, and equity incentives available. 

Salary Range:  $180,000-$220,000. This represents the typical salary range for this position based on experience, skills, and other factors.

Power Management Integrated Circuit (PMIC) Controls Engineer

About Claros 

Claros innovates at the intersection of power and compute. We build advanced semiconductor power management solutions that improve AI compute capacity, efficiency and reliability. Claros is an early-stage startup company located in Torrance, CA. If you are looking for challenging work and a strong technical environment with the collaborative & supportive culture, then Claros Tech is the company for you. We offer industry the best competitive pay & benefits and early-stage stock options. 

Location: Minimum of 3 days a week in the office in Torrance, CA.  

About the Team: 

We are open-minded, fast paced, problem solvers that value open dialogue and candor. Our passion is to challenge the status-quo and we embrace transformational thinking.  Our response is never “no, but….” instead “yes, if….”.  We are mindful of our personal and organizational blinders and try to build an environment where our team members are At Their Best. 

About The Role

Claros Inc. is seeking to hire an exceptional  Power Management Integrated Circuit (PMIC) Controls Engineer to join our ASIC team in Torrance, CA. Candidate must be self-motivated individual to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering PMICs (Low-dropout (LDO) linear voltage regulators, Switching regulators, DC-DC Buck Converters), ADC/DAC, PLL, Gate Drivers, and PMIC chip integration). As a Senior level  role you'll play a crucial role in system level strategies of Power management ICs from concepts into release to production, collaborating closely with other circuit designers, and leveraging sophisticated tools.  

What You Will Do

In this role, you will be responsible for developing the algorithms for power sequencing, voltage scaling and implementing control loops for stability for PMICs used in a range of applications. 

• Collaborate with other engineers to define and implement design methodologies and best practices for PMIC design and related areas. 
• Work with multi-disciplinary teams including control, systems, testing to implement new ideas and in writing the specifications, design, characterization, verification and documentation.  
• Summarize and interpret results of highly complex performance checks and review it with team. 
• Use problem solving skills, experience, and supervise the layout circuit designers. Guide them with floor planning and in resolving DRC/LVS errors.  
• Behavior and transistor level circuit design, simulation and verification of power management blocks including LDO, Switch Mode Power Supplies (buck, boost), voltage reference and other analog circuits meeting power, performance and area specifications. 
• Work closely with PCB layout engineers to ensure performance and quality of the designs.  
• Work with team on best packaging approach for design and test.  
• Datasheet drafting and reviews. 
• Work with product managers to develop the next generation of products. 

What You Bring

• Bachelor’s degree in electrical engineering with 3+ years of overall experience in analog/mixed signal IC Design. 
• Knowledge of semiconductor manufacturing processes and their impact on analog circuit design. Experience in designing circuits in High voltage (BCD) technology processes and FinFET technology (like 12nm and below) is preferred. 
• Strong background in Power Management and circuit design principles, Buck or switching cap based topology, power converter control theory (voltage mode/current mode, PWM/PFM), Mixed Signal Design, Gate Drivers, PLL & Clock Chip Design. 
• Must have released at least one full IC design from Concept to release to production. 
• Good knowledge in device physics and device reliability analysis. 
• Proficiency in using Cadence IC Design Tools. 
• Familiarity with industry standard interface protocols such as SPI, I2C, PMBus/SMBus. 
• Ability to document design techniques, test and verification methodology. 
• Conduct design reviews, analyze and debug circuits, and perform system-level testing to validate performance and ensure compliance with specifications. 
• Full chip integration and Top-Level Simulations. 
• Strong analytical and problem-solving skills, with the ability to debug complex issues. 
• Excellent communication and collaboration skills to work effectively in a team environment. 
• Ability to effectively prioritize and execute tasks in a high-pressure environment. 

What Is Helpful

• Master’s degree or higher.
• Digital control theory
• Experience using Matlab/simulink
• Knowledge in writing Verilog/VHDL modeling. 
• Experience with layout design, layout review, and layout versus schematic (LVS) verification. 

What We Offer

• Career track opportunity with potential for rapid advancement with strong performance as the firm grows.   
• 100% employer paid, comprehensive health care including medical, dental, and vision for you and your family.  
• Paid maternity and paternity for 14 weeks at employees' normal pay.  
• Unlimited PTO, with management approval.  
• Opportunities for professional development and continued learning.  
• Optional 401K, FSA, and equity incentives available. 

Salary Range:  $180,000-$220,000. This represents the typical salary range for this position based on experience, skills, and other factors.

YOUR MISSION

As a Staff Electrical Engineer, you will be a senior technical leader responsible for driving avionics architecture decisions and owning the design, development, and delivery of flight-critical electronic assemblies for True Anomaly's spacecraft. You will shape how our avionics systems are defined, integrated, and proven — bridging board-level design with system-level thinking to deliver hardware that meets the demands of space. 

RESPONSIBILITIES

• Lead avionics architecture definition and trade studies, driving decisions on processing, data transport, power distribution, and redundancy that shape the spacecraft electrical system 
• Own the end-to-end design of complex electronic assemblies — from requirements capture, schematic design, and component selection through prototyping, bring-up, debugging, and release to production 
• Collaborate with system architecture development across cross-functional teams including software, GNC, propulsion, and systems engineering 
• Lead preliminary and critical design reviews for avionics subsystems, ensuring designs meet program requirements and spacecraft-level performance goals 
• Conduct and review derating analysis and worst-case circuit analysis for flight hardware 
• Define and drive interface control between avionics boards and other spacecraft subsystems, including power, RF, payloads, and harness 
• Perform system-level integration of avionics hardware and software, including embedded firmware interfaces and communication buses 
• Perform first article testing, unit-level testing, and production testing of avionics assemblies 
• Support hardware through production, integration, launch, and on-orbit commissioning 
• Define validation approaches and create development and qualification testing campaigns to exercise designs to their limits and ensure reliable hardware 
• Drive compliance with relevant industry standards, regulations, and quality assurance processes across the avionics subsystem 
• Develop and maintain documentation for avionics systems and components, including design specifications, interface control documents, test plans, and operating procedures 
• Mentor junior engineers to improve design skill sets and increase capabilities within the organization 
• Continuously improve electrical engineering processes and practices to drive innovation and efficiency 

QUALIFICATIONS

• Bachelor's degree in Electrical Engineering or related field 
• Minimum 10 years of experience in electrical engineering 
• Demonstrated spacecraft flight heritage — experience designing, building, and delivering electronic hardware that has operated on orbit 
• Experience with embedded firmware development and hardware/firmware co-design 
• Advanced experience in PCB and PCBA design using Altium Designer or equivalent ECAD tools 
• Experience with system-level avionics architecture, including processing, power distribution, data interfaces, and redundancy schemes 
• Strong understanding of common spacecraft communication interfaces (RS-422/RS-485, SPI, I2C, SpaceWire, Ethernet) 
• Demonstrated ability to independently lead complex technical efforts and drive them to completion 
• Excellent communication and interpersonal skills 

PREFERRED SKILLS AND EXPERIENCE

• Master's degree in Electrical Engineering or related field 
• Experience with FPGA SoC development and VHDL/Verilog 
• Familiarity with spacecraft power systems, propulsion interfaces, and communication subsystems 
• Experience with radiation-tolerant design practices and mitigation of radiation effects on COTS components 
• Knowledge of industry standards and regulations related to spacecraft electrical systems, including EEE-INST-002, GSFC-STD-7000 (GEVS), and MIL-STD-461 
• Experience with simulation tools such as SPICE, MATLAB, and Simulink 
• Experience with worst-case circuit analysis and derating analysis for space-grade hardware 
• Familiarity with configuration management and requirements traceability tools 
• Experience working in a fast-paced, startup environment or a similarly dynamic setting 

COMPENSATION

• Base Salary: $175,000-$265,000
• Equity + Benefits including Health, Dental, Vision, HRA/HSA options, PTO and paid holidays, 401K, Parental Leave 

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, location, and experience. 

ADDITIONAL REQUIREMENTS

• Ability to maintain or obtain TS//SCI clearance 
• Work Location—this role will be onsite at either our Centennial, CO or Long Beach, CA locations, with travel to other sites as needed.
• Work environment—the work environment; temperature, noise level, inside or outside, or other factors that will affect the person's working conditions while performing the job.
• Physical demands—the physical demands of the job, including bending, sitting, lifting and driving.

This position will be open until it is successfully filled. To submit your application, please follow the directions below. #LI-Onsite

At Optiver we pride ourselves on being real engineers, not just coders. Our engineers work closely with traders to identify the business problems we face and determine how they should be solved. We apply a disciplined and scientific approach. We engineer simple, well-architected solutions that meet the dynamic needs of our traders. Our passion is to solve problems which really matter to the business, and we take pride in the quality of our solutions.

Hardware Engineers at Optiver build hardware-based trading systems ranging from low latency algorithms to high bandwidth computation. They are responsible for owning all aspects of the development process from ideation to implementation creating bespoke solutions to our complex trading problems. Their systems have little room for failure which add to the stability of the market, not detract from it. Working in close collaboration with software engineers and traders, hardware engineers deeply understand our trading problems and create dynamic, well-architected systems that make an impact in a matter of days and weeks rather than months and years.

What you’ll do: 

• Accelerate network infrastructure and trading system components with high-speed hardware designs.
• Research new low-latency techniques and platforms and identify opportunities for integration with our trading system.
• Work in a multidisciplinary team of traders, software developers, and infrastructure engineers.
• Leverage the best hardware available or build in-house versions to ensure our FPGAs can interface with cutting edge server hardware.
• Manage relationships with 3rd party vendors.

What you’ll get:

You’ll join a culture of collaboration and excellence, surrounded by curious thinkers and creative problem-solvers. Motivated by a passion for continuous improvement, you’ll thrive in a supportive, high-performing environment alongside talented colleagues, collectively tackling some of the toughest challenges in the financial markets.

In addition, you’ll receive:

• The opportunity to work alongside best-in-class professionals from over 40 different countries
• A highly competitive compensation package
• Global profit-sharing pool and performance-based bonus structure
• 401(k) match up to 50%
• Comprehensive health, mental, dental, vision, disability, and life coverage
• 25 paid vacation days alongside market holidays
• Extensive office perks, including breakfast, lunch and snacks, regular social events, clubs, sporting leagues and more

Who you are:

• A Bachelor’s degree in CE, EE, CS, or related technical field.
• Experience designing, coding, testing, and verifying FPGAs and/or ASICs.
• Experience coding in VHDL, Verilog, SystemVerilog as well as C or C++.
• Experience with RTL synthesis, writing timing, area, and other relevant constraints.
• Experience with digital simulators and self-checking test benches.
• Experience supporting post-silicon bring-up and debugging a plus.
• Ability to work closely with software developers to rapidly deliver integrated systems.

Who we are:

At Optiver, our mission is to improve the market by injecting liquidity, providing accurate pricing, increasing transparency, and stabilising the market no matter the conditions. With a focus on continuous improvement, we prioritise safeguarding the health and efficiency of the markets for all participants. As one of the largest market making institutions, we are a respected partner on 100+ exchanges across the globe.

Optiver Chicago’s culture parallels the energetic city we’re immersed in. Home to the Chicago Board of Trade, Chicago Board Options Exchange, and Chicago Mercantile Exchange, Chicago has established itself as the trading capital of the US. Active on leading US exchanges, Optiver’s Chicago office trades a wide range of products from listed derivatives to cash equities, ETFs, bonds and foreign exchange

Our differences are our edge. Optiver does not discriminate on the basis of race, religion, color, sex, gender identity, sexual orientation, age, physical or mental disability, or other legally protected characteristics.